Patents by Inventor Hsuan Lin

Hsuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250062147
    Abstract: A semiconductor processing system includes a first semiconductor processing site and a second semiconductor processing site. The system includes an unmanned electric vehicle configured to carry a portable cleanroom stocker between the first and second semiconductor processing sites. The portable cleanroom stocker is configured to maintain cleanroom conditions within the portable cleanroom stocker during transportation.
    Type: Application
    Filed: November 1, 2024
    Publication date: February 20, 2025
    Inventors: Rong Syuan FAN, Jen-Yuan CHANG, Mei-Hsuan LIN
  • Publication number: 20250063783
    Abstract: A device includes a fin extending from a semiconductor substrate, a gate stack over and along a sidewall of the fin, an isolation region surrounding the gate stack, an epitaxial source/drain region in the fin and adjacent the gate stack, and a source/drain contact extending through the isolation region, including a first silicide region in the epitaxial source/drain region, the first silicide region including NiSi2, a second silicide region on the first silicide region, the second silicide region including TiSix, and a conductive material on the second silicide region.
    Type: Application
    Filed: November 5, 2024
    Publication date: February 20, 2025
    Inventors: Yan-Ming Tsai, Chih-Wei Chang, Ming-Hsing Tsai, Sheng-Hsuan Lin, Hung-Hsu Chen, Wei-Yip Loh
  • Patent number: 12218012
    Abstract: A semiconductor device with multiple silicide regions is provided. In embodiments a first silicide precursor and a second silicide precursor are deposited on a source/drain region. A first silicide with a first phase is formed, and the second silicide precursor is insoluble within the first phase of the first silicide. The first phase of the first silicide is modified to a second phase of the first silicide, and the second silicide precursor being soluble within the second phase of the first silicide. A second silicide is formed with the second silicide precursor and the second phase of the first silicide.
    Type: Grant
    Filed: July 27, 2023
    Date of Patent: February 4, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wei-Yip Loh, Yan-Ming Tsai, Hung-Hsu Chen, Chih-Wei Chang, Sheng-Hsuan Lin
  • Patent number: 12198766
    Abstract: An artificial neural network operation circuit and an in-memory computation device of the artificial neural network operation circuit are proposed. The in-memory computation device includes a memory cell array, a compensation memory cell string, and an operator. The memory cell array has a plurality of memory cells to store a plurality of weight values. The memory cell array has a plurality of word lines and a plurality of bit lines. Each compensation memory cell of the compensation memory cell string stores a unit weight value. The operator multiplies a signal on a compensation bit line by peak weight information of the weight values to generate a first signal and adds the first signal to each signal on the bit lines to obtain a plurality of computation results, respectively.
    Type: Grant
    Filed: February 22, 2023
    Date of Patent: January 14, 2025
    Assignee: Macronix International Co., Ltd.
    Inventors: Yu-Hsuan Lin, Yu-Yu Lin, Hsiang-Lan Lung
  • Patent number: 12191199
    Abstract: The present disclosure describes a method to a metallization process with improved gap fill properties. The method includes forming a contact opening in an oxide, forming a barrier layer in the contact opening, forming a liner layer on the barrier layer, and forming a first metal layer on the liner layer to partially fill the contact opening. The method further includes forming a second metal layer on the first metal layer to fill the contact opening, where forming the second metal layer includes sputter depositing the second metal layer with a first radio frequency (RF) power and a direct current power, as well as reflowing the second metal layer with a second RF power.
    Type: Grant
    Filed: March 29, 2021
    Date of Patent: January 7, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tien-Pei Chou, Ken-Yu Chang, Sheng-Hsuan Lin, Yueh-Ching Pai, Yu-Ting Lin
  • Publication number: 20250008173
    Abstract: The present disclosure relates to a system and a method for distributor analysis. The method includes: determining a first group of distributors corresponding to a first range of achievement scores; determining a second group of distributors corresponding to a second range of achievement scores; comparing a value of a stream parameter of a distributor from the second group of distributors with an average value of the stream parameter of the first group of distributors; and informing the distributor of a result of the comparing process.
    Type: Application
    Filed: December 1, 2023
    Publication date: January 2, 2025
    Inventors: Jayneel PAWAR, Hemant MEHTA, Uday Kumar EDUDULA, Ajay Prakash MANGALE, Shih-Che TSENG, Tze-Hsuan LIN, Shao-Tang CHIEN, Chi-Wei LIN, Hsuan MO, Yung-Chi HSU
  • Patent number: 12182701
    Abstract: The present invention discloses a memory and a training method for neural network based on memory. The training method includes: obtaining one or more transfer functions of a memory corresponding to one or more influence factors; determining a training plan according to an ideal case and the one or more influence factors; training the neural network according to the training plan and the one or more transfer functions to obtain a plurality of weights of the trained neural network; and programming the memory according to the weights.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: December 31, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Yu-Hsuan Lin, Po-Kai Hsu, Ming-Liang Wei
  • Patent number: 12166078
    Abstract: A device includes a fin extending from a semiconductor substrate, a gate stack over and along a sidewall of the fin, an isolation region surrounding the gate stack, an epitaxial source/drain region in the fin and adjacent the gate stack, and a source/drain contact extending through the isolation region, including a first silicide region in the epitaxial source/drain region, the first silicide region including NiSi2, a second silicide region on the first silicide region, the second silicide region including TiSix, and a conductive material on the second silicide region.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: December 10, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yan-Ming Tsai, Chih-Wei Chang, Ming-Hsing Tsai, Sheng-Hsuan Lin, Hung-Hsu Chen, Wei-Yip Loh
  • Patent number: 12159671
    Abstract: An in-dynamic memory search device and an operation method thereof are provided. The in-dynamic memory search device includes at least one word line, at least two bit lines, at least one match line, at least one unit cell, at least two search lines, at least one pre-charge unit and at least one sense unit. The unit cell includes two storage elements and two search transistors. Each of the storage elements includes a write transistor and a read transistor. The write transistor is connected to the word line and one of the bit lines. The read transistor is connected to the write transistor and the match line. The search transistors are respectively connected to the read transistors. The search lines are respectively connected to the search transistors. The pre-charge unit is connected to the match line. The sense unit is connected to the match line.
    Type: Grant
    Filed: February 6, 2023
    Date of Patent: December 3, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Po-Hao Tseng, Feng-Min Lee, Yu-Hsuan Lin
  • Patent number: 12159672
    Abstract: A hybrid in-memory search (IMS) content addressable memory (CAM) cell includes: a first IMS CAM cell; and a second IMS CAM cell, coupled to the first IMS CAM cell. The first IMS CAM cell and the second IMS CAM cell are of different types. When the hybrid IMS CAM cell stores a storage data, the first IMS CAM cell stores a first part of the storage data and the second IMS CAM cell stores the storage data or a second part of the storage data.
    Type: Grant
    Filed: February 1, 2023
    Date of Patent: December 3, 2024
    Assignee: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Po-Hao Tseng, Yu-Hsuan Lin, Tian-Cih Bo, Feng-Min Lee, Yu-Yu Lin
  • Publication number: 20240393118
    Abstract: A method includes: receiving an auxiliary routing request from a manufacturing execution system (MES) apparatus of a first site by an inter-site backup management apparatus; selecting an auxiliary route to a second site based on the auxiliary routing request and a statistical model by the inter-site backup management apparatus; including the auxiliary route in a route associated with a wafer lot by the MES apparatus; and performing a semiconductor processing operation on a wafer of the wafer lot according to the route.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 28, 2024
    Inventors: Mei-Hsuan LIN, Rong Syuan FAN, Jen-Yuan Chang
  • Publication number: 20240395837
    Abstract: An image sensor includes a first color filter disposed on a first photodiode, a first grid, and a first micro lens disposed on the first color filter and the first grid. The first grid includes a first main portion and a first shielding portion extended from the first main portion. The first main portion surrounds the first color filter and the first shielding portion partially covers the first color filter such that a first cavity defined by the first shielding portion is configured over the first color filter. The first color filter or the first micro lens includes a first protruding portion filled in the first cavity, and a width of the first protruding portion is in a range from 0.1 pixel size to 0.8 pixel size. A manufacturing method of an image sensor is also disclosed.
    Type: Application
    Filed: May 23, 2023
    Publication date: November 28, 2024
    Inventors: Cheng-Hsuan LIN, Kuang-Yu HUANG, Zong-Ru TU, Huang-Jen CHEN, Han-Lin WU
  • Publication number: 20240395611
    Abstract: The present disclosure describes a method to a metallization process with improved gap fill properties. The method includes forming a contact opening in a dielectric layer to expose a source/drain epitaxial layer in a substrate. An aspect ratio of the contact opening is between about 3 and about 10. The method further includes forming a first metal layer in the contact opening and in contact with the source/drain epitaxial layer, forming a barrier layer on the first metal layer, forming a liner layer on the barrier layer, forming second metal layer on the liner layer to partially fill the contact opening, and forming a third metal layer on the second metal layer to fill the contact opening.
    Type: Application
    Filed: July 30, 2024
    Publication date: November 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tien-Pei CHOU, Ken-Yu CHANG, Sheng-Hsuan LIN, Yueh-Ching PAI, Yu-Ting LIN
  • Patent number: 12154808
    Abstract: A semiconductor processing system includes a first semiconductor processing site and a second semiconductor processing site. The system includes an unmanned electric vehicle configured to carry a portable cleanroom stocker between the first and second semiconductor processing sites. The portable cleanroom stocker is configured to maintain cleanroom conditions within the portable cleanroom stocker during transportation.
    Type: Grant
    Filed: June 3, 2022
    Date of Patent: November 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mei-Hsuan Lin, Rong Syuan Fan, Jen-Yuan Chang
  • Publication number: 20240386958
    Abstract: The application provides a content addressable memory (CAM) device and a method for searching and comparing data thereof. The CAM device comprises: a plurality of memory strings; and a sensing amplifier circuit coupled to the memory strings; wherein in data searching, a search data is compared with a storage data stored in the memory strings, the memory strings generate a plurality of string currents, the sensing amplifier circuit senses the string currents to generate a plurality of sensing results; based on the sensing results, a match degree between the search data and the storage data is determined as one of the follows: all-matched, partially-matched and all-mismatched.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Inventors: Po-Hao TSENG, Yu-Hsuan LIN, Feng-Min LEE, Yung-Chun LI
  • Publication number: 20240387267
    Abstract: The present disclosure provides embodiments of a semiconductor device. In one embodiment, the semiconductor device includes a gate structure, a source/drain feature adjacent the gate structure, a first dielectric layer over the source/drain feature, an etch stop layer over the gate structure and the first dielectric layer, a second dielectric layer over the etch stop layer, a source/drain contact that includes a first portion extending through the first dielectric layer and a second portion extending through the etch stop layer and the second dielectric layer, a metal silicide layer disposed between the second portion and etch stop layer, and a metal nitride layer disposed between the first portion and the first dielectric layer.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Inventors: Chih-Hsuan Lin, Xi-Zong Chen, Chih-Teng Liao
  • Patent number: 12146327
    Abstract: The present invention relates to an anti-cracking assembly structure for door and window corner wall and anti-cracking component thereof. The anti-cracking components of the anti-cracking assembly structure for door and window corner wall has a plurality of protruding ribs and grooves formed at intervals on a surface thereof. The protruding ribs and grooves are arc-shaped and arranged in parallel to each other. When the reinforced concrete wall is subjected to an external force and stress is generated at the corner of the door and window frames, the stress can be guided along the arc-shaped protruding ribs and arc-shaped grooves on the surface of anti-cracking component to change the transmission direction of the force at the stress end, so as to transmit and disperse the stress to the peripheral side more quickly. Accordingly, it can more effectively prevent the occurrence of 45-degree shear cracks at the corners.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: November 19, 2024
    Inventors: Chih-Cheng Lin, Chuan-Hsuan Lin
  • Publication number: 20240374153
    Abstract: Various aspects of the present disclosure are directed toward apparatuses. systems. and methods that include a catheter-delivered implantable hemodynamic monitor (IHM) implant system with an implantable sensor.
    Type: Application
    Filed: August 25, 2022
    Publication date: November 14, 2024
    Inventors: Kevin A. Gill, Min-Hsuan Lin, Rebecca L. Maryn, David J. Minor, Edward E. Shaw, Benjamin M. Trapp
  • Publication number: 20240374377
    Abstract: Various aspects of the present disclosure are directed toward apparatuses, systems, and methods that include an anchoring implantable medical device configured to anchor an implantable medical device.
    Type: Application
    Filed: August 25, 2022
    Publication date: November 14, 2024
    Inventors: Kevin A. Gill, Min-Hsuan Lin, Rebecca L. Maryn, David J. Minor, Edward E. Shaw, Benjamin M. Trapp
  • Publication number: 20240365541
    Abstract: The application discloses an integrated memory device, a manufacturing method and an operation method thereof. The integrated memory cell includes: a first memory cell; and an embedded second memory cell, serially coupled to the first memory cell, wherein the embedded second memory cell is formed on any one of a first side and a second side of the first memory cell.
    Type: Application
    Filed: July 8, 2024
    Publication date: October 31, 2024
    Inventors: Yu-Hsuan LIN, Feng-Min LEE, Po-Hao TSENG