Abstract: An electronic device includes a battery module, a battery connector and a controller is provided. The battery connector includes a first connector and a second connector. The first connector is installed on the battery module and includes a first metal component and an enable pin. The first metal component is disposed on a housing of the first connector and is coupled to the enable pin. The second connector includes a second metal component, a detection pin and a ground pin. The second metal component is disposed on a housing of the second connector. The detection pin is coupled to the second metal component. The ground pin is coupled to a ground potential and its position corresponds to the position of the enable pin. The controller determines a connection status of the first connector and the second connector according to an external signal on the detection pin.

Abstract: A method includes forming a metal pad, depositing a passivation layer on the metal pad, and planarizing the passivation layer, so that the passivation layer includes a planar top surface. The method further includes etching the passivation layer to form an opening in the passivation layer, wherein the metal pad is exposed to the opening, and forming a conductive via including a lower portion in the opening, and an upper portion higher than the passivation layer. A polymer layer is then dispensed to cover the conductive via.

Abstract: A support structure including a first bracket, a second bracket, and at least one elastic member is provided. The first bracket includes multiple first alignment hole groups. The second bracket is detachably connected to the first bracket along a first axis. The second bracket includes multiple second alignment hole groups. The second bracket is adapted to slide relative to the first bracket along the first axis to change a length of the support structure along the first axis. The at least one elastic member is detachably connected to the first bracket and the second bracket. When the second bracket is connected to the first bracket, at least one of the first alignment hole groups is aligned with at least one of the second alignment hole groups to form at least one insertion space. A portion of the at least one elastic piece is located in the corresponding at least one insertion space and connected to the first bracket and the second bracket.

Abstract: Disclosed herein, among other things, are systems and methods for temperature detection for hearing device applications. A method includes obtaining a first temperature measurement from a first sensor from a first side of a housing of a hearing device, and obtaining a second temperature measurement from a second sensor from a second side of the housing. The first temperature measurement is compared to the second temperature measurement, and a determination is made whether the hearing device is positioned on a right side or a left side of a wearer of the hearing device, based on the comparison. The hearing device is configured as a right device or a left device based on the determination.

Abstract: A method for performing mapping between one or more radio modules and one or more radiofrequency (RF) groups includes: separating the one or more radio modules into the one or more RF groups according to one or more messages, wherein the one or more messages comprise a previous TX power ratio, a TX power ratio margin, one or more weighting information, one or more TX performance indices, one or more receiving (RX) performance indices, one or more configurations, or one or more usage scenarios; accumulating RF exposure of the one or more radio modules to at least one RF group among the one or more RF groups; and determining at least one transmitting (TX) power limit corresponding to the at least one RF group according to accumulated RF exposure of the at least one RF group.

Abstract: A method for dynamically allocating radio frequency (RF) exposure across multiple RF groups including a first RF group and a second RF group includes: estimating RF exposure of the first RF group according to at least one message of the first RF group, in order to generate estimated RF exposure; calculating RF exposure of the second RF group according to at least one message of the second RF group, the estimated RF exposure, and one or more equations, in order to generate calculated RF exposure, wherein the one or more equations are associated with a predetermined regulation; and determining a TX power limit corresponding to the first RF group and a TX power limit corresponding to the second RF group according to the estimated RF exposure and the calculated RF exposure, respectively.

Abstract: A composite film includes a first thermoplastic elastomer film layer and a second thermoplastic elastomer film layer, wherein the first thermoplastic elastomer film layer includes a first styrenic block copolymer. The second thermoplastic elastomer film layer is disposed on the first thermoplastic elastomer film layer, wherein the second thermoplastic elastomer film layer includes a second styrenic block copolymer, diffusion particles dispersed in the second thermoplastic elastomer film layer, and a surface microstructure disposed on the surface of the second thermoplastic elastomer film layer.

Abstract: An electrostatic field strength measuring apparatus includes an electrostatic field detection device and a processor. The electrostatic field detection device includes a ring light source configured to emit a light signal to a target object, and a reflection detector disposed within and surrounded by the ring light source and configured to receive a reflection signal, of the light signal, reflected by a surface of the target object and generate an electrical signal based upon the reflection signal. The processor is configured to determine, based upon the electrical signal, measures of electrostatic field strength at the surface of the target object.

Abstract: A reservoir device, comprises a first transistor and a second transistor. A gate of the first transistor is coupled to a write word line, a drain of the first transistor is coupled to a write bit line. A source of the second transistor is coupled to a read source line, a drain of the second transistor is coupled to a read bit line, and a gate of the second transistor is coupled to a source of the first transistor. A storage node is located on a coupling point between the gate of the second transistor and the source of the first transistor. The reservoir device selectively performs a write operation, a read operation or a refresh operation in response to an input voltage received by the write word line, the write bit line, the read source line and the read bit line respectively.

Abstract: An electrostatic discharge (ESD) protection structure including a P-type substrate, a P-type structure, an N-type buried layer, an element active region, a P-type guard ring, and an N-type structure is provided. The P-type structure is formed in the P-type substrate and serves as an electrical contact of the P-type substrate. The N-type buried layer is formed in the P-type substrate. The element active region is formed on the N-type buried layer. The P-type guard ring is formed on the N-type buried layer and surrounds the element active region. The N-type structure is formed on the N-type buried layer and disposed between the P-type guard ring and the P-type structure.

Abstract: An indoor occupancy distribution analysis system is provided, which includes a base station and a network management device that communicate with each other. The base station is configured to collect performance indicators corresponding to each user equipment from the base station. The performance indicators are associated with the communication between the user equipment and the base station. The network management device is configured to receive these performance indicators, input them into a classifier, obtain the inference result output by the classifier, and derive occupancy distribution from the inference result.

Abstract: A hyperdimensional computing device includes a non-volatile memory cell array and a first operation circuit. The non-volatile memory cell array is coupled to a plurality of first word lines. The non-volatile memory cell array has a plurality of memory cell groups, a plurality of first memory cells of each of the memory cell groups are coupled to a same first word line of the first word lines, and the memory cell groups respectively store a plurality of data vectors. The first operation circuit receives at least one of the data vectors through bit lines and generates a bundled data vector according to the at least one of the data vectors.

Abstract: A storage device for generating an identity code, includes a first storage circuit, a second storage circuit and a reading circuit. The first storage circuit stores several first data having several bits. The second storage circuit stores several second data having several bits. The reading circuit reads the second data from the second storage circuit to form a first sequence, and simultaneously reads the first data from the first storage circuit to form a second sequence. The reading circuit includes a processing circuit which simultaneously receives the first sequence and the second sequence, selects a first portion of the second sequence to form a target sequence according to the first sequence, and outputs the target sequence to serve as an identity code. Logical values of the bits of the first data and the second data are randomly distributed or pre-defined by a user.

Abstract: A memory device includes a first memory cell performing a logic operation. The first memory cell includes first and second switches. The first switch writes a first weight bit into a first storage node. The second switch generates a first current signal according to the first weight bit and a first input bit. The second switch receives a first bit line signal carrying the first input bit and a first word line signal. A control terminal of the second switch is coupled to the first storage node. When the first input bit has a first logic value, the first bit line signal and the first word line signal has a first voltage level. When the first input bit has a second logic value, the first bit line signal has a second voltage level smaller than the first voltage level.

Abstract: The present invention provides a manufacturing method for a stopper used in medical containers, the stopper having a septum and a housing supporting the septum, the manufacturing method comprising firstly creating the septum using a first molding process with a thermoplastic elastomer composition; then creating the housing using a second molding process with a plastic composition, by the second molding process the septum being pre-compressed in a radial direction perpendicular to a needle penetration direction of the septum; and subjecting the stopper to a steam sterilization, wherein after the septum experiences the steam sterilization, the septum exhibits a residual pre-compression level of 12% to 30% in the radial direction compared to when the septum is uncompressed, and the residual pre-compression level is measured based on a thickness or average diameter of the septum.

Abstract: A method for secure data transmission is provided. The method includes requesting a key from an encryption and decryption application in a near real-time radio access network (RAN) intelligent controller (Near-RT RIC). The method includes receiving the key from the encryption and decryption application. The method includes encrypting data by using the key, and generating encrypted data. The method includes storing the encrypted data to a database in the Near-RT RIC through a shared data layer.

Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.

Abstract: An image sensing module includes: a substrate; an optical sensing element disposed on the substrate; and a light-guide component disposed on the optical sensing element, and including a first light adjusting layer and a second light adjusting layer. The second light adjusting layer is disposed on the first light adjusting layer. The first light adjusting layer has a first light transmitting region, and the second light adjusting layer has a second light transmitting region. The first light transmitting region and the second light transmitting region are disposed corresponding to the optical sensing element.

Abstract: A method includes: positioning a wafer on an electrostatic chuck of a physical vapor deposition apparatus, the wafer including an opening exposing a conductive feature; setting a temperature of the wafer to a room temperature; forming a tungsten thin film in the opening by the physical vapor deposition apparatus, the tungsten thin film including a bottom portion that is on an upper surface of the conductive feature exposed by the opening, a top portion that is on an upper surface of a dielectric layer through which the opening extends and a sidewall portion that is on a sidewall of the dielectric layer exposed by the opening; removing the top portion and the sidewall portion of the tungsten thin film from over the opening; and forming a tungsten plug in the opening on the bottom portion by selectively depositing tungsten by a chemical vapor deposition operation.

Abstract: A semiconductor die and methods of forming the same and a package structure are provided. The semiconductor die includes a semiconductor substrate, a plurality of conductive pads over the semiconductor substrate, a passivation layer over the semiconductor substrate and partially covering the plurality of conductive pads, an interconnecting line disposed on the passivation layer, and a plurality of connectors disposed on and electrically connected to the plurality of conductive pads. Each of the plurality of connectors includes a stacked structure of a first conductive pillar and a second conductive pillar disposed directly on the first conductive pillar, wherein a span of the second conductive pillar is smaller than a span of the first conductive pillar, and an orthogonal projection of the second conductive pillar falls within an orthogonal projection of the first conductive pillar, and the interconnecting line is located beside and spaced apart from the plurality of connectors.