Abstract: A method includes forming a dummy gate structure across a fin, in which the dummy gate structure has a dummy gate dielectric layer and a dummy gate electrode, forming gate spacers on sidewalls of the dummy gate structure, forming source/drain epitaxial structures on sides of the dummy gate structure, performing a first etch process to the dummy gate electrode such that a recessed dummy gate electrode remains over the fin, performing a second etch process to the gate spacers such that recessed gate spacers remain over the sidewalls of the dummy gate structure, removing the recessed dummy gate electrode and the dummy gate dielectric layer after the second etch process to form a recess between the recessed gate spacers, forming a gate structure overfilling the recess, and performing a third etch process to the gate structure such that a recessed gate structure remains between the recessed gate spacers.

Abstract: A semiconductor circuit and an operating method for the same are provided. The method includes the following steps. A memory circuit is operated during a first timing to obtain a first memory state signal S1. The memory circuit is operated during a second timing after the first timing to obtain a second memory state signal S2. A difference between the first memory state signal S1 and the second memory state signal S2 is calculated to obtain a state difference signal SD. A calculating is performed to obtain an un-compensated output data signal OD relative with an input data signal ID and the second memory state signal S2. The state difference signal SD and the un-compensated output data signal OD are calculated to obtain a compensated output data signal OD?.

Abstract: An electronic device with fingerprint sensing function including a fingerprint sensing array, multiple fingerprint sensing signal readout lines, multiple touch driving lines, a touch driving circuit, and a read circuit is provided. The fingerprint sensing array includes multiple fingerprint sensing units arranged in array. The fingerprint sensing signal readout lines are respectively coupled to a column of fingerprint sensing units of the fingerprint sensing array. The touch driving lines are respectively interleaved with the fingerprint sensing signal readout lines. The touch driving circuit is coupled to the touch driving lines, and provides multiple touch driving signals to the touch driving lines. The read circuit is coupled to the fingerprint sensing signal readout lines. In response to the touch driving lines outputting the touch driving signals, the read circuit determines a touch position of a touch object based on multiple read signals output by the fingerprint sensing signal readout lines.

Abstract: A memory device for data searching and a data searching method thereof are provided. The data searching method includes the following steps. A searching word is received and then divided into a plurality of sections. The sections are encoded as a plurality of encoded sections, so that the encoded sections may correspond to a plurality of memory blocks in a memory array. The encoded sections are directed into the memory blocks to perform data comparisons and obtaining a respective result of data comparison. Thereafter, addresses of bit lines which match the searching word are obtained according to respective result of data comparison for each of memory block.

Abstract: A random number generator, a random number generating circuit, and a random number generating method are provided. The random number generating circuit includes the random number generator and executes the random number generating method. The random number generator includes a shift register having N storage elements and a combinational logic circuit. The N storage elements receive a random seed in a static state and repetitively perform a bit shift operation in a plurality of clock cycles. The combinational logic circuit generates an output sequence based on the random seed and a random bitstream received from an external source.

Abstract: A content-address memory (CAM) and an operation method are provided. The content-address memory comprises: a plurality of first signal lines; a plurality of second signal lines; and a plurality of CAM memory cells coupled to the first signal lines and the second signal lines, wherein in data match, a plurality of input signals are input into the CAM memory cells via the first signal lines; the input signals are compared with contents stored in the CAM memory cells; and a match result is determined based on an electrical characteristic of the second signal lines.

Abstract: A signal processing circuit includes a buffer, a first capacitor, a second capacitor, a first switch and a second switch. The buffer includes an input terminal for receiving an external signal and an output terminal for outputting an output signal. The first switch is coupled between the output terminal of the buffer and the first capacitor. The second switch is coupled between the output terminal of the buffer and the second capacitor. The first switch and the second switch are turned on alternately.

Abstract: A memory device includes a stack and a plurality of memory strings. The stack is disposed on the substrate, and the stack includes a plurality of conductive layers and a plurality of insulating layers alternately stacked. The memory strings pass through the stack along a first direction, wherein a first memory string in the memory strings includes a first conductive pillar and a second conductive pillar, a channel layer, and a memory structure. The first conductive pillar and the second conductive pillar respectively extend along the first direction and are separated from each other. The channel layer is disposed between the first conductive pillar and the second conductive pillar. The memory structure surrounds the second conductive pillar, and the memory structure includes a resistive memory material.

Abstract: A detection circuit includes a first detection terminal, a second detection terminal, a first switch, a second switch, a first capacitor, a second capacitor and an amplifier. The first switch is coupled to the first detection terminal. The second switch is coupled to the second detection terminal. The first capacitor is coupled between the first switch and the second switch. The amplifier includes a first input terminal coupled to the second switch, a second input terminal used to receive an operation signal, and an output terminal used to output an output signal. The second capacitor is coupled between the first input terminal and the output terminal of the amplifier. The first switch and the second switch are turned on alternatively.

Abstract: The present disclosure relates to the production of transmissible vims defective interfering particles (DIPs), particularly those of dengue virus as well as methods of their production. The DIPs have particular utility as immunogenic compositions and vaccines.

Abstract: The present invention discloses a memory and a training method for neutral network based on memory. The training method includes: obtaining one or more transfer functions of a memory corresponding to one or more influence factors; determining a training plan according to an ideal case and the one or more influence factors; training the neutral network according to the training plan and the one or more transfer functions to obtain a plurality of weights of the trained neutral network; and programming the memory according to the weights.

Abstract: A mounting mechanism for a server or other electronic apparatus allowing the addition of modules or devices of different sizes includes a casing having an opening. A guiding track is disposed in the casing; a slide bar is movably disposed on the guiding track; a restriction structure is disposed on the first end of the guiding track; and a locking structure can pivot on the restriction structure. When the casing is mounted on a rear rack, the slide bar is moved out of the casing via the opening, and the restriction structure and the locking structure are securely fastened to the frame.

Abstract: A memory device for data searching and a data searching method thereof are provided. The data searching method includes the following steps. A searching word is received and then divided into a plurality of sections. The sections are encoded as a plurality of encoded sections, so that the encoded sections may correspond to a plurality of memory blocks in a memory array. The encoded sections are directed into the memory blocks to perform data comparisons and obtaining a respective result of data comparison. Thereafter, addresses of bit lines which match the searching word are obtained according to respective result of data comparison for each of memory block.

Abstract: A capacitive fingerprint sensing device is provided. A sensing pixel unit includes a capacitor, a reset circuit, and a sensing capacitor. The reset circuit provides a reset voltage during a reset period to reset a voltage on the capacitor and provides an adjustment current during a sensing period to adjust a sense voltage generated on a common junction of the capacitor and the reset circuit.

Abstract: A flash memory cell includes a rectifying device and a transistor. The rectifying device has an input end coupled to a bit line. The transistor has a charge storage structure. The transistor has a first end coupled to an output end of the rectifying device, the transistor has a second end coupled to a source line, and a control end of the transistor is coupled to a word line.

Abstract: A silicon carbide crystal includes a seed layer, a bulk layer, and a stress buffering structure formed between the seed layer and the bulk layer. The seed layer, the bulk layer, and the stress buffering structure are each formed with a dopant that cycles between high and low dopant concentration. The stress buffering structure includes a plurality of stacked buffer layers and a transition layer over the buffer layers. The buffer layer closest to the seed layer has the same variation trend of the dopant concentration as the buffer layer closest to the transition layer, and the dopant concentration of the transition layer is equal to the dopant concentration of the seed layer.

Abstract: An electronic apparatus with a cooling system includes a chassis having a mounting slot, and a removable device. The removable device includes a housing detachably disposed in the mounting slot; a first pump disposed in the housing, and detachably affixed to a bottom of the housing; a second pump detachably affixed to the bottom of the housing, and connected to the first pump; and a tank disposed on the first pump and configured to store cooling liquid. when the first pump or the second pump is operating, the cooling liquid in the tank flows into the first pump, and the cooling liquid in the first pump flows into the second pump.

Abstract: The present invention provides a derived peptide of a lactoferrin, a composition comprising the same and a use thereof for promoting and/or increasing lipid synthesis. The derived peptide of the lactoferrin comprises the amino acid sequence of SEQ ID NO: 01.

Abstract: A driving apparatus for a display panel is provided. The driving apparatus for the display panel is configured on a film by means of a Chip-on-Film (COF) package. A selection circuit receives multiple driving voltages. A control circuit is coupled to the selection circuit and controls the selection circuit to output one of the multiple driving voltages, so as to drive the display panel.

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a gate disposed on the semiconductor substrate. The semiconductor device structure also includes a source doped region and a drain doped region on two opposite sides of the gate. The semiconductor device structure further includes a source protective circuit and a drain protective circuit. From a side perspective view, a first drain conductive element of the source protective circuit partially overlaps a first source conductive element of the drain protective circuit.