Patents by Inventor Hua Chen

Hua Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12125193
    Abstract: A method of detecting defects revealed in images of finished products includes importing flawless images into an autoencoder for model training and obtaining reconstructed images from them. The reconstructed images are compared with the flawless images to obtain groups of test errors. An error threshold is selected from the groups of the test errors according to preset rules. In practice, obtaining an image to be tested, and a reconstructed image to be tested, and an error to be tested; determining detection of the image to be tested according to the error and the error threshold; and importing the image into a classifier for defect classification if the image is found to reveal a defect. An electronic device and a non-volatile storage medium for performing the above-described method, are also disclosed.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: October 22, 2024
    Assignee: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: I-Hua Chen, Tung-Tso Tsai, Chin-Pin Kuo, Tzu-Chen Lin
  • Publication number: 20240342786
    Abstract: A power tool has a body, a trigger, a motor, a shaft set, a ball screw, and a pre-fastening module. The pre-fastening module has a first pre-fastening detecting member and a second pre-fastening detecting member. The first pre-fastening detecting member is moved with a connecting shaft of the shaft set in an axial direction. The second pre-fastening detecting member is located on a moving path of the ball screw. When a threaded spindle of the shaft set is inserted in a rivet nut and the connecting shaft is pressed to move inward the body, the first pre-fastening detecting member is moved to align with the second pre-fastening detecting member, and the motor is started automatically to drive the threaded spindle to rotate relative to the rivet nut. The motor will be stopped automatically after the rivet nut is pre-fastened on the threaded spindle, and this is convenient in use.
    Type: Application
    Filed: April 11, 2023
    Publication date: October 17, 2024
    Inventors: Chih-Hua HSU, Liang Huan Chen
  • Publication number: 20240345130
    Abstract: A testing apparatus for a semiconductor package includes a circuit board, testing patterns and a socket. The circuit board has a testing region and includes a plurality of testing contacts and a plurality of signal contacts distributed in the testing region. The testing patterns are embedded in the circuit board and electrically connected to the testing contacts, where each of the testing patterns includes a first conductive line and a second conductive line including a main portion and a branch portion connected to main portion. The first conductive line is connected to the main portion. The socket is located on the circuit board and comprising connectors electrically connected to the circuit board, wherein the connectors are configured to transmit electric signals for testing the semiconductor package from the testing apparatus.
    Type: Application
    Filed: June 26, 2024
    Publication date: October 17, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jian-Ting Chen, Cheng-Han Huang, Kuang-Hua Wang
  • Publication number: 20240347288
    Abstract: A key structure including a base plate, a thin film circuit, a display key, an elastic supporting member, and a lifting mechanism is provided. The thin film circuit is disposed on the base plate. The display key is disposed above the thin film circuit. The elastic supporting member is disposed between the display key and the thin film circuit. The lifting mechanism is disposed between the display key and the base plate.
    Type: Application
    Filed: November 21, 2023
    Publication date: October 17, 2024
    Applicant: Acer Incorporated
    Inventors: Hung-Chi Chen, Cheng-Han Lin, Chuan-Hua Wang, Po-Yi Lee, Pin-Chueh Lin
  • Publication number: 20240346351
    Abstract: The disclosure provides a quantum device and a microwave device. The quantum device includes a first partition, a second partition, an upper circuit board, a lower circuit board and a flexible circuit. The second partition is arranged below the first partition. The first partition and the second partition are used to define an ultra-low temperature chamber of the quantum device. The upper circuit board, the lower circuit board and the flexible circuit are arranged in the ultra-low temperature chamber. The upper circuit board is disposed on a lower surface of the first partition. The lower circuit board is disposed on an upper surface of the second partition. The flexible circuit is electrically connected between the upper circuit board and the lower circuit board to provide multiple signal paths for mutual signal transmission between the upper circuit board and the lower circuit board.
    Type: Application
    Filed: December 27, 2022
    Publication date: October 17, 2024
    Applicant: Industrial Technology Research Institute
    Inventors: Chang-Sheng Chen, Che-Hao Li, Cheng-Hua Tsai, Meng-Hsuan Chen, Wei Chaun Yu, Meng-Sheng Chen
  • Patent number: 12120843
    Abstract: A fan management system includes a fan and a server. The fan includes a driving circuit, and the driving circuit is configured for driving the fan. The fan operates in an operation mode. The server is connected to the fan and is configured for controlling the operation of the fan. The driving circuit outputs a digital label signal when the fan operates abnormally, and the server obtains a production history, an operation information and a warning message of the fan through the digital label signal. The server adjusts the operation mode of the fan according to the warning message simultaneously.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: October 15, 2024
    Assignee: Delta Electronics, Inc.
    Inventors: Chia-Feng Wu, Chien-Sheng Lin, Ming-Lung Liu, Hsin-Ming Hsu, Yun-Hua Chao, Po-Tsun Chen, Yueh-Lung Huang, Jung-Yuan Chen, Yu-Cheng Lin
  • Patent number: 12119946
    Abstract: A power over Ethernet (PoE) power supplying method where power sourcing equipment (PSE) and a powered device exchange link layer discovery protocol data units (LLDPDUs). Each of the LLDPDUs includes two power values. Each of the power values indicates requested or allocated power for one of two sets of cable pairs of the Ethernet twisted pair connecting the PSE and the powered device. Accordingly, the supplied powers to the powered device at sets of cable pairs are independent from each other.
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: October 15, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yan Zhuang, Shiyong Fu, Hua Chen, Xiuju Liang, Jincan Cao, Rui Hua
  • Patent number: 12119384
    Abstract: A semiconductor device includes an isolation structure in a substrate; and a gate structure over an active region of the substrate. The isolation structure surrounds the active region. The gate structure includes a first section parallel to a second section. The semiconductor device further includes a conductive field plate extending between the first section and the second section and overlapping an edge of the active region. A portion of the conductive field plate extends beyond the edge of the active region, The conductive field plate includes a dielectric layer having a first portion and a second portion, and the first portion is thicker than the second portion. The semiconductor device includes a first well overlapping the edge of the active region. The first well extends underneath the isolation structure. The conductive field plate extends beyond an outer-most edge of the first well.
    Type: Grant
    Filed: November 29, 2022
    Date of Patent: October 15, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Po-Yu Chen, Wan-Hua Huang, Jing-Ying Chen
  • Publication number: 20240339424
    Abstract: Embodiments provide a device structure and method of forming a device structure including an infill structure to capture solder materials within confines of openings of the infill structure. Metal pillars of one device can penetrate through a non-conductive film and contact solder regions of another device. A separate underfill is not needed.
    Type: Application
    Filed: August 7, 2023
    Publication date: October 10, 2024
    Inventors: Wei-Yu Chen, Chao-Wei Chiu, Hsin Liang Chen, Hao-Jan Pei, Hsiu-Jen Lin, Ching-Hua Hsieh
  • Publication number: 20240336035
    Abstract: Provided are a chromium-free passivated and film-covered tinned plate, a passivation treatment solution for manufacturing a passivation film, and a manufacturing method for a tinned plate. The chromium-free passivated and film-covered tinned plate comprises a tinned plate and a polyester film laminated on a surface of the tinned plate. The tinned plate comprises a substrate, a tin coating and a passivation film covering a surface of the tin coating. The passivation film does not contain chromium, and contains 2.0-20 mg/m2 of zinc and 10-60 mg/m2 of silicon. A solvent in the passivation treatment solution is water, and the solution contains 0.5-5.0 wt % of a zinc salt and 10-30 wt % of an organosiloxane or a polysiloxane.
    Type: Application
    Filed: October 12, 2022
    Publication date: October 10, 2024
    Inventors: Zhangwei Wang, Junsheng Wei, Peng Li, Hongxing Chen, Hua Ni
  • Publication number: 20240338804
    Abstract: A method for high dynamic range imaging is provided. The method includes the following stages. A first image from a first sensor capable of sensing a first spectrum is received. A second image from a second sensor capable of sensing a second spectrum is received. The second spectrum has a higher wavelength range as compared to the first spectrum. A first image feature from the first image and a second image feature from the second image are retrieved. The first and second images are fused by referencing the first image feature and the second image feature to generate a final image.
    Type: Application
    Filed: April 6, 2023
    Publication date: October 10, 2024
    Inventors: Pin-Wei CHEN, Keh-Tsong LI, Shao-Yang WANG, Chia-Hui KUO, Hung-Chih KO, Yun-I CHOU, Yu-Hua HUANG, Yen-Yang CHOU, Chien-Ho YU, Chi-Cheng JU, Ying-Jui CHEN
  • Publication number: 20240336828
    Abstract: The present disclosure provides an ultra-high temperature resistant cement slurry system for cementing and the preparation method and use thereof. The cement slurry system comprises cement, an ultra-high temperature strength stabilizer, an ultra-high temperature reinforcing material, a density regulator, an ultra-high temperature suspension stabilizer, a dispersant, a fluid loss additive, a retarder, a defoaming agent and water, wherein the ultra-high temperature suspension stabilizer comprises an ether-based starch, an aluminosilicate and a polyalcohol polymer. The method for preparing the cement slurry system includes dry mixing and wet mixing raw materials homogeneously, respectively, and then homogeneously mixing the dry mix and wet mix to obtain the cement slurry system. The present disclosure further provides use of the cement slurry system for cementing in deep wells and ultra-deep wells at high and ultra-high temperatures.
    Type: Application
    Filed: December 2, 2022
    Publication date: October 10, 2024
    Inventors: Jianzhou JIN, Lili CHEN, Yuchao GUO, Hua ZHANG, Fuchen LIU, Yong MA, Yao WANG, Xiaobing ZHANG, Jiaying ZHANG, Zishuai LIU, Haizhi ZHANG, Pu XU, Youzhi ZHENG, Yongjin YU, Congfeng QU, Fengzhong QI, Yong LI, Ming XU, Guifu WANG, Shuoqiong LIU, Chi ZHANG, Bin LYU, Chongfeng ZHOU, Zhiwei DING, Shunping ZHANG, Jiwei JIANG, Qin HAN, Yusi FENG, Chenyang ZHOU, Yiliu SUN, Songbing YAN
  • Patent number: 12112965
    Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.
    Type: Grant
    Filed: February 21, 2023
    Date of Patent: October 8, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Bo Hua Chen, Yan Ting Shen, Fu Tang Chu, Wen-Pin Huang
  • Patent number: 12113005
    Abstract: A method includes forming a plurality of dielectric layers, forming a plurality of redistribution lines in the plurality of dielectric layers, etching the plurality of dielectric layers to form an opening, filling the opening to form a through-dielectric via penetrating through the plurality of dielectric layers, forming an insulation layer over the through-dielectric via and the plurality of dielectric layers, forming a plurality of bond pads in the dielectric layer, and bonding a device to the insulation layer and a portion of the plurality of bond pads through hybrid bonding.
    Type: Grant
    Filed: March 20, 2023
    Date of Patent: October 8, 2024
    Inventors: Ming-Fa Chen, Chen-Hua Yu
  • Publication number: 20240332086
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.
    Type: Application
    Filed: June 10, 2024
    Publication date: October 3, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Po-Ching Su, Yu-Fu Wang, Min-Hua Tsai, Ti-Bin Chen, Chih-Chiang Wu, Tzu-Chin Wu
  • Publication number: 20240327502
    Abstract: The present invention relates to anti-human metapneumovirus (hMPV) antibodies, as well as use of such antibodies in the treatment of viral infections. The invention also includes antigenic hMPV proteins and immunogenic compositions comprising such antigenic hMPV proteins, and the use of such antigenic hMPV proteins and related compositions for preventing or treating viral infection in a subject.
    Type: Application
    Filed: February 8, 2022
    Publication date: October 3, 2024
    Applicant: MERCK SHARP & DOHME LLC
    Inventors: Zhifeng CHEN, Kara S. COX, Arthur FRIDMAN, Jennifer Dawn GALLI, Hua-Poo SU, Aimin TANG, Kalpit VORA, Zhiyun WEN, Xiao XIAO, Lan ZHANG
  • Publication number: 20240332087
    Abstract: A method for fabricating a semiconductor device includes the steps of forming a metal gate on a substrate, a spacer around the metal gate, and a first interlayer dielectric (ILD) layer around the spacer, performing a plasma treatment process to transform the spacer into a first bottom portion and a first top portion, performing a cleaning process to remove the first top portion, and forming a second ILD layer on the metal gate and the first ILD layer.
    Type: Application
    Filed: June 10, 2024
    Publication date: October 3, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Yi-Fan Li, Po-Ching Su, Yu-Fu Wang, Min-Hua Tsai, Ti-Bin Chen, Chih-Chiang Wu, Tzu-Chin Wu
  • Publication number: 20240330024
    Abstract: A method, electronic device, and non-transitory computer readable medium are discussed, an example method includes displaying a first window on a first display, and displaying a second window on a second display. The first window includes first content used as a wallpaper of the first display, or the second window includes second content used as a wallpaper of the second display. The example method includes, in response to an operation of setting first target content as the wallpaper of the second display by a user, displaying a third window on the second display, and displaying the first target content in the third window. The third window covers the second window.
    Type: Application
    Filed: June 12, 2024
    Publication date: October 3, 2024
    Inventors: Hua Jiang, Xiaoxiao Chen, Wenbin You
  • Publication number: 20240332215
    Abstract: A package structure and a method of forming the same are provided. The package structure includes a die, an encapsulant, a redistribution layer (RDL) structure, a passive device, and a plurality of dummy items. The encapsulant laterally encapsulates the die. The RDL structure is disposed on the die and the encapsulant. The passive device is disposed on and electrically bonded to the RDL structure. The plurality of dummy items are disposed on the RDL structure and laterally aside the passive device, wherein top surfaces of the plurality of dummy items are higher than a top surface of the passive device.
    Type: Application
    Filed: June 12, 2024
    Publication date: October 3, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jen-Jui Yu, Ching-Hua Hsieh, Cheng-Ting Chen, Hsiu-Jen Lin, Wei-Yu Chen, Chih-Chiang Tsao, Chao-Wei Chiu
  • Patent number: D1046492
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: October 15, 2024
    Inventor: Hsin-Hua Chen