Abstract: A non-volatile memory device comprises at least one non-volatile memory cell, electrically connected to at least one bit line, a first select line, a second select line, a control line and a common line. Each non-volatile memory cell comprises a first select transistor, having a drain electrically connected to a bit line, and a gate electrically connected to the first select line; a second select transistor, having a source electrically connected to the common line, and a gate electrically connected to the second select line; and a transistor with a floating gate, having a drain electrically connected to a source of the first select transistor, a gate electrically connected to the control line, and a source electrically connected to a drain of the second select transistor; wherein when performing erase or write operation, the second select line is grounded, causing the second select transistor to turn off.

Abstract: Wire grid polarizer and manufacturing method thereof are provided, the wire grid polarizer includes: substrate; first wire grid formed on substrate, including first wire grid reflection strips arranged parallel to each other and at equal intervals; second wire grid formed at a side of first wire grid away from substrate, including second wire grid reflection strips arranged in parallel to each other and at equal intervals; second wire grid reflection strips are in one-to-one correspondence with first wire grid reflection strips; orthographic projections of second wire grid reflection strip onto substrate falls within orthographic projections of corresponding first wire grid reflection strip onto substrate; wire width of second wire grid reflection strip is less than that of first wire grid reflection strip; and wire spacing of second wire grid reflection strip is greater than that of the first wire grid reflection strip.

Abstract: An apparatus supports single root input/output virtualization (SR-IOV) capable devices. The apparatus includes input/output ports, and SR-IOV capable PCIe devices. Each SR-IOV capable PCIe device has one or more namespaces or controller memory buffers. The SR-IOV capable PCIe device provides one or more physical functions and virtual functions that can access the one or more namespaces or controller memory buffers. A PCIe switch controller communicates with host servers coupled to the input/output ports, and assigns one or more virtual functions to each host device, and enables the host devices to access one or more namespaces or controller memory buffers through the assigned virtual functions.

Abstract: A digital compute-in-memory (DCIM) system includes a first DCIM macro. The first DCIM macro includes a first memory cell array and a first arithmetic logic unit (ALU). The first memory cell array has N rows that are configured to store weight data of a neural network in a single weight data download session, wherein N is a positive integer not smaller than two. The first ALU is configured to receive a first activation input, and perform convolution operations upon the first activation input and a single row of weight data selected from the N rows of the first memory cell array to generate first convolution outputs.

Abstract: A device of a New Radio (NR) User Equipment (UE), a system, a method and a machine-readable medium. The device includes a radio frequency (RF) interface and processing circuitry coupled to the RF interface. The processing circuitry is to: cause communication with a NR evolved Node B (gNodeB) on a first bandwidth part (BWP); determine a BWP switching delay for an uplink (UL) communication from the UE to the gNodeB, the BWP switching delay based on a timing advance (TA) for the UL communication; encode the UL communication for transmission to the gNodeB; switch from the first BWP to a second BWP at an expiration of the BWP switching delay; and cause transmission of the UL communication on the second BWP.

Abstract: A semiconductor device and an isolation structure and a contact etch stop layer thereof are provided. According to an embodiment of the present disclosure, a semiconductor device is provided, which includes a first dielectric layer and a second dielectric layer. The first dielectric layer is deposited on the sidewall of an active device or formed in a trench of a gate structure. The second dielectric layer covers the first dielectric layer, wherein the dielectric constant of the first dielectric layer is between 2 and 2.5, and the dielectric constant of the second dielectric layer is less than or equal to 4. In some embodiments, a dielectric bilayer is composed of amorphous boron nitride and crystalline boron nitride.

Abstract: A digital compute-in-memory (DCIM) macro includes a memory cell array and an arithmetic logic unit (ALU). The memory cell array stores weight data of a neural network. The ALU receives parallel bits of a same input channel in an activation input, and generates a convolution computation output of the parallel bits and target weight data in the memory cell array.

Abstract: An antenna structure includes an upper patch antenna, a lower patch antenna, a grounding layer, a transmission line layer, and a first feeding line and a second feeding line passing through the grounding layer. Each of the first feeding line and the second feeding line includes a first portion, a second portion and a third portion. The first portion is disposed between the lower patch antenna and the grounding layer and is perpendicular to the grounding layer. The second portion is disposed between the grounding layer and the transmission line layer and is perpendicular to the grounding layer. The third portion is disposed within the grounding layer and is parallel to the grounding layer. The third portion is coupled between the first portion and the second portion.

Abstract: Optical devices and methods of manufacture are presented in which a multi-tier connector is utilized to transmit and receive optical signals to and from an optical device. In embodiments a multi-tier connection unit receives optical signals from outside of an optical device, wherein the optical signals are originally in multiple levels. The multi-tier connection unit then routes the optical signals into a single level of optical components.

Abstract: Semiconductor structure and methods of forming the same are provided. An exemplary method includes providing a substrate having a first region and a second region, forming an array of memory cells over the first region of the substrate, and forming a memory-level dielectric layer around the array of memory cells. Each of the memory cells includes, from bottom to top, a bottom electrode, a memory material layer stack, and a top electrode. The exemplary method also includes forming a metal line directly interfacing a respective row of top electrodes of the array of memory cells. The metal line also directly interfaces a top surface of the memory-level dielectric layer.

Abstract: A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.

Abstract: Embodiments of this application disclose a backscatter communication method and a related apparatus. The method includes: receiving, by a backscatter device, a first signal from an excitation device, the first signal carries a first sequence determined by the excitation device; modulating, by the backscatter device, backscatter device data to the first signal to obtain a second signal, wherein the backscatter device data is scrambled by the first sequence; backscattering, by the backscatter device, the second signal to a receiving device.

Abstract: An apparatus and system of establishing a Transmission Configuration Indication (TCI) state switch delay are described. The TCI state switch delay for a reference signal (RS) on a component carrier (CC) in intra-band carrier aggregation (CA) is dependent on whether a TCI state indicated in the DCI is known based on a type of Quasi Co-Location (QCL) and whether a common TCI state ID is known on the CC. The delay is known for a delay of QCL-typeD RS on the CC or any other QCL-typeD RS in the CC set that contains the CC. The delay may be based on that of a single CC delay, with the slot where the new TCI state applies determined based on a carrier with a smallest subcarrier spacing (SCS) in the CC or the CC set.

Abstract: Various embodiments herein provide techniques for configuring and/or using a measurement gap (MG) for a positioning reference signal (PRS) measurement. For example. a user equipment (UE) may receive a configuration of a pre-configured measurement gap; identify that a measurement gap is needed for a positioning reference signal (PRS) measurement and that the CE has not previously notified a network of the PRS measurement prior to receipt of the configuration; and encode, based on the identification, a location measurement indication for transmission to a network entity to indicate that the PRS measurement is to be performed. Other embodiments may be described and claimed.

Abstract: A ventilation system comprises a ventilation fan with a lamp for installing to a ceiling having an installation opening. The ventilation fan comprises a housing, a fan module, a power box, a junction box, a lamp module and a support. The housing has a first opening and an air outlet. The fan module comprises an inlet opening and an outlet opening. The outlet opening communicates with the air outlet. The power box has a first circuit board. The lamp module and the housing are located at opposite sides of the installation opening. The junction box is electrically connected to the first circuit board and the lamp module. The impeller comprises a hub, and a ratio of a height of the hub to a height of the housing is less than 0.5. A ratio of a height of the impeller to a height of the housing is greater than 0.65.

Abstract: Disclosed are methods, systems, apparatus, and computer programs for a coordination mechanism between a network and a user equipment (UE) that is configured to perform cross-link interference (CLI) measurements. In one aspect, a method includes generating a message that indicates a capability of a user equipment (UE) whether to support simultaneous reception of at least one signal associated with cross-link interference (CLI) measurement and at least one signal associated with a serving cell or a neighbor cell of the UE. The method further includes transmitting the message to an access node (AN).

Abstract: A head mounted display is provided. The head mounted display includes a first display module, a second display module, an adjustment mechanism, a first frame temple and a second frame temple. The adjustment mechanism is connected to the first display module and the second display module, wherein the adjustment mechanism is adapted to move the first display module and the second display module. The first frame temple is connected to the adjustment mechanism, wherein the first frame temple is adapted to move the adjustment mechanism. The second frame temple is connected to the adjustment mechanism, wherein the second frame temple is adapted to move the adjustment mechanism, the first frame temple and the second frame temple are adapted to rotate between a first posture and a second posture.

Abstract: The present invention is directed to wearable display technologies. More specifically, various embodiments of the present invention provide wearable augmented reality glasses incorporating projection display systems where one or more laser diodes are used as light source for illustrating images with optical delivery to the eye using transparent waveguides. In one set of embodiments, the present invention provides wearable augmented reality glasses incorporating projector systems that utilize transparent waveguides and blue and/or green laser fabricated using gallium nitride containing material. In another set of embodiments, the present invention provides wearable augmented reality glasses incorporating projection systems having digital lighting processing engines illuminated by blue and/or green laser devices with optical delivery to the eye using transparent waveguides.

Abstract: A controller includes a body and a surrounding part. The body has a control area for sending a control signal according to a movement of a thumb of a user. The surrounding part is connected to the body and used to surround and be fixed to a proximal phalange of an index finger of the user. The body is away from a joint between the proximal phalange and a metacarpal bone of the user.