Patents by Inventor Hua Huang

Hua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250060594
    Abstract: The present invention is directed to wearable display technologies. More specifically, various embodiments of the present invention provide wearable augmented reality glasses incorporating projection display systems where one or more laser diodes are used as light source for illustrating images with optical delivery to the eye using transparent waveguides. In one set of embodiments, the present invention provides wearable augmented reality glasses incorporating projector systems that utilize transparent waveguides and blue and/or green laser fabricated using gallium nitride containing material. In another set of embodiments, the present invention provides wearable augmented reality glasses incorporating projection systems having digital lighting processing engines illuminated by blue and/or green laser devices with optical delivery to the eye using transparent waveguides.
    Type: Application
    Filed: August 16, 2024
    Publication date: February 20, 2025
    Applicant: KYOCERA SLD Laser, Inc.
    Inventors: Paul Rudy, James W. Raring, Eric Goutain, Hua Huang
  • Patent number: 12226910
    Abstract: A task execution method and apparatus for robots capable of freely constructing a network, and a storage medium are provided. The method includes: partitioning, by a server, an entire region of a warehouse to obtain local region(s) corresponding to the partitioned warehouse (S10); receiving capability feature information reported by each robot moving freely within a current warehouse range after the robot comes online (S20); determining, according to the capability feature information reported by the robot, a local center robot, and assigning corresponding to-be-executed task(s) to the local region obtained via the partitioning, such that robot(s) freely constructing a local network execute the to-be-executed task(s) (S30); and after the robot(s) have completed the to-be-executed task(s), receiving task completion information reported by a robot, and releasing the robot to be a free moving robot (S40).
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: February 18, 2025
    Assignee: SYRIUS ROBOTICS CO., LTD.
    Inventors: Zhiqin Yang, Hua Huang, Xiangyu Wang
  • Patent number: 12227759
    Abstract: A temperature-sensitive cell culture composition is provided. The temperature-sensitive cell culture composition includes a hydrogel, a cellulose, a gelatin and a collagen. Based on 1 part by weight of the collagen, a content of the hydrogel is between 0.03 parts by weight and 60 parts by weight, a content of the cellulose is between 150 parts by weight and 360 parts by weight, and a content of the gelatin is between 21 parts by weight and 12 parts by weight. In addition, a method for using the temperature-sensitive cell culture composition, a method for forming the temperature-sensitive cell culture composition, and a use of the temperature-sensitive cell culture composition are also provided.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: February 18, 2025
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chia-Jung Lu, Jing-En Huang, Liang-Cheng Su, Hsin-Hsin Shen, Yuchi Wang, Ying-Hsueh Chao, Li-Hsin Lin, Hsiu-Hua Huang
  • Patent number: 12223300
    Abstract: A method of compiling a deep learning model includes reading metadata from a compiled result, the metadata indicating a structure of the deep learning model corresponding to a low-level IR, receiving shape information of an input tensor of the deep learning model, determining a shape of an output tensor of a first computation operation of the computation operations based on the shape information of the input tensor of the deep learning model and the structure of the deep learning model, tiling the output tensor of the first computation operation into one or more tiles according to the shape of the output tensor of the first computation operation and hardware limitations of a processor executing the deep learning model, and patching one or more copies of a templated hardware command into executable hardware commands.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: February 11, 2025
    Assignee: MEDIATEK INC.
    Inventors: Meng-Hsuan Yang, Po-hua Huang, Hsing-Chang Chou, Ting Chen Tsan, Yu-Lung Lu
  • Patent number: 12224287
    Abstract: A display substrate includes a first display region and a second display region. The display substrate may include: a first base substrate; a second base substrate; a first barrier layer and a light emitting unit. The first base substrate includes a first through region penetrating the first base substrate, and the first barrier layer includes a second through region penetrating the first barrier layer. The second base substrate includes a first substrate sub-portion located in the first display region, the first substrate sub-portion penetrates the second through region, and at least a portion of the first substrate sub-portion is located in the first through region. The display substrate includes a recessed portion. The second base substrate includes a first surface located in the first display region and a second surface located in the second display region, and the first surface and the second surface are formed as a flat surface.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: February 11, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiaoyan Zhu, Chuanxiang Xu, Ling Li, Hua Huang
  • Publication number: 20250047038
    Abstract: A plug connector buckle release mechanism and the matching socket connector are disclosed. When the plug connector is inserted into the socket connector to form an electrical connection, hook portions of two arms of the plug connector buckle release mechanism are snapped into respective positioning snap holes of the socket connector to form positioning. When unlocking, pull the pull strap of the plug connector buckle release mechanism to elastically deform two elastic members, causing the stepped push portions of the two arms to resist the push portions of the casing of the plug connector buckle release mechanism to elastically deflect downwards. At this time, the hook portions are detached from the positioning snap holes and lowered into respective through holes of the casing, so that the connector of the plug connector buckle release mechanism can be easily detached from the electrical connection of the socket connector.
    Type: Application
    Filed: May 9, 2024
    Publication date: February 6, 2025
    Inventor: Kuo-Hua HUANG
  • Publication number: 20250047034
    Abstract: A plug connector buckle press release mechanism includes connector including a base block assembled with a cover shell and provided with a docking portion at the front, two positioning portions at two opposite sides and a limiting space in each positioning portion and a mating terminal set mounted in the base block, and buckle assembly includes a connecting portion positioned on base block and two elastic arms respectively located in the limiting spaces of the positioning portions, each elastic arm having a pressing portion exposed to the cover shell and a buckle portion exposed to said cover shell. When the pressing portions are pressed, the elastic arms will elastically deflect inward by a distance with the pressing portions as the axis, thereby forming a locked or unlocked state. A socket connector matching up with the plug connector buckle press release mechanism is also provided.
    Type: Application
    Filed: May 29, 2024
    Publication date: February 6, 2025
    Inventor: Kuo-Hua HUANG
  • Patent number: 12218850
    Abstract: A transmission rate management method is provided. The transmission rate management method is applied to a transmission rate management device. The transmission rate management method includes the steps of calculating a total available data traffic of the transmission rate management device based on a data plan for the transmission rate management device, wherein the total available data traffic corresponds to a period of time; allocating to each of one or more client devices currently connected to the transmission rate management device one available data traffic corresponding to the period of time according to the total available data traffic; and adjusting a transmission rate of a client device of the one or more client devices based on a remaining data traffic of the available data traffic of the client device.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: February 4, 2025
    Assignee: MEDIATEK INC.
    Inventors: Yuan-Ting Huang, Kai-Wen Liu, Yu-Hua Huang
  • Patent number: 12219258
    Abstract: An anti-shake assembly with reduced size is disclosed which includes a circuit board, a photosensitive chip, and a magnetic component. The circuit board includes a first rigid board, a second rigid board, a plurality of connectors, and a plurality of coils. The first rigid board has a housing space. The second rigid board is movably housed in the housing space. The connectors are flexibly connected between the first rigid board and the second rigid board. The photosensitive chip and the coils are provided on the second rigid board. The magnetic component includes a base and a plurality of magnets. The base includes a central plate and a side plate. The side plate is arranged around a periphery of the central plate to form a housing space. The magnets are provided on the central plate facing the housing space. The magnets are arranged opposite to the coils.
    Type: Grant
    Filed: January 9, 2023
    Date of Patent: February 4, 2025
    Assignees: Avary Holding (Shenzhen) Co., Limited., QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD
    Inventors: Cheng-Yi Yang, Qiang Song, Yan-Qiong He, Yao-Cai Li, Biao Li, Zu-Ai Li, Mei-Hua Huang
  • Publication number: 20250040219
    Abstract: A semiconductor device includes an isolation structure in a substrate. The semiconductor device further includes a gate structure over a first region of the substrate, wherein the isolation structure surrounds the first region, the gate structure comprising a first section and a second section. The semiconductor device further includes a conductive field plate over the substrate, the conductive field plate extending between the first section and the second section and overlapping an edge of the first region, wherein the conductive field plate comprises a dielectric layer having a variable thickness. The semiconductor device further includes a first well in the substrate, wherein the first well overlaps the edge of the first region, and the first well extends underneath the isolation structure, and the conductive field plate extends beyond an outer-most edge of the first well.
    Type: Application
    Filed: October 10, 2024
    Publication date: January 30, 2025
    Inventors: Po-Yu CHEN, Wan-Hua HUANG, Jing-Ying CHEN
  • Publication number: 20250036431
    Abstract: This application provides a service widget display method, an electronic device, and a storage medium. The method includes: receiving a first operation of a user in a first state; displaying a first service widget in response to the first operation, where the first service widget includes a first target service; receiving a second operation of the user in a second state; and displaying a second service widget in response to the second operation, where the second service widget includes a second target service; and the first target service is different from the second target service, and one or more of the following information of the electronic device in the first state and the second state are different: a current location and current time of the electronic device.
    Type: Application
    Filed: December 9, 2022
    Publication date: January 30, 2025
    Inventors: Canyang Han, Xiaolong Wang, Hua Huang
  • Patent number: 12211727
    Abstract: In some embodiments, the present disclosure relates to a method that includes aligned a first wafer with a second wafer. The second wafer is spaced apart from the first wafer. The first wafer is arranged on a first electrostatic chuck (ESC). The first ESC has electrostatic contacts that are configured to attract the first wafer to the first ESC. Further, the second wafer is brought toward the first wafer to directly contact the first wafer at an inter-wafer interface. The inter-wafer interface is localized to a center of the first wafer. The second wafer is deformed to gradually expand the inter-wafer interface from the center of the first wafer toward an edge of the first wafer. The electrostatic contacts of the first ESC are turned OFF such that the first and second wafers are bonded to one another by the inter-wafer interface.
    Type: Grant
    Filed: March 29, 2023
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Xin-Hua Huang, Ping-Yin Liu, Chang-Chen Tsao
  • Patent number: 12211700
    Abstract: An example embodiment of the present disclosure involves a method for semiconductor device fabrication. The method comprises providing a structure that includes a conductive component and an interlayer dielectric (ILD) that includes silicon and surrounds the conductive component, and forming, over the conductive component and the ILD, an etch stop layer (ESL) that includes metal oxide. The ESL includes a first portion in contact with the conductive component and a second portion in contact with the ILD. The method further comprises baking the ESL to transform the metal oxide located in the second portion of the ESL into metal silicon oxide, and selectively etching the ESL so as to remove the first portion of the ESL but not the second portion of the ESL.
    Type: Grant
    Filed: May 26, 2023
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chien-Hua Huang, Tzu-Hui Wei, Cherng-Shiaw Tsai
  • Publication number: 20250029934
    Abstract: A light-emitting diode includes: a substrate, an epitaxial layer and a protective layer; the epitaxial layer is disposed on the substrate and includes a first semiconductor layer, an active layer, and a second semiconductor layer stacked sequentially in that order; the protective layer covers the epitaxial layer; the epitaxial layer is divided into chiplets, each chiplet includes transverse and longitudinal sidewalls intersecting in transverse and longitudinal directions, dicing channels are defined between adjacent chiplets, the dicing channels include transverse and longitudinal dicing channels extending respectively in the transverse and longitudinal directions, the protective layer covers the dicing channels and chiplet sidewalls, a patterned structure is disposed on the protective layer in an intersecting area of the transverse and the longitudinal dicing channels, and includes a groove extending toward the substrate.
    Type: Application
    Filed: July 13, 2024
    Publication date: January 23, 2025
    Inventors: Gong CHEN, Yashu ZANG, Chunhsien LEE, Weichun TSENG, Chung-Ying CHANG, Jiming CAI, Shao-hua HUANG, Chunlan HE, Ziyan PAN
  • Patent number: 12207526
    Abstract: Provided are a display substrate, a method for manufacturing a display substrate and a display apparatus. The display substrate includes a base, a drive structure layer disposed on the base, a light emitting element disposed on the drive structure layer, an encapsulation layer disposed on the light emitting element, a circular polarizer layer disposed on the encapsulation layer, and a lens definition layer and a lens structure layer disposed on the circular polarizer layer. The light emitting element includes a pixel definition layer provided with a plurality of sub-pixel openings; the lens structure layer includes a plurality of lenses disposed at intervals, the lens definition layer is disposed in a gap region between adjacent lenses, and an orthographic projection of each lens on the base contains an orthographic projection of a sub-pixel opening on the base.
    Type: Grant
    Filed: January 25, 2021
    Date of Patent: January 21, 2025
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Renquan Gu, Kang Guo, Feng Zhang, Meili Wang, Haitao Huang, Qi Yao, Xin Gu, Hua Huang, Guangcai Yuan, Xue Dong, Libo Wang, Detian Meng
  • Patent number: 12205760
    Abstract: This application provides a wireless charging coil, and an electronic device and an antenna that include the wireless charging coil. The wireless charging coil includes a plurality of coil groups that are at a plurality of layers and that are connected in series, and an insulation layer that is disposed between two layers of the plurality of coil groups. The wireless charging coil includes a first area and a second area that is disposed at an outer periphery of the first area. A plurality of coil groups disposed in the second area are arranged at the plurality of layers, and each coil group includes a plurality of coils wound in parallel at one layer.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: January 21, 2025
    Assignee: Honor Device Co., Ltd.
    Inventors: Hua Huang, Jiaxiang Song, Xialing Zhang, Xing Wang
  • Patent number: 12206047
    Abstract: A light-emitting diode (LED) chip includes a substrate and an epitaxial structure. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer that are sequentially disposed on the substrate in such order. The second semiconductor layer has a light-emitting surface that is opposite to the active layer and that is formed with a microstructure. The microstructure includes a plurality of first protrusions that are separately disposed on the light-emitting surface, and a plurality of second protrusions that are disposed on the first protrusions and on the light-emitting surface between any two adjacent ones of the first protrusions.
    Type: Grant
    Filed: February 22, 2022
    Date of Patent: January 21, 2025
    Assignee: Xiamen Sanan Optoelectronics Technology Co., Ltd.
    Inventors: Poyang Chang, Linrong Cai, Shao-Hua Huang, Liqin Zhu, Shuangliang Liu
  • Publication number: 20250023234
    Abstract: A frame sealing adhesive of the liquid-crystal phase shifter is disposed between two transparent substrates, the frame sealing adhesive encloses a first cavity, a first part of the metal-trace layer is located inside the first cavity, and a second part of the metal-trace layer is located outside the first cavity. The second part is disposed on first surfaces or second surfaces of the two transparent substrates. If the second part is disposed on the first surfaces of the two transparent substrates, metal cushion layers are provided between the frame sealing adhesive and the first surfaces of the two transparent substrates. If the second part is disposed on the second surfaces of the two transparent substrates, the first part and the second part are electrically connected by metal via holes provided in the transparent substrates, and the frame sealing adhesive contacts the first surfaces of the two transparent substrates.
    Type: Application
    Filed: July 27, 2022
    Publication date: January 16, 2025
    Applicant: BOE Technology Group Co., Ltd.
    Inventors: Yong Ma, Hua Huang, Xin Gu, Zhao Kang, Shulei Li, Changhan Hsieh, Chengtan Zhao, Zhao Cui
  • Patent number: D1062342
    Type: Grant
    Filed: September 25, 2024
    Date of Patent: February 18, 2025
    Assignee: HAUSFAME INC.
    Inventor: Hua Huang
  • Patent number: D1062343
    Type: Grant
    Filed: September 25, 2024
    Date of Patent: February 18, 2025
    Assignee: HAUSFAME INC.
    Inventor: Hua Huang