Patents by Inventor Hua Huang

Hua Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11935213
    Abstract: A laparoscopic image smoke removal method based on a generative adversarial network, and belongs to the technical field of computer vision. The method includes: processing a laparoscopic image sample to be processed using a smoke mask segmentation network to acquire a smoke mask image; inputting the laparoscopic image sample to be processed and the smoke mask image into a smoke removal network, and extracting features of the laparoscopic image sample to be processed using a multi-level smoke feature extractor to acquire a light smoke feature vector and a heavy smoke feature vector; and acquiring, according to the light smoke feature vector, the heavy smoke feature vector and the smoke mask image, a smoke-free laparoscopic image by filtering out smoke information and maintaining a laparoscopic image by using a mask shielding effect. The method has the technical effects of robustness and ability of being embedded into a laparoscopic device for use.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: March 19, 2024
    Assignee: Shandong Normal University
    Inventors: Dengwang Li, Pu Huang, Tingxuan Hong, Jie Xue, Hua Lu, Xueyao Liu, Baolong Tian, Changming Gu, Bin Jin, Xiangyu Zhai
  • Publication number: 20240088090
    Abstract: A chip package structure is provided. The chip package structure includes a first substrate. The chip package structure includes a conductive via structure passing through the first substrate. The chip package structure includes a barrier layer over a surface of the first substrate. The chip package structure includes an insulating layer over the barrier layer. The chip package structure includes a conductive pad over the insulating layer. The conductive pad has a first portion passing through the insulating layer and the barrier layer and connected to the conductive via structure. The chip package structure includes a conductive bump over the conductive pad. The chip package structure includes a second substrate. The chip package structure includes an underfill layer between the first substrate and the second substrate.
    Type: Application
    Filed: November 24, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ling-Wei LI, Jung-Hua CHANG, Cheng-Lin HUANG
  • Publication number: 20240088103
    Abstract: Various embodiments of the present disclosure are directed towards a three-dimensional (3D) trench capacitor, as well as methods for forming the same. In some embodiments, a first substrate overlies a second substrate so a front side of the first substrate faces a front side of the second substrate. A first trench capacitor and a second trench capacitor extend respectively into the front sides of the first and second substrates. A plurality of wires and a plurality of vias are stacked between and electrically coupled to the first and second trench capacitors. A first through substrate via (TSV) extends through the first substrate from a back side of the first substrate, and the wires and the vias electrically couple the first TSV to the first and second trench capacitors. The first and second trench capacitors and the electrical coupling therebetween collectively define the 3D trench capacitor.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Xin-Hua Huang, Chung-Yi Yu, Yeong-Jyh Lin, Rei-Lin Chu
  • Publication number: 20240090336
    Abstract: A method for fabricating magnetoresistive random-access memory cells (MRAM) on a substrate is provided. The substrate is formed with a magnetic tunneling junction (MTJ) layer thereon. When the MTJ layer is etched to form the MRAM cells, there may be metal components deposited on a surface of the MRAM cells and between the MRAM cells. The metal components are then removed by chemical reaction. However, the removal of the metal components may form extra substances on the substrate. A further etching process is then performed to remove the extra substances by physical etching.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chang-Lin YANG, Chung-Te LIN, Sheng-Yuan CHANG, Han-Ting LIN, Chien-Hua HUANG
  • Publication number: 20240087879
    Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.
    Type: Application
    Filed: November 14, 2023
    Publication date: March 14, 2024
    Inventors: Xin-Hua Huang, Ping-Yin Liu, Hung-Hua Lin, Hsun-Chung Kuang, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
  • Patent number: 11929217
    Abstract: A light emitting keyboard includes a frame having a translucent frame body, a plurality of key modules each having a keycap, and a backlight module including a light source circuit board, a first light guide plate disposed on top of the light source circuit board, a second light guide plate disposed under the light source circuit board, a plurality of first light-emitting members extending upwardly through the first light guide plate, a plurality of second light-emitting members extending downwardly through the second light guide plate, and a reflector plate disposed under the second light guide plate. Light emitted from the first light-emitting members is transmitted in the first light guide plate and projects upwardly onto the keycaps. Light emitted from the second light-emitting members is transmitted in the second light guide plate is reflected by the reflector plate, and projects onto the frame body.
    Type: Grant
    Filed: September 7, 2023
    Date of Patent: March 12, 2024
    Assignee: Sunrex Technology Corp.
    Inventors: Hua Huang, Jian-Guo Guo
  • Patent number: 11926787
    Abstract: A well cementing method is described for improving cementing quality by controlling the hydration heat of cement slurry. By controlling the degree and/or rate of hydration heat release from cement slurry, the method improves the hydration heat release during formation of cement with curing of cement slurry, improves the binding quality between the cement and the interfaces, and in turn improves the cementing quality at the open hole section and/or the overlap section. The cementing method improves cementing quality of oil and gas wells and reduces the risk of annular pressure.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: March 12, 2024
    Assignees: PetroChina Company Limited, CNPC Engineering Technology R&D Company Limited
    Inventors: Shuoqiong Liu, Hua Zhang, Jianzhou Jin, Ming Xu, Yongjin Yu, Fengzhong Qi, Congfeng Qu, Hong Yue, Youcheng Zheng, Wei Li, Yong Ma, Youzhi Zheng, Zhao Huang, Jinping Yuan, Zhiwei Ding, Chongfeng Zhou, Chi Zhang, Zishuai Liu, Hongfei Ji, Yuchao Guo, Xiujian Xia, Yong Li, Jiyun Shen, Huiting Liu, Yusi Feng, Bin Lyu
  • Publication number: 20240079758
    Abstract: An electronic device includes a metal back cover, a metal frame, and a first, second, third, and fourth radiators. The metal frame includes a discrete part and two connection parts. The connection parts are located by two sides of the discrete part, separated from the discrete part, and connected to the metal back cover. A U-shaped slot is formed between the discrete part and the metal back cover and between the discrete part and the connection parts. The first radiator is separated from the discrete part and includes a feed end. The second, third, and fourth radiators are connected to the discrete part and the metal back cover. The third radiator is located between the first and second radiators. The first radiator is located between the third and fourth radiators. The discrete part and the first, second, third, and fourth radiators form an antenna module together.
    Type: Application
    Filed: August 2, 2023
    Publication date: March 7, 2024
    Applicant: PEGATRON CORPORATION
    Inventors: Chien-Yi Wu, Chao-Hsu Wu, Chih-Wei Liao, Hau Yuen Tan, Shih-Keng Huang, Wen-Hgin Chuang, Lin-Hsu Chiang, Chang-Hua Wu, Han-Wei Wang, Chun-Jung Hu
  • Publication number: 20240076327
    Abstract: The present invention relates to a hexatoxin peptide variant comprising a. an amino acid sequence which is at least 90% identical to any one of SEQ ID NOs: 27 to 29, wherein the amino acid sequence has at least one amino acid variant on position N27; b. an amino acid sequence which is at least 90% identical to any one of SEQ ID NOs: 2, 6, 7, 30 or 32, wherein the amino acid sequence has at least one amino acid variant on position N28; c. an amino acid sequence which is at least 90% identical to any one of SEQ ID NOs: 1, 3, 4, 5, 8 to 24 or 31, wherein the amino acid sequence has at least one amino acid variant on position N29; d. an amino acid sequence which is at least 90% identical to SEQ ID NO: 25, wherein the amino acid sequence has at least one amino acid variant on position N30; e. an amino acid sequence which is at least 90% identical to SEQ ID NOs: 26, wherein the amino acid sequence has at least one amino acid variant on position N31; or f.
    Type: Application
    Filed: December 21, 2021
    Publication date: March 7, 2024
    Applicant: SYNGENTA CROP PROTECTION AG
    Inventors: Aurelien BIGOT, Fides BENFATTI, David J. CRAIK, Yen-Hua HUANG, Quentin KAAS, Conan WANG
  • Patent number: 11923413
    Abstract: Semiconductor structures are provided. The semiconductor structure includes a substrate and nanostructures formed over the substrate. The semiconductor structure further includes a gate structure surrounding the nanostructures and a source/drain structure attached to the nanostructures. The semiconductor structure further includes a contact formed over the source/drain structure and extending into the source/drain structure.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ta-Chun Lin, Kuo-Hua Pan, Jhon-Jhy Liaw, Chao-Ching Cheng, Hung-Li Chiang, Shih-Syuan Huang, Tzu-Chiang Chen, I-Sheng Chen, Sai-Hooi Yeong
  • Patent number: 11924940
    Abstract: The present application provides a lighting apparatus, including a lighting apparatus body and a control circuit built in the lighting apparatus body, where the lighting apparatus body includes a plurality of LED lamps; the control circuit includes a motor drive sub-circuit and an LED drive sub-circuit, and the LED drive sub-circuit is connected to the LED lamps, and configured to provide an LED drive signal for the LED lamps; and the motor drive sub-circuit is configured to be connected to a load motor outside the lighting apparatus body, so as to provide a motor drive signal for the load motor.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: March 5, 2024
    Assignee: Star Mount Enterprise Limited
    Inventors: Xiang Hua Huang, Shou Cheng Wu, Aaron O'Brien
  • Patent number: 11917955
    Abstract: Apparatus, systems and methods for irrigating lands are disclosed. In one example, an irrigation system is disclosed. The irrigation system includes a gate and a microcontroller unit (MCU). The gate is configured for adjusting a water flow for irrigating a piece of land. The MCU is configured for controlling the gate to adjust the water flow based on environmental information related to the piece of land.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ting-Cheng Huang, Tai-Hua Yu, Shui-Ting Yang, Chao-Te Lee, Ching Rong Lu
  • Patent number: 11922072
    Abstract: An apparatus supports single root input/output virtualization (SR-IOV) capable devices. The apparatus includes input/output ports, and SR-IOV capable PCIe devices. Each SR-IOV capable PCIe device has one or more namespaces or controller memory buffers. The SR-IOV capable PCIe device provides one or more physical functions and virtual functions that can access the one or more namespaces or controller memory buffers. A PCIe switch controller communicates with host servers coupled to the input/output ports, and assigns one or more virtual functions to each host device, and enables the host devices to access one or more namespaces or controller memory buffers through the assigned virtual functions.
    Type: Grant
    Filed: September 12, 2022
    Date of Patent: March 5, 2024
    Assignee: H3 Platform Inc.
    Inventors: Chin-Hua Chang, Yao-Tien Huang
  • Patent number: 11920778
    Abstract: A ventilation fan includes a housing having an opening, a grille structure positioned to cover the opening, a fan module provided in the housing and a function module. The grille structure includes a base defining an outlet, and a grille support spaced apart from the base and connected by the connecting columns A radial inlet is formed between the base and the grille support is in communication with the outlet. The base includes a holder having a holding opening axially downward and faced away from the housing. The function module is disposed within the holder through the holding opening.
    Type: Grant
    Filed: September 30, 2022
    Date of Patent: March 5, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yu-Hsiang Huang, Yen-Lin Chen, Chih-Hua Lin
  • Patent number: 11924806
    Abstract: Systems, apparatuses, methods, and computer-readable media are provided for user equipment (UE) idle mode operations. In embodiments, a UE wakes up more than once during a Discontinuous Reception (DRX) cycle. Inter-frequency measurement requirements may be relaxed based on DRX cycle length. Some embodiments include radiofrequency (RF) circuitry warm-up overhead reduction by on-duration separation with RF circuitry switching pattern adaption. Some embodiments include and RF circuitry warm-up overhead reduction by adaptive synchronization signal block (SSB) reference symbol down-selection. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: March 5, 2024
    Assignee: Apple Inc.
    Inventors: Rui Huang, Zhibin Yu, Jie Cui, Yang Tang, Hua Li
  • Patent number: 11923315
    Abstract: Semiconductor package includes a pair of dies, a redistribution structure, and a conductive plate. Dies of the pair of dies are disposed side by side. Each die includes a contact pad. Redistribution structure is disposed on the pair of dies, and electrically connects the pair of dies. Redistribution structure includes an innermost dielectric layer, an outermost dielectric layer, and a redistribution conductive layer. Innermost dielectric layer is closer to the pair of dies. Redistribution conductive layer extends between the innermost dielectric layer and the outermost dielectric layer. Outermost dielectric layer is furthest from the pair of dies. Conductive plate is electrically connected to the contact pads of the pair of dies. Conductive plate extends over the outermost dielectric layer of the redistribution structure and over the pair of dies. Vertical projection of the conductive plate falls on spans of the dies of the pair of dies.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: March 5, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chung-Hao Tsai, Chen-Hua Yu, Chuei-Tang Wang, Wei-Ting Chen, Chien-Hsun Chen, Shih-Ya Huang
  • Publication number: 20240073531
    Abstract: An automatic target image acquisition and calibration system for application in a defect inspection system is disclosed. During the defect inspection system working normally, the automatic target image acquisition and calibration system is configured to find a recognition structure from an article under inspection, and then determines a relative position and a relative 3D coordinate if the article. Therefore, a robotic arm is controlled to carry a camera to precisely face each of a plurality of inspected surfaces of the article, such that a plurality of article images are acquired by the camera. It is worth explaining that, during the defect inspection of the article, there is no need to modulate an image acquiring height and an image acquiring angle of the camera and an illumination of a light source.
    Type: Application
    Filed: August 17, 2023
    Publication date: February 29, 2024
    Inventors: FENG-TSO SUN, YI-TING YEH, FENG-YU SUN, JYUN-TANG HUANG, RONG-HUA CHANG, YI-HSIANG TIEN, MENG-TSE SHEN
  • Publication number: 20240073504
    Abstract: A simple and integrated imaging device for housing motor-switchable and laterally-moving filters between a camera-lens holder and an imaging chip comprises the switchable filters in a cavity and a switching mechanism, and a driving mechanism are also in the cavity. The imaging chip is carried by a flexible printed circuit board. The driving mechanism connected to the switching mechanism drives the switching mechanism to slide back and forth underneath the camera-lens holder, so that either the first or the second switchable filter covers a through hole allowing light to fall on the imaging chip. An electronic device including the imaging device is also disclosed.
    Type: Application
    Filed: November 28, 2022
    Publication date: February 29, 2024
    Inventors: KUN LI, JING GUO, KE-HUA FAN, DING-NAN HUANG
  • Publication number: 20240071965
    Abstract: A package includes a first package component including a semiconductor die, wherein the semiconductor die includes conductive pads, wherein the semiconductor die is surrounded by an encapsulant; an adaptive interconnect structure on the semiconductor die, wherein the adaptive interconnect structure includes conductive lines, wherein each conductive line physically and electrically contacts a respective conductive pad; and first bond pads, wherein each first bond pad physically and electrically contacts a respective conductive line; and a second package component including an interconnect structure, wherein the interconnect structure includes second bond pads, wherein each second bond pad is directly bonded to a respective first bond pad, wherein each second bond pad is laterally offset from a corresponding conductive pad which is electrically coupled to that second bond pad.
    Type: Application
    Filed: August 29, 2022
    Publication date: February 29, 2024
    Inventors: Tung-Liang Shao, Yu-Sheng Huang, Wen-Hao Cheng, Chen-Hua Yu
  • Publication number: 20240073507
    Abstract: A camera module includes a circuit board, a lens assembly, and a first board. The circuit board includes a first surface, a second surface opposite to the first surface, a first sidewall, and a second sidewall opposite to the first sidewall. Each of the first sidewall and the second sidewall connects the first surface to the second surface. The lens assembly is disposed on the first surface. The first board is connected to the first sidewall. The first board is inclined or perpendicular to the first surface. The first board is disposed on a side of the lens assembly.
    Type: Application
    Filed: November 3, 2022
    Publication date: February 29, 2024
    Inventors: DING-NAN HUANG, KE-HUA FAN, KUN LI, JING GUO, HAN-RU ZHANG