Patents by Inventor Hui Cheng

Hui Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11977979
    Abstract: Systems and techniques are provided for generating one or more models. For example, a process can include obtaining a plurality of input images corresponding to faces of one or more people during a training interval. The process can include determining a value of the coefficient representing at least the portion of the facial expression for each of the plurality of input images during the training interval. The process can include determining, from the determined values of the coefficient representing at least the portion of the facial expression for each of the plurality of input images during the training interval, an extremum value of the coefficient representing at least the portion of the facial expression during the training interval. The process can include generating an updated bounding value for the coefficient representing at least the portion of the facial expression based on the initial bounding value and the extremum value.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: May 7, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Kuang-Man Huang, Min-Hui Lin, Ke-Li Cheng, Michel Adib Sarkis
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Publication number: 20240140782
    Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.
    Type: Application
    Filed: January 5, 2024
    Publication date: May 2, 2024
    Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
  • Patent number: 11973005
    Abstract: A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature. The heat sink includes a portion over the first TIM and the second TIM. The adhesive feature is then cured.
    Type: Grant
    Filed: August 3, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hsun Wang, Ping-Yin Hsieh, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 11973067
    Abstract: Methods for manufacturing a display device are provided. The methods include providing a plurality of light-emitting units and a substrate. The methods also include transferring the light-emitting units to a transfer head. The methods further include attaching at least one of the plurality of light-emitting units on the transfer head to the substrate by a bonding process, wherein the transfer head and the substrate satisfy the following equation during the bonding process: 0 ? ? ? T ? ? 1 T ? ? 2 ? A ? ( T ) ? dT - ? T ? ? 1 T ? ? 3 ? E ? ( T ) ? dT ? ? < 0.01 wherein A(T) is the coefficient of thermal expansion of the transfer head, E(T) is the coefficient of thermal expansion of the substrate, T1 is room temperature, T2 is the temperature of the transfer head, and T3 is the temperature of the substrate.
    Type: Grant
    Filed: August 24, 2021
    Date of Patent: April 30, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Fang-Ying Lin, Kai Cheng, Hui-Chieh Wang, Shun-Yuan Hu
  • Patent number: 11968840
    Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yong-Jie Wu, Yen-Chung Ho, Hui-Hsien Wei, Chia-Jung Yu, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
  • Patent number: 11967596
    Abstract: An integrated circuit includes a first-voltage power rail and a second-voltage power rail in a first connection layer, and includes a first-voltage underlayer power rail and a second-voltage underlayer power rail below the first connection layer. Each of the first-voltage and second-voltage power rails extends in a second direction that is perpendicular to a first direction. Each of the first-voltage and second-voltage underlayer power rails extends in the first direction. The integrated circuit includes a first via-connector connecting the first-voltage power rail with the first-voltage underlayer power rail, and a second via-connector connecting the second-voltage power rail with the second-voltage underlayer power rail.
    Type: Grant
    Filed: August 5, 2021
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien, Lee-Chung Lu
  • Patent number: 11964201
    Abstract: A modular pneumatic somatosensory device comprises a main body, a plurality of airbags, a plurality of inflating modules and a control module. The airbags are detachably disposed at different positions of the main body, and at least a part of the airbags have different sizes. The inflating modules are detachably disposed on the main body, and each inflating module is correspondingly connected with at least one of the airbags. The control module is detachably disposed on the main body and is electrically connected with the inflating modules. The control module controls the inflating modules to inflate the corresponding airbags according to a control signal.
    Type: Grant
    Filed: February 3, 2022
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Jen-Hui Chuang, June-Hao Hou, Chi-Li Cheng, Han-Ting Lin
  • Patent number: 11965833
    Abstract: A detection device includes a frame, a transport mechanism, detection mechanisms, and a grasping mechanism. The transport mechanism includes a feeding line, a first flow line, and a second flow line arranged in parallel on the frame. The detection mechanisms are arranged on the frame and located on two sides of the transport mechanism. The grasping mechanism is arranged on the frame and used to transport workpieces on the feeding line to the detection mechanisms, transport qualified workpieces to the first flow line, and transport unqualified workpieces to the second flow line.
    Type: Grant
    Filed: November 26, 2020
    Date of Patent: April 23, 2024
    Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jing-Zhi Hou, Lin-Hui Cheng, Yan-Chao Ma, Jin-Cai Zhou, Zi-Long Ma, Neng-Neng Zhang, Yi Chen, Chen-Xi Tang, Meng Lu, Peng Zhou, Ling-Hui Zhang, Lu-Hui Fan, Shi-Gang Xu, Cheng-Yi Chao, Liang-Yi Lu
  • Publication number: 20240125320
    Abstract: The present invention relates to a high-power five-cylinder drilling pump set, a solid control system and a drilling rig, which belongs to a technical field of oil drilling equipment. The high-power five-cylinder drilling pump set includes: a base, a drilling pump arranged on the base, and a lubricating system arranged on the base, wherein the drilling pump comprises a transmission assembly, a power end assembly and a hydraulic end assembly; the lubricating system comprises a power end lubricating system for lubricating and cooling the transmission assembly as well as the power end assembly, and a hydraulic end lubricating system for lubricating and cooling the hydraulic end assembly. According to the present invention, the high-power five-cylinder drilling pump set has a modular entire structure. In terms of the spatial layout, the present invention can effectively reduce the excessive size of conventional drilling pump or drilling pump structure.
    Type: Application
    Filed: January 25, 2022
    Publication date: April 18, 2024
    Inventors: Fangfang Zhang, Jian Cheng, Junqing Chai, Mingpeng Tang, Hui Zeng
  • Publication number: 20240127111
    Abstract: The present disclosure discloses an Internet-of-Things-oriented machine learning container image download system and a method. The Internet-of-Things-oriented machine learning container image download system includes a master node and a plurality of computing nodes; the master node is configured to store and convert a machine learning model, and build a machine learning container image from the format-converted machine learning model; and issue an image download instruction to each of the computing nodes after image information of the machine learning container image is completely built; and each of the computing nodes is configured to receive the image download instruction, download the machine learning container image, and start a machine learning container; and receive data collected by Internet-of-Things devices, and return a data processing result to the Internet-of-Things devices.
    Type: Application
    Filed: January 9, 2023
    Publication date: April 18, 2024
    Applicant: NANJING UNIVERSITY OF POSTS AND TELECOMMUNICATIONS
    Inventors: Dengyin ZHANG, Zijie LIU, Haoran CHEN, Yi CHENG, Can CHEN, Mengda ZHU, Hui XU
  • Patent number: 11959960
    Abstract: A voltage tracking circuit includes first, second, third and fourth transistors. The first transistor is in a first well, and includes a first gate, a first drain and a first source coupled to a first voltage supply. The second transistor includes a second gate, a second drain and a second source. The second source is coupled to the first drain. The second gate is coupled to the first gate and a pad voltage terminal. The second body terminal is coupled to a first node. The third transistor includes a third gate, a third drain and a third source. The fourth transistor includes a fourth gate, a fourth drain and a fourth source. The fourth drain is coupled to the third source. The fourth source is coupled to the pad voltage terminal. The second transistor is in a second well different from the first well, and is separated from the first well in a first direction.
    Type: Grant
    Filed: May 1, 2023
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsiang-Hui Cheng, Chia-Jung Chang
  • Publication number: 20240118284
    Abstract: The present disclosure relates generally to methods for preparing a tissue sample for detection of the expression of a transmembrane protein in the tissue sample. The present disclosure also provides antibodies and treatments targeting tumor samples expressing the PLXDC1 or the PLXDC2 proteins.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 11, 2024
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Hui SUN, Adrian Chichuen AU, Guo Cheng
  • Patent number: 11953796
    Abstract: A device is provided. The device includes a first Pancharatnam-Berry phase (“PBP”) lens, and a second PBP lens stacked with the first PBP lens. Each of the first PBP lens and the second PBP lens includes a liquid crystal (“LC”) layer. Each side of the LC layer is provided with a continuous electrode and a plurality of patterned electrodes. The patterned electrodes in the first PBP lens are arranged non-parallel to the patterned electrodes in the second PBP lens.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 9, 2024
    Assignee: META PLATFORMS TECHNOLOGIES, LLC
    Inventors: Lu Lu, Xiayu Feng, Hsien-Hui Cheng
  • Patent number: 11955579
    Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: April 9, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Kai Cheng, Tsau-Hua Hsieh, Fang-Ying Lin, Tung-Kai Liu, Hui-Chieh Wang, Chun-Hsien Lin, Jui-Feng Ko
  • Patent number: 11951266
    Abstract: A catheter assembly may include a catheter adapter that includes a distal end, a proximal end, and an inner surface forming a lumen. The lumen may extend between the proximal end and the distal end. The catheter assembly may also include a cannula and a cannula hub. The cannula hub may include an outer portion disposed outside of the catheter adapter and an inner portion disposed within the catheter adapter. The cannula may extend distally from the inner portion. In response to the outer portion sliding proximally along an outer surface of the catheter adapter, the cannula may be withdrawn proximally into the catheter adapter. The outer portion may be configured to slide proximally to a locked position in which the cannula hub is locked with respect to the catheter adapter, and a distal tip of the cannula is disposed within the catheter adapter.
    Type: Grant
    Filed: October 28, 2020
    Date of Patent: April 9, 2024
    Assignee: Becton, Dickinson and Company
    Inventors: Toe Toe Naing, Yun Hui Wong, Kiat Jin Cheng
  • Patent number: 11954020
    Abstract: A memory adaptive temperature controlling method, a storage device, and a control circuit unit are provided. In this exemplary embodiment, the temperature value is obtained according to the temperature measured by the thermal sensor, and the access speed to be reached is calculated according to the temperature change rate within the specific time range and the adjustment percentage when it is determined that the speed-down or speed-up operation is required to be performed. By adjusting the access speed of the memory storage device in a stepwise manner, the temperature of the memory storage device may be stabilized, thereby striking the balance between the temperature stability and the system performance of the memory storage device.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: April 9, 2024
    Assignee: Hefei Core Storage Electronics Limited
    Inventors: Chih-Ling Wang, Qi-Ao Zhu, Xu Hui Cheng
  • Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Publication number: 20240113159
    Abstract: A semiconductor die included in a semiconductor die package may include a plurality of decoupling trench capacitor regions in a device region of the semiconductor die. At least two or more of the decoupling trench capacitor regions include decoupling trench capacitor structures having different depths. The depths of the decoupling trench capacitor structures in the decoupling trench capacitor regions may be selected to provide sufficient capacitance so as to satisfy circuit decoupling parameters for circuits of the semiconductor die package, while reducing the likelihood of warping, breaking, and/or cracking of the semiconductor die package.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 4, 2024
    Inventors: Shu-Hui SU, Hsin-Li CHENG, YingKit Felix TSUI
  • Patent number: 11946161
    Abstract: A method for synthesizing an intergrown twin Ni2Mo6S6O2/MoS2 two-dimensional nanosheet with exposed (00L) crystal planes is disclosed. An Ni—Mo bonded precursor is formed by using an ion insertion method to restrict Ni ions to be located in a lattice matrix of a Mo-based compound; a dinuclear metal sulfide Ni2Mo6S6O2 is formed by precisely adjusting and controlling a concentration of a sulfur atmosphere and utilizing a reconstruction effect of Ni element in the lattice matrix of the Mo-based compound; and meanwhile, a growth direction of Ni2Mo6S6O2 is precisely adjusted and controlled by using a method for growing a single crystal in a limited area, so that Ni2Mo6S6O2 is grown, taking a single crystal MoS2 as a growth template, with the single crystal MoS2 alternately along a crystal plane (110) of the single crystal MoS2, so as to form a twin Ni2Mo6S6O2/MoS2 two-dimensional nanosheet in which Ni2Mo6S6O2 and MoS2 are intergrown.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: April 2, 2024
    Assignee: Institute of Analysis, Guangdong Academy of Sciences (China National Analytical Center, Guangzhou)
    Inventors: Fuxian Wang, Hui Cheng, Liling Wei, Qiong Liu