Abstract: An electrolyte composition comprising a fluoroamino solvent and a lithium salt comprised of boron dissolved in the fluoroamino solvent, the fluoroamino solvent being a fluoroacetamide or fluoroimide may be used as an electrolyte in a secondary battery. The electrolyte composition is useful for lithium ion batteries having an anode comprised of lithium metal and the electrolyte may be present in a lean amount.

Abstract: In one embodiment, an integrated circuit cell includes a first circuit component and a second circuit component. The first circuit component includes fin field-effect transistors (finFETs) formed in a high fin portion of the integrated circuit cell, the high fin portion of the integrated circuit including a plurality of fin structures arranged in rows. The second circuit component that includes finFETs formed in a less fin portion of the integrated circuit cell, the less fin portion of the integrated circuit including a lesser number of fin structures than the high fin portion of the integrated circuit cell.

Abstract: A memory structure includes: first and second word lines; a high-k dielectric layer disposed on the first and second word lines; a channel layer disposed on the high-k dielectric layer and comprising a semiconductor material; first and second source electrodes electrically contacting the channel layer; a first drain electrode disposed on the channel layer between the first and second source electrodes; a memory cell electrically connected to the first drain electrode; and a bit line electrically connected to the memory cell.

Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.

Abstract: A memory device and method of making the same, the memory device including bit lines disposed on a substrate; memory cells disposed on the bit lines; a first dielectric layer disposed on the substrate, surrounding the bit lines and the memory cells; a second dielectric layer disposed on the first dielectric layer; thin film transistors (TFTs) embedded in the second dielectric layer and configured to selectively provide electric power to corresponding memory cells, the TFTs comprising drain lines disposed on the memory cells, source lines disposed on the first dielectric layer, and selector layers electrically connected to the source lines and the drain lines; and word lines disposed on the second dielectric layer and electrically connected to the TFTs.

Abstract: This application provides an information processing method and apparatus, an electronic device, a computer program product, and a non-transitory computer-readable storage medium. The method includes: obtaining an information stream and a promotion video in response to a user trigger operation, the information stream including at least one piece of media information and the promotion video including at least one material to be recommended; and displaying, at a first area of an information stream interface, a first part of the promotion video in a presentation mode and displaying, at a second area of the information stream interface, a second part of the promotion video in a transparent mode, so as to enable the information stream interface to be revealed through the second area, the first area and the second area being dynamically changing areas.

Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.

Abstract: Embodiments of the present application provide a footwear strap and a footwear having the same. Among others, the footwear strap comprises a strap element and a rigid heel structural element; wherein the rigid heel structural element is disposed inside the strap element, and the rigid heel structural element comprises an upper rear portion; when the footwear strap is assembled to a footwear, the upper rear portion extends in a direction from the position where the footwear contacts the heel toward the position where the footwear contacts the toe, and inclines downward of the footwear; the upper rear portion has a convex curvature which is adapted to the shape of the heel so as to facilitate easily receiving the heel; when the footwear strap is assembled to the footwear, an inner lower portion of the convex curvature faces an opening of the footwear.

Abstract: A vertical probe card device and a fence-like probe thereof are provided. The fence-like probe has a probe length within a range from 5 mm to 8 mm. The fence-like probe includes a fence-like segment, a connection segment, and a testing segment. The fence-like segment has an elongated shape defining a longitudinal direction, and the fence-like segment has a penetrating slot and a first protrusion. The penetrating slot is formed along the longitudinal direction and has a length greater than 65% of the probe length. The first protrusion extends from one of two long walls of the penetrating slot by a first predetermined width and is spaced apart from another one of the two long walls of the penetrating slot by a first gap. The connection segment and the testing segment are respectively connected to two end portions of the fence-like segment.

Abstract: A structure includes a circuit substrate, a device, a metal layer, a lid and a thermal interface material layer. The device is disposed on and electrically connected to the circuit substrate. The device includes at least one semiconductor die laterally encapsulated by an insulating encapsulation. The metal layer is covering a back surface of the at least one semiconductor die and the insulating encapsulation. The lid is disposed on the circuit substrate, and the lid is adhered to the metal layer through the thermal interface material layer.

Abstract: A method for forming a package structure is provided. The method includes bonding a package component to a substrate through a plurality of first connectors. The package component comprises a first semiconductor die and a second semiconductor die. The method also includes forming a dam structure over the substrate and surrounding the first connectors. A top surface of the dam structure is lower than a bottom surface of the package component. The method further includes filling an underfill layer in a space between the dam structure and the first connectors. In addition, the method includes removing the dam structure after the underfill layer is formed.

Abstract: The present disclosure provides a method for driving a cholesteric liquid crystal display device. The method includes the following steps: utilizing a driving circuit section to sequentially activate each scanning electrode within a display panel; utilizing the driving circuit section to apply first alternating-current (AC) voltage pulses to pixel circuits on an activated scanning electrode during a first stage within a pulse-width modulation (PWM) scanning procedure of an activated scanning electrode; and utilizing the driving circuit section to apply second AC voltage pulses to the pixel circuits on the activated scanning electrode during a second stage of the PWM scanning procedure. A first voltage amplitude and a first period of the first AC voltage pulses are different from a second voltage amplitude and a second period of the second AC voltage pulses, respectively.

Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.

Abstract: A semiconductor package includes a first semiconductor die, an adhesive layer, a second semiconductor die, a plurality of conductive pillars and an encapsulant. The adhesive layer is adhered to the first semiconductor die. The second semiconductor die is stacked over the first semiconductor die. The conductive pillars surround the first semiconductor die.

Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.

Abstract: An embodiment thermal interface material may include a first component including a first thermal conductivity that is between 20 W/cm·K and 30 W/cm·K and a second component including a second thermal conductivity that is between 30 W/cm·K and 40 W/cm·K. Each of the first component and the second component may include a thermally conductive material including one or more of graphite, graphene, carbon nanotubes, a metal, and a phase change material. For example, each of the first component and the second component include graphite dispersed within a polymer matrix that may include one or more of a hydrogenated hydrocarbon resin, polybutene, polyisobutylene, and an acrylic acid ester copolymer. According to an embodiment, the first component may include 40 wt % to 60 wt % graphite and the second component may include 60 wt % to 70 wt % graphite.

Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.

Abstract: A memory polling method, a memory storage device and a memory control circuit unit are provided. The memory polling method includes: detecting a plurality of busy times corresponding to a plurality of physical units when executing a plurality of first commands; counting the busy times corresponding to the physical units to generate a count statistic value, and determine a delay time based on the count statistic value; and transmitting a plurality of status requests to a rewritable non-volatile memory module after the delay time.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.

Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.