Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of light-emitting elements on a first substrate and forming a first pattern array on a second substrate, wherein the first pattern array includes an adhesive layer. The method also includes transferring the plurality of light-emitting elements from the first substrate to the second substrate and forming the first pattern array on a third substrate. The method includes transferring the plurality of light-emitting elements from the second substrate to the third substrate, and reducing an adhesion force of a portion of the adhesive layer. The method also includes forming a second pattern array on a fourth substrate, and transferring the plurality of light-emitting elements from the third substrate to the fourth substrate. The pitch between the plurality of light-emitting elements on the first substrate is different than the pitch of the first pattern array.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.

Abstract: A memory adaptive temperature controlling method, a storage device, and a control circuit unit are provided. In this exemplary embodiment, the temperature value is obtained according to the temperature measured by the thermal sensor, and the access speed to be reached is calculated according to the temperature change rate within the specific time range and the adjustment percentage when it is determined that the speed-down or speed-up operation is required to be performed. By adjusting the access speed of the memory storage device in a stepwise manner, the temperature of the memory storage device may be stabilized, thereby striking the balance between the temperature stability and the system performance of the memory storage device.

Abstract: A catheter assembly may include a catheter adapter that includes a distal end, a proximal end, and an inner surface forming a lumen. The lumen may extend between the proximal end and the distal end. The catheter assembly may also include a cannula and a cannula hub. The cannula hub may include an outer portion disposed outside of the catheter adapter and an inner portion disposed within the catheter adapter. The cannula may extend distally from the inner portion. In response to the outer portion sliding proximally along an outer surface of the catheter adapter, the cannula may be withdrawn proximally into the catheter adapter. The outer portion may be configured to slide proximally to a locked position in which the cannula hub is locked with respect to the catheter adapter, and a distal tip of the cannula is disposed within the catheter adapter.

Abstract: A semiconductor die included in a semiconductor die package may include a plurality of decoupling trench capacitor regions in a device region of the semiconductor die. At least two or more of the decoupling trench capacitor regions include decoupling trench capacitor structures having different depths. The depths of the decoupling trench capacitor structures in the decoupling trench capacitor regions may be selected to provide sufficient capacitance so as to satisfy circuit decoupling parameters for circuits of the semiconductor die package, while reducing the likelihood of warping, breaking, and/or cracking of the semiconductor die package.

Abstract: A method for synthesizing an intergrown twin Ni2Mo6S6O2/MoS2 two-dimensional nanosheet with exposed (00L) crystal planes is disclosed. An Ni—Mo bonded precursor is formed by using an ion insertion method to restrict Ni ions to be located in a lattice matrix of a Mo-based compound; a dinuclear metal sulfide Ni2Mo6S6O2 is formed by precisely adjusting and controlling a concentration of a sulfur atmosphere and utilizing a reconstruction effect of Ni element in the lattice matrix of the Mo-based compound; and meanwhile, a growth direction of Ni2Mo6S6O2 is precisely adjusted and controlled by using a method for growing a single crystal in a limited area, so that Ni2Mo6S6O2 is grown, taking a single crystal MoS2 as a growth template, with the single crystal MoS2 alternately along a crystal plane (110) of the single crystal MoS2, so as to form a twin Ni2Mo6S6O2/MoS2 two-dimensional nanosheet in which Ni2Mo6S6O2 and MoS2 are intergrown.

Abstract: A method for manufacturing a semiconductor device is provided. The method includes forming a plurality of diodes on a first substrate and forming a first pattern array on a second substrate. The method also includes transferring the plurality of diodes from the first substrate to the second substrate. The method further includes forming the first pattern array on a third substrate. In addition, the method includes transferring the plurality of diodes from the second substrate to the third substrate. The method also includes forming a second pattern array on a fourth substrate. The method further includes transferring the plurality of diodes from the third substrate to the fourth substrate. The pitch between the plurality of diodes on the first substrate is different from the pitch of the first pattern array.

Abstract: The present disclosure relates generally to ex vivo primary tumor models prepared from fresh tumor tissues which are useful for screening anti-cancer agents. The fresh tumor tissues are prepared and cultured under suitable conditions to grow an outgrowth of endothelial cells Killing of these endothelial cells by a candidate agent indicates the efficacy of the agent in inhibiting tumor angiogenesis.

Abstract: A system for manufacturing an integrated circuit includes a processor coupled to a non-transitory computer readable medium configured to store executable instructions. The processor is configured to execute the instructions for generating a layout design of the integrated circuit that has a set of design rules. The generating of the layout design includes generating a set of gate layout patterns corresponding to fabricating a set of gate structures of the integrated circuit, generating a cut feature layout pattern corresponding to a cut region of a first gate of the set of gate structures of the integrated circuit, generating a first conductive feature layout pattern corresponding to fabricating a first conductive structure of the integrated circuit, and generating a first via layout pattern corresponding to a first via. The cut feature layout pattern overlaps a first gate layout pattern of the set of gate layout patterns.

Abstract: A detection device for high-frequency pseudo-random spread spectrum coded sequence signal of shallow geologic body includes a signal transmitter and a synchronous signal receiver. The signal transmitter includes a first Mono-Chip Computer (MCU), a first Field Programmable Gate Array (FPGA), a power amplifier module, a direct-current (DC) power supply, a first display module, a first Global Position System (GPS) synchronization module, a first communication module, and a first memory module. The synchronous signal receiver includes a preamplifier circuit, a bandpass filter circuit, a program-controlled amplifier circuit, an analog to digital (AD) converter circuit, a second FPGA, a second MCU, a second communication module, a second display module, a second GPS synchronization module, and a second memory module. A method using the detection device is further provided.

Abstract: Determining a time-state metric includes receiving a stream of raw data values of an attribute. Each received raw data value of the attribute is associated with a timestamp. It further includes converting the received stream of raw data values into a timeline representation of the attribute over time. The timeline representation comprises a sequence of spans. A span comprises a span start time, a span end time, and a span value. The span value comprises an encoding of one or more values of the attribute over a time interval determined by the span start time and the span end time. It further includes determining a time-state metric according to a timeline request configuration. The timeline request configuration comprises one or more timeline operations. The time-state metric is computed at least in part by performing a timeline operation on the timeline representation of the attribute.

Abstract: Photoelectrochemical (PEC) technology for the conversion of solar energy into chemicals may require cost-effective photoelectrodes to efficiently and stably drive anodic and/or cathodic half-reactions to complete the overall reactions for storing solar energy in chemical bonds. Apparatus and systems incorporating effectively transparent metal catalysts enable the design and/or implementation of PEC devices for light harvesting. Triple-junction photocathodes with the triangular catalyst grids are provided to improve the efficiency of the photocathodes to generate renewable fuel from sunlight.

Abstract: A source driver, including a plurality of channel circuits, each of the plurality of channel circuits including a first digital-to-analog converter (DAC), a second DAC, a first switch, a second switch and an output buffer circuit, is provided. The output terminal of the output buffer circuit is configured to be coupled to a data line of a display panel. An output terminal of the first DAC is coupled to a first input terminal among the input terminals of the output buffer circuit. An output terminal of the second DAC is coupled to a second input terminal among the input terminals of the output buffer circuit. The first switch is disposed along a first signal path between the output terminal of the first DAC and the output terminal of the output buffer circuit. The second switch is disposed along a second signal path between the output terminal of the second DAC and the output terminal of the output buffer circuit.

Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.

Abstract: Some implementations described herein provide techniques and apparatuses for a fixture including a semiconductor die package and methods of formation. The semiconductor die package is mounted to an interposer. In addition to the semiconductor die package, the fixture includes a lid component having a top structure and footing structures that connect the lid component to the interposer. The fixture includes a thermal interface material between a top surface of the semiconductor die package and the top structure of the lid component. The footing structures, connected to the interposer using deposits of an epoxy material, provide increase a structural rigidity of the fixture relative to another fixture not including the footing structures.

Abstract: A double-sided display device includes a first panel, a second panel, a light guide plate and a light source. The second panel is arranged opposite to the first panel. The light guide plate is arranged between the first panel and the second panel, and includes a main body portion including a first surface and a second surface, a first pattern arranged on the first surface, and a second pattern arranged on the second surface. The light source is arranged adjacent to the light guide plate. The first pattern is different from the second pattern.

Abstract: A USB active optical cable and a plug capable of managing power consumption and state. The USB active optical cable and plug respectively comprises a first plug, a second plug, and an optical transmission medium used to connect the first plug and the second plug; the first plug and the second plug are configured to operate different operating states, including an initialization mode, a transmission mode, and a power saving mode, and they can switch between the different operating states. The USB active optical cable and plug are both based on the separate control of the transmitting unit and the receiving unit to distinguish different operating modes, provide necessary operating requirements and mode switching conditions for each mode, and also enable the checking and transmission of the plugging state in the power saving mode, thus facilitate the power consumption management of the active optical cable.

Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.

Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.