Abstract: A semiconductor package includes a redistribution structure, a plurality of semiconductor devices, and a plurality of heat dissipation films. The plurality of semiconductor devices mounted on the redistribution structure. The plurality of heat dissipation films are respectively disposed on and jointly covering upper surfaces of the plurality of semiconductor devices. A plurality of trenches are respectively extended between each two of the plurality of heat dissipations and extended between each two of the plurality of semiconductor devices.

Abstract: A package structure and methods of forming a package structure are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is located aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element. The encapsulant laterally encapsulates the second die and the wall structure.

Abstract: A method of fabricating an integrated fan-out package is provided. A ring-shaped dummy die and a group of integrated circuit dies are mounted over a carrier, wherein the group of integrated circuit dies are surrounded by the ring-shaped dummy die. The ring-shaped dummy die and the group of integrated circuit dies over the carrier are encapsulated with an insulating encapsulation. A redistribution circuit structure is formed on the ring-shaped dummy die, the group of integrated circuit dies and the insulating encapsulation, wherein the redistribution circuit structure is electrically connected to the group of integrated circuit dies, and the ring-shaped dummy die is electrically floating.

Abstract: A hybrid organic-inorganic conductive thin film comprising an organic layer and a plurality of inorganic particles is disclosed, wherein the plurality of inorganic particles comprises a plurality of Cu particles that have an average particle size in a range between 20 nm and 45 nm. This hybrid organic-inorganic conductive thin film is allowed to be used as a hole injection layer (HIL) or a hole transport layer (HTL), so as to be applied in the manufacture of QLED element, OLED element, organic photovoltaic element, hybrid inorganic-organic photovoltaic element, O-FET, O-TFT, or photoreceptor. Moreover, experiment data have proved that, compared to the regular OLED element, the OLED element having the HIL made of the hybrid organic-inorganic conductive thin film has a significant enhancement in device efficiency.

Abstract: An electrical prospecting signal transmission device capable of suppressing electromagnetic coupling interference, including a rectangular wave signal source, an output circuit for supplying power to the ground and a plurality of transmission channels. Each of the plurality of transmission channels includes an isolated driving circuit, a low-pass filter circuit and a power amplification circuit connected sequentially in series. The rectangular wave signal source is configured to generate a rectangular wave or a composite rectangular wave. A signal output terminal of the rectangular wave signal source is connected to an input terminal of the isolated driving circuit, and an output terminal of the power amplification circuit is connected to the output circuit to supply power to the ground.

Abstract: A method for sharing a console variable setting of an application is applied to a plurality of electronic devices. The sharing method includes: generating, by a first electronic device, a meta file, where the meta file has setting parameters for a plurality of first setting options of a first application of the first electronic device; transforming, by the first electronic device, the meta file into a set coding image; and displaying, by the first electronic device, a display frame with the set coding image. Therefore, a second electronic device can automatically adjust setting parameters for a plurality of second setting options of a second application into setting parameters the same as those of the first application by capturing the set coding image in the display frame.

Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.

Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.

Abstract: An embodiment is a device including a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a first side of the package component. The device also includes a metal layer on a second side of the package component, the second side being opposite the first side. The device also includes a thermal interface material on the metal layer. The device also includes a lid on the thermal interface material. The device also includes a retaining structure on sidewalls of the package component and the thermal interface material. The device also includes a package substrate connected to the conductive connectors, the lid being adhered to the package substrate.

Abstract: A method includes placing a package, which includes a first package component, a second package component, and an encapsulant encapsulating the first package component and the second package component therein. The method further includes attaching a first thermal interface material over the first package component, attaching a second thermal interface material different from the first thermal interface material over the second package component, and attaching a heat sink over both of the first thermal interface material and the second thermal interface material.

Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.

Abstract: A structure includes a circuit substrate, a device, a metal layer, a lid and a thermal interface material layer. The device is disposed on and electrically connected to the circuit substrate. The device includes at least one semiconductor die laterally encapsulated by an insulating encapsulation. The metal layer is covering a back surface of the at least one semiconductor die and the insulating encapsulation. The lid is disposed on the circuit substrate, and the lid is adhered to the metal layer through the thermal interface material layer.

Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.

Abstract: A memory adaptive temperature controlling method, a storage device, and a control circuit unit are provided.

Abstract: A device includes a display element and a lens assembly. The lens assembly includes a polarization non-selective partial reflector, a polarization selective reflector and a polarization switch disposed at opposite sides of the polarization non-selective partial reflector, and a polarization selective transmissive lens disposed between the polarization switch and the polarization non-selective partial reflector. The device also includes a controller configured to: during a first sub-frame of a display frame, control the display element to display a first virtual sub-image including content of a first portion of a virtual image, and control the polarization switch to operate in a switching state. The controller is also configured to: during a second sub-frame of the display frame, control the display element to display a second virtual sub-image including content of a second portion of the virtual image, and control the polarization switch to operate in a non-switching state.

Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.

Abstract: A device includes a display element, and a lens assembly coupled with the display element. The lens assembly includes a first polarization selective reflector and a second polarization selective reflector each configured to be switchable between operating in an active state and a non-active state. The lens assembly includes a polarization non-selective partial reflector disposed between the first and second polarization selective reflectors. The device includes a controller configured to control, during a first time period, the display element to display a first virtual object, the first polarization selective reflector to operate in the active state, and the second polarization selective reflector to operate in the non-active state, and control, during a second time period, the display element to display a second virtual object, the first polarization selective reflector to operate in the non-active state, and the second polarization selective reflector to operate in the active state.

Abstract: A device is disclosed herein. The device includes a bias generator, an ESD driver, and a logic circuit. The bias generator includes a first transistor. The ESD driver includes a second transistor and a third transistor coupled to each other in series. The logic circuit is configured to generate a logic control signal. When the first transistor is turned on by a detection signal, the first transistor is turned off.

Abstract: Disclosed herein are methods of treating a tumor in a subject, including administering to the subject one or more miRNA nucleic acids or variants (such as mimics or mimetics) thereof with altered expression in the tumor. Also disclosed herein are compositions including one or more miRNA nucleic acids. In some examples, the miRNA nucleic acids are modified miRNAs, for example, and miRNA nucleic acid including one or more modified nucleotides and/or a 5?-end and/or 3?-end modification. In particular examples, the modified miRNA nucleic acid is an miR-30a nucleic acid. Further disclosed herein are methods of diagnosing a subject as having a tumor with altered expression of one or more miRNA nucleic acids. In some embodiments, the methods include detecting expression of one or more miRNAs in a sample from the subject and comparing the expression in the sample from the subject to a control.

Abstract: A device for reducing turn-off time of a transient electromagnetic transmitting signal includes a transmitting coil, a first electronic switch to control connection mode of the transmitting coil and a second electronic switch configured to form a bridge arm. The transmitting coil is a twisted pair including a first wire and a second wire. The first wire is connected to one end of the second electronic switch. The other end of the second electronic switch is connected to one end of the first electronic switch. The other end of the first electronic switch is connected to the second wire. The connection mode of the transmitting coil includes head-to-head connection, head-to-tail connection and tail-to-tail connection between the first wire and the second wire. The first wire and the second wire are connected to form a transmitting loop.