Patents by Inventor Hui Yu

Hui Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12380515
    Abstract: A method for identifying an optimal corridor width includes: acquiring geographic information data of a target region; evaluating ecosystem service functions of the target region, and constructing an ecological source land in combination with a nature reserve; constructing a resistance surface indicator system, and obtaining a disaster susceptibility distribution result by using geological disaster distribution point data to correct a resistance surface, to thereby obtain a real resistance surface; importing data of the ecological source land and data of the real resistance surface into LINKAGE MAPPER to generate an ecological corridor; constructing an evaluation system of the optimal corridor width based on three aspects of cost-function-ecological benefits, and evaluating the ecological corridor by using an IEW-TOPSIS model to obtain the optimal corridor width of the ecological corridor.
    Type: Grant
    Filed: December 24, 2024
    Date of Patent: August 5, 2025
    Assignees: CHENGDU UNIVERSITY OF TECHNOLOGY, Institute of Mountain Hazzards and Environment, Chinese Academy of Sciences
    Inventors: Yong Luo, Hui Yu, Dianpeng Chen
  • Publication number: 20250240885
    Abstract: A fabric touch panel, includes an upper conductor layer, a middle conductor layer, and a lower conductor layer, the middle conductor layer being a good conductor layer. When the fabric touch panel is subjected to an external force, a first good conductor is in contact with the middle conductor layer, such that a first semiconductor and the middle conductor layer form a first conductive path, and a first conductive resistance value obtained by conduction of the first conductive path uniquely corresponds to a coordinate in a first direction of a plane; and a second good conductor is in contact with the middle conductor layer, such that a second semiconductor and the middle conductor layer form a second conductive path, and a second conductive resistance value obtained by conduction of the second conductive path uniquely corresponds to a coordinate in a second direction of the plane.
    Type: Application
    Filed: August 13, 2024
    Publication date: July 24, 2025
    Inventors: Fei WANG, Juejing DAI, Jiehong ZHENG, Xi WANG, Hui YU
  • Publication number: 20250231697
    Abstract: The present invention discloses a memory access circuit. A command translation circuit translates an access command from a processor to generate access address information matching an encryption/decryption addressing of memory blocks. An address block check circuit determines a security mode according to the access address information to generate mode information. An address generation circuit generates an access block address according to the access address information and the mode information. A command generation circuit generates an actual the access command according to the access block address. An access processing circuit receives an accessed content from a flash memory corresponding to the access block address to perform security processing on the accessed content according to the security mode and the access block address and subsequently perform data recovery according to a data access order of the access command to generate buffered access data to be accessed by the processor.
    Type: Application
    Filed: December 27, 2024
    Publication date: July 17, 2025
    Inventors: YUNG-HUI YU, WEI-JUI CHENG
  • Publication number: 20250224845
    Abstract: A fabric touch device includes an upper conductor layer and a lower conductor layer. The upper conductor layer includes a first semiconductor and a first good conductor drawn out from the first semiconductor. The lower conductor layer includes a second semiconductor and a second good conductor drawn out from the second semiconductor. The upper conductor layer and the lower conductor layer remain isolated when an external force is absent. When any one of planar positions of the fabric touch device is subjected to pressure, the upper conductor layer and the lower conductor layer are in contact with each other through intersection between the first good conductor and the second good conductor, such that the first semiconductor and the second semiconductor form a conductive path, and a conduction resistance value obtained by conducting the first semiconductor and the second semiconductor uniquely corresponds to a coordinate of the planar position.
    Type: Application
    Filed: August 13, 2024
    Publication date: July 10, 2025
    Inventors: Fei WANG, Jiehong ZHENG, Juejing DAI, Hui YU, Xi WANG
  • Patent number: 12353081
    Abstract: A displaying module includes a back plate, a light guide plate fixed to the back plate, a plastic frame covering the back plate and a display panel located on the plastic frame, the plastic frame is of a shape of an annular frame, and the plastic frame includes a bearing face. A first position of the bearing face of the plastic frame is a curved surface, and the curved surface curves in a direction further away from the display panel, whereby a warping degree of the curved surface is a first warping degree, wherein the first position is a position of the bearing face that faces a second position of the display panel, the second position is a position of a region of the display panel where light leakage happens, and the first warping degree is equal to a warping degree of the display panel when the display panel curves.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: July 8, 2025
    Assignees: FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Han Zhang, Kai Diao, Ming Chen, Hongyu Zhao, Dingjie Zheng, Hui Yu, Shuwen Lai
  • Publication number: 20250216605
    Abstract: An optical circuit includes one or more input waveguides, a plurality of output waveguides, and a reflector structure. At least a portion of the reflector structure forms an interface with the one or more input waveguides. The portion of the reflector structure has a smaller refractive index than the one or more input waveguides. An electrical circuit is electrically coupled to the optical circuit. The electrical circuit generates and sends different electrical signals to the reflector structure. In response to the reflector structure receiving the different electrical signals, a carrier concentration level at or near the interface or a temperature at or near the interface changes, such that incident radiation received from the one or more input waveguides is tunably reflected by the reflector structure into a targeted output waveguide of the plurality of output waveguides.
    Type: Application
    Filed: March 17, 2025
    Publication date: July 3, 2025
    Inventors: Yu-Hao Chen, Hui Yu Lee, Jui-Feng Kuan, Chien-Te Wu
  • Patent number: 12341079
    Abstract: A package structure includes a wafer-form semiconductor package and a thermal dissipating system. The wafer-form semiconductor package includes semiconductor dies electrically connected with each other. The thermal dissipating system is located on and thermally coupled to the wafer-form semiconductor package, where the thermal dissipating system has a hollow structure with a fluidic space, and the fluidic space includes a ceiling and a floor. The thermal dissipating system includes at least one inlet opening, at least one outlet opening and a plurality of first microstructures. The at least one inlet opening and the at least one outlet opening are spatially communicated with the fluidic space. The first microstructures are located on the floor, and at least one of the first microstructures is corresponding to the at least one outlet opening.
    Type: Grant
    Filed: May 3, 2022
    Date of Patent: June 24, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee
  • Publication number: 20250189113
    Abstract: A Christmas tree string lights stand includes a first bracket and a second bracket. The first bracket is provided with at least one first terminal, and the second bracket is provided with at least one second terminal. One first terminal is provided with a first metal sheet, and one second terminal is provided with a second metal sheet. The first metal sheet is connected to a first wire extending to an outside of the first terminal, the second metal sheet is connected to a second wire extending to an outside of the second terminal. The first wire is provided with a first interface and a second interface, and the second wire is provided with a third interface. The first terminal is plugged into the second terminal so that the first metal sheet is in contact with the second metal sheet.
    Type: Application
    Filed: February 14, 2025
    Publication date: June 12, 2025
    Inventor: Hui'e Yu
  • Publication number: 20250192088
    Abstract: A structure including a first semiconductor die and a second semiconductor die is provided. The first semiconductor die includes a first bonding structure. The first bonding structure includes a first dielectric layer and first conductors embedded in the first dielectric layer. The second semiconductor die includes a second bonding structure. The second bonding structure includes a second dielectric layer and second conductors embedded in the second dielectric layer. The first dielectric layer is in contact with the second dielectric layer, and the first conductors are in contact with the second conductors. Thermal conductivity of the first dielectric layer and the second dielectric layer is greater than thermal conductivity of silicon dioxide.
    Type: Application
    Filed: February 25, 2025
    Publication date: June 12, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Jeng-Nan Hung, Kuo-Chung Yee, Po-Fan Lin
  • Patent number: 12317965
    Abstract: A quick-release assembly includes an installation main body and a quick-release clamping plate, the installation main body is provided with a groove structure, the groove structure is provided with a first clamping hole and a second clamping hole that are oppositely arranged, and a portion of the second clamping hole is located on a side wall of the groove structure; the quick-release clamping plate matches the groove structure, and a first clamping hook and a second clamping hook are provided on the quick-release clamping plate; the installation main body is provided with a sliding block installed on the installation main body in a sliding manner; an elastic member for providing a driving force for the sliding block is also arranged in the installation main body; and a quick-release button for releasing a locking state of the sliding block is also arranged in the installation main body.
    Type: Grant
    Filed: April 8, 2021
    Date of Patent: June 3, 2025
    Assignees: Fuzhou BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Ming Chen, Nani Liu, Liri Chen, Jie Liu, Hongyu Zhao, Hui Yu, Yuhang Lin, Xiaoyan Tu, Han Zhang, Long Hu, Chengkun Liu
  • Publication number: 20250167145
    Abstract: A package structure is provided. The package structure includes a die, an encapsulant and an RDL structure. The RDL structure is disposed on the die and the encapsulant. The RDL structure includes a first dielectric structure and a first redistribution layer. The first dielectric structure includes a first dielectric material layer and a second dielectric material layer on the first dielectric material layer. The first redistribution layer is embedded in the first dielectric structure and electrically connected to the die. The redistribution layer includes a first seed layer and a first conductive layer surrounded by the first seed layer. A topmost surface of the first seed layer and a topmost surface of the first conductive layer are substantially level with a top surface of the second dielectric material layer.
    Type: Application
    Filed: January 17, 2025
    Publication date: May 22, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Kuo-Chung Yee
  • Publication number: 20250155152
    Abstract: An air supplement control method for an air conditioner, and an air conditioner, a controller and a computer-readable storage medium are provided. The air conditioner includes a compressor, an outdoor heat exchanger, an indoor heat exchanger, an enthalpy-increasing system and a gas bypass. The enthalpy-increasing system is provided with a one-way electromagnetic valve. The one-way electromagnetic valve is arranged on the second refrigerant flow path; and the gas bypass is arranged on the first refrigerant flow path and is positioned between the enthalpy-increasing system and the indoor heat exchanger. The air supplement control method includes acquiring an outdoor ambient temperature and an operating state of the compressor, and controlling the on-off state of the one-way electromagnetic valve according to the outdoor ambient temperature and the operating state.
    Type: Application
    Filed: January 15, 2025
    Publication date: May 15, 2025
    Applicant: GD MIDEA AIR-CONDITIONING EQUIPMENT CO., LTD.
    Inventors: Yangyang YUAN, Haizhao DENG, Hui YU, Si LI
  • Publication number: 20250155147
    Abstract: An ice melting method for an air conditioner, a controller, an air conditioner and a computer-readable storage medium are provided. The air conditioner includes a compressor, an outdoor heat exchanger, an indoor heat exchanger, an enthalpy-increasing system, a water-receiving tray and a gas bypass. The enthalpy-increasing system is provided with a flash evaporator, a one-way electromagnetic valve and a throttling device; a first refrigerant flow path is provided between the outdoor heat exchanger and the indoor heat exchanger; a second refrigerant flow path is provided between the flash evaporator and an enthalpy-increasing port of the compressor; the gas bypass is arranged on the first refrigerant flow path and is positioned between the enthalpy-increasing system and the indoor heat exchanger; the water-receiving tray is positioned below the outdoor heat exchanger; and the gas bypass is arranged on the water-receiving tray.
    Type: Application
    Filed: January 16, 2025
    Publication date: May 15, 2025
    Applicant: GD MIDEA AIR-CONDITIONING EQUIPMENT CO., LTD.
    Inventors: Yangyang YUAN, Haizhao DENG, Hui YU, Si LI
  • Publication number: 20250158004
    Abstract: A method of forming a semiconductor package includes the following steps. A first die and at least one silicon block are provided, wherein the at least one silicon block has an adhesive on a first surface. A first encapsulating material is formed, to encapsulate the first die and the at least one silicon block. A planarization process is performed on the first encapsulating material, wherein a second surface opposite to the first surface of the at least one silicon block is coplanar with a top surface of the first encapsulant.
    Type: Application
    Filed: January 16, 2025
    Publication date: May 15, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Kuo-Chung Yee, Liang-Ju Yen
  • Publication number: 20250146700
    Abstract: An air-conditioning device, a control method and device, and a computer-readable storage medium are provided. The air-conditioning device includes a compressor, a four-way valve, an indoor heat exchanger, an outdoor heat exchanger and a flash evaporator. The four-way valve is connected to the compressor through a first refrigerant branch, and a first control valve is arranged on the first refrigerant branch. A second refrigerant branch is connected in parallel to the first refrigerant branch; and a second control valve, and a hot-gas bypass pipe positioned at the bottom of the outdoor heat exchanger are arranged on the second refrigerant branch. A first refrigerant port of the flash evaporator is connected to the outdoor heat exchanger, a second refrigerant port of the flash evaporator is connected to the indoor heat exchanger, and an air outlet of the flash evaporator is connected to the compressor.
    Type: Application
    Filed: January 13, 2025
    Publication date: May 8, 2025
    Applicant: GD MIDEA AIR-CONDITIONING EQUIPMENT CO., LTD.
    Inventors: Hui YU, Yangyang YUAN
  • Publication number: 20250135036
    Abstract: Among other things, the present disclosure provides oligonucleotides, compositions and methods thereof that can bring about specific editing of a target adenosine in a target RNA molecule. Such oligonucleotides, compositions and methods are useful to treat, prevent, or ameliorate MECP2 associated disorders, diseases and syndromes that can benefit from adenosine modification.
    Type: Application
    Filed: September 26, 2022
    Publication date: May 1, 2025
    Inventors: Christopher Michael Acker, Onanong Chivatakarn, Prashant Monian, Chikdu Shakti Shivalila, Subramanian Marappan, Chandra Vargeese, Pachamuthu Kandasamy, Genliang Lu, Hui Yu, David Charles Donnell Butler, Luciano Henrique Apponi, Mamoru Shimizu, Stephany Michelle Standley, David John Boulay, Andrew Guzior Hoss, Jigar Desai, Jack David Godfrey, Hailin Yang, Naoki Iwamoto, Jayakanthan Kumarasamy, Anthony Lamattina, Ian Chandler Harding, Jesse Turner
  • Publication number: 20250130379
    Abstract: Disclosed are apparatus and methods for a silicon photonic (SiPh) structure comprising the integration of an electrical integrated circuit (EIC); a photonic integrated circuit (PIC) disposed on top of the EIC; two or more polymer waveguides (PWGs) disposed on top of the PIC and formed by layers of cladding polymer and core polymer; and an integration fan-out redistribution (InFO RDL) layer disposed on top of the two or more PWGs. The operation of PWGs is based on the refractive indexes of the cladding and core polymers. Inter-layer optical signals coupling is provided by edge-coupling, reflective prisms and grating coupling. A wafer-level system implements a SiPh structure die and provides inter-die signal optical interconnections among the PWGs.
    Type: Application
    Filed: November 26, 2024
    Publication date: April 24, 2025
    Inventors: Yu-Hao CHEN, Hui-Yu LEE, Chung-Ming WENG, Jui-Feng KUAN, Chien-Te WU
  • Patent number: 12283556
    Abstract: A package structure is provided. The package structure includes a die, an encapsulant and a RDL structure. The RDL structure is disposed on the die and the encapsulant. The RDL structure includes a first dielectric structure and a first redistribution layer. The first dielectric structure includes a first dielectric material layer and a second dielectric material layer on the first dielectric material layer. The first redistribution layer is embedded in the first dielectric structure and electrically connected to the die. The redistribution layer includes a first seed layer and a first conductive layer surrounded by the first seed layer. A topmost surface of the first seed layer and a topmost surface of the first conductive layer are substantially level with a top surface of the second dielectric material layer.
    Type: Grant
    Filed: January 23, 2024
    Date of Patent: April 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chen-Hua Yu, Chun-Hui Yu, Kuo-Chung Yee
  • Patent number: 12283876
    Abstract: Circuits and methods for sensing output current of a power converter, controlling output current in multiple parallel power converters, and enabling reconfigurability of output control for multiple parallel power converters. One embodiment includes a current sensing circuit configured to be coupled to a power converter, the current sensing circuit configured to receive a first voltage representative of an output current of the power converter and output a low-frequency filtered second voltage based on the first voltage and a high-frequency filtered third voltage based on the first voltage. In some embodiments, the first voltage is generated by sensing an output current of the power converter and converting the sensed output current to the first voltage. Other embodiments include a plurality of power stages and corresponding current sensing circuits, wherein the outputs of the low-frequency filters of the current sensing circuits are coupled in common.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: April 22, 2025
    Assignee: pSemi Corporation
    Inventors: Tim Wen Hui Yu, Gregory Szczeszynski
  • Publication number: 20250114318
    Abstract: A composition is provided, wherein the composition includes 70.00-99.00 weight percentage (wt %) of phytopeptide, 0.10-20.00 wt % of branched-chain amino acid, 0.10-20.00 wt % of whey protein concentrate, 0.10-20.00 wt % of creatine, and 0.10-20.00 wt % of chromium yeast. A use of composition as described above is further provided.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 10, 2025
    Inventor: HUI-YU HUNG