Patents by Inventor Hui Yu
Hui Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12026466Abstract: A method for entity relations extraction including applying entity markers to a set of sentences included in a data bag to generate a token sequence for a subset of the set of sentences, the token sequence including a beginning position mark and an ending position mark of a corresponding sentence, as well as a front position mark and a rear position mark of at least one entity included in each of the subset of the set of sentences; using the generated token sequences of the set of sentences with a pre-trained language representation model to generate a sentence feature vector for each sentence included in the data bag; aggregating, in a data encoding module, the sentence feature vectors of the set of sentences into a bag encoding vector; and classifying data entity relations of the set of sentences included in the data bag through decoding and inferencing the bag encoding vector.Type: GrantFiled: March 13, 2023Date of Patent: July 2, 2024Assignee: AILIFE DIAGNOSTICS, INC.Inventors: Yaping Yang, Weizhi Xu, Jiran Zhu, Xia Wang, Hui Yu
-
Patent number: 12029123Abstract: A semiconductor structure includes an optical component and a thermal control mechanism adjacent to the optical component and configured to control a temperature of the optical component. The thermal control mechanism includes a conductive structure, a first thermoelectric member and a second thermoelectric member opposite to the first thermoelectric member. The first thermoelectric member and the second thermoelectric member are electrically connected to the conductive structure. The first thermoelectric member and the second thermoelectric member have opposite conductive types. The semiconductor structure further includes a first dielectric layer surrounding the optical component and a portion of the thermal control mechanism, wherein the conductive structure is over the first dielectric layer, and the first thermoelectric member and the second thermoelectric member are surrounded by the first dielectric layer.Type: GrantFiled: April 22, 2021Date of Patent: July 2, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Hao Chen, Hui Yu Lee, Jui-Feng Kuan
-
Patent number: 12026329Abstract: An input device is provided, which includes a circuit board, a Hall sensor and an input module. The circuit board has a processor and a connector electrically connected to the processor, in which the connector has a plurality of connection terminals. The Hall sensor is disposed on the circuit board. The input module is configured to be assembled on or removed from the circuit board. The input module has a connecting portion, in which when the input module is assembled on the circuit board, the connecting portion touches one group of the connection terminals, and a set of signals is outputted to the processor for the processor to identify the input module. A mouse including the above-mentioned input device is also provided.Type: GrantFiled: June 13, 2023Date of Patent: July 2, 2024Assignee: PRIMAX ELECTRONICS LTD.Inventors: Yung-Tai Pan, Chien-Pang Chien, Tsu-Hui Yu, Tao-Ying Chen, Chun-Che Wu
-
Publication number: 20240213226Abstract: A light-emitting module includes a carrier substrate, a first light-emitting circuit layer, a backboard, a mounting cavity and at least one connection member. The first light-emitting circuit layer is disposed on the carrier substrate. The backboard is disposed on a side of the carrier substrate away from the first light-emitting circuit layer and is in contact with the carrier substrate. The mounting cavity is disposed in at least one of the backboard and the carrier substrate, and an inner wall of the mounting cavity is enclosed by both the backboard and the carrier substrate. A connection member is disposed in the mounting cavity and fixedly connected to the carrier substrate and the backboard.Type: ApplicationFiled: June 30, 2022Publication date: June 27, 2024Applicants: Fuzhou BOE Optoelectronics Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Hui YU, Han ZHANG, Qifei CHEN, Dingjie ZHENG, Ming CHEN, Laiyou CUI, Chengkun LIU
-
Publication number: 20240206802Abstract: A posture stability detection system including a pressure pad, a camera and a processor is provided. The pressure pad is configured to sense a pressure distribution exerted by a to-be-tested subject. The camera is configured to capture a plurality of posture images of the to-be-tested subject. The processor is configured to: obtain a COP position of the to-be-tested subject according to the pressure distribution in a sample; obtain a COP distribution circle of the to-be-tested subject according to the COP positions in several samples; obtain a COP stability value of the to-be-tested subject according to the COP distribution circles; analyze each posture image to obtain a backbone stability value; and, obtain a posture stability value according to the backbone stability value and the COP stability value.Type: ApplicationFiled: May 5, 2023Publication date: June 27, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Hui-Yu CHO, Jian-Hong WU, Ren-Der JEAN, Yao-Hua HO, I-Hung LIAO, Yu-Hsun LEE, Hua-Cheng WENG
-
Patent number: 12018849Abstract: A rear panel assembly includes a rear panel body provided with a vent and a motor bracket arranged at a side of the rear panel body and connected to the rear panel body. The motor bracket is at least partially opposite to the vent, and the motor bracket is provided with an air hole to allow air to flow into the vent through the air hole.Type: GrantFiled: January 17, 2020Date of Patent: June 25, 2024Assignees: GD MIDEA AIR-CONDITIONING EQUIPMENT CO., LTD., MIDEA GROUP CO., LTD.Inventors: Yu Liu, Zhigang Xing, Kangwen Zhang, Zhisheng Lei, Hui Yu
-
Patent number: 12014993Abstract: Provided is a method of fabricating a package including: providing a die with a contact thereon; forming a redistribution layer (RDL) structure on the die, the forming the RDL structure on the die comprising: forming a first dielectric material on the die; forming a conductive feature in and partially on the first dielectric material; after the forming the conductive feature, forming a protective layer on the conductive feature, wherein the protective layer covers a top surface of the conductive feature and extends to cover a top surface of the first dielectric material; forming a second dielectric material on the protective layer; and performing a planarization process to expose the conductive feature; and forming a plurality of conductive connectors to electrically connect the die through the RDL structure.Type: GrantFiled: June 7, 2021Date of Patent: June 18, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Kuo-Chung Yee, Chun-Hui Yu
-
Patent number: 12013144Abstract: A mounting bracket includes a support frame extending in an inside-outside direction and including an outdoor part configured to be arranged outdoors, and a support leg configured to be arranged outdoors. An upper end of the support leg is connected to the outdoor part of the support frame and a lower end of the support leg is configured to directly or indirectly abut against an outer wall surface of a wall body. The outdoor part of the support frame includes a first limiting structure. The support leg includes a second limiting structure provided at the upper end of the support leg. The second limiting structure is in a limiting fit with the first limiting structure to limit a maximum included angle between the support leg and the support frame facing towards an indoor side so as to prevent a rotation angle of the support leg relative to the support frame in a direction facing away from the wall body from exceeding the maximum included angle.Type: GrantFiled: December 9, 2020Date of Patent: June 18, 2024Assignees: GD MIDEA AIR-CONDITIONING EQUIPMENT CO., LTD., MIDEA GROUP CO., LTD.Inventors: Hui Yu, Jianping Meng, Zhigang Xing, Ali Zhao
-
Publication number: 20240194782Abstract: A semiconductor device having an LDMOS transistor can include: a first deep well region having a first doping type; a drift region located in the first deep well region and having a second doping type; and a drain region located in the drift region and having the second doping type, where the second doping type is opposite to the first doping type, and where a doping concentration peak of the first deep well region is located below the drift region to optimize the breakdown voltage and the on-resistance of the LDMOS transistor.Type: ApplicationFiled: February 20, 2024Publication date: June 13, 2024Inventors: Meng Wang, Yicheng Du, Hui Yu
-
Publication number: 20240181788Abstract: Example implementations provide a controller to determine a printing fluid abnormality associated with an ink supply channel of a printer; the controller comprising: an input to receive a signal output by a pressure sensor; the signal being indicative of ink pressure associated with the ink supply channel, and a monitor to determine from a characteristic of the signal the presence of an abnormality in the printing fluid.Type: ApplicationFiled: March 29, 2021Publication date: June 6, 2024Applicant: Hewlett-Packard Development Company, L.P.Inventors: Ana OROPESA FISICA, Dorkaitz Alain VAZQUEZ FERNANDEZ, Alberto BORREGO LEBRATO, Jennifer M. KORNGIEBEL, Alvin Zheng-Hui YU, Miquel BOLEDA BUSQUETS, Ryan SUELZLE
-
Patent number: 11994713Abstract: An optical circuit includes one or more input waveguides, a plurality of output waveguides, and a reflector structure. At least a portion of the reflector structure forms an interface with the one or more input waveguides. The portion of the reflector structure has a smaller refractive index than the one or more input waveguides. An electrical circuit is electrically coupled to the optical circuit. The electrical circuit generates and sends different electrical signals to the reflector structure. In response to the reflector structure receiving the different electrical signals, a carrier concentration level at or near the interface or a temperature at or near the interface changes, such that incident radiation received from the one or more input waveguides is tunably reflected by the reflector structure into a targeted output waveguide of the plurality of output waveguides.Type: GrantFiled: March 20, 2023Date of Patent: May 28, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yu-Hao Chen, Hui Yu Lee, Jui-Feng Kuan, Chien-Te Wu
-
Publication number: 20240171070Abstract: Various examples are provided related to dynamic nonlinear droop control (DNDC). In one embodiment, a method for DNDC for direct current (DC) power conversion includes receiving an indication of an output of a DC power converter, generating a control signal based upon the indication, and adjusting operation of the DC power converter in response to the generated control signal. The indication can be a scaled measurement of output current or output power of the DC power converter. The control signal is based at least in part upon the indication, the power converter voltage and DNDC parameters.Type: ApplicationFiled: November 20, 2023Publication date: May 23, 2024Inventors: Hui Yu, Srdjan Miodrag Lukic, Hao Tu
-
Publication number: 20240170419Abstract: A package structure is provided. The package structure includes a die, an encapsulant and a RDL structure. The RDL structure is disposed on the die and the encapsulant. The RDL structure includes a first dielectric structure and a first redistribution layer. The first dielectric structure includes a first dielectric material layer and a second dielectric material layer on the first dielectric material layer. The first redistribution layer is embedded in the first dielectric structure and electrically connected to the die. The redistribution layer includes a first seed layer and a first conductive layer surrounded by the first seed layer. A topmost surface of the first seed layer and a topmost surface of the first conductive layer are substantially level with a top surface of the second dielectric material layer.Type: ApplicationFiled: January 23, 2024Publication date: May 23, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Chun-Hui Yu, Kuo-Chung Yee
-
Patent number: 11989655Abstract: Embodiments of the present application provide a prediction method, device and system for rock mass instability stages, and belong to the technical field of rock mass instability prediction. The method includes the steps: acquiring acoustic emission signals of rock mass; extracting feature parameters from the acquired acoustic emission signals; and predicting instability stages of the rock mass in accordance with the feature parameters and a preset back propagation (BP) neural network model, wherein the preset BP neural network model is obtained by training a BP neural network and a genetic algorithm by virtue of the feature parameters of the acoustic emission signals at different rock mass instability stages. According to the technical solution in the present application, the problem in the training process of the BP neural network model that model parameter optimization may be easily trapped in a locally optimal solution is effectively solved.Type: GrantFiled: October 26, 2020Date of Patent: May 21, 2024Assignee: JIANGXI UNIVERSITY OF SCIENCE AND TECHNOLOGYInventors: Xiaoyan Luo, Hui Yu, Tao Deng, Junxi Liu, Xuetao Zhang
-
Patent number: 11981098Abstract: A method of coating an edge surface of an optical lens is provided. The method includes providing an optical lens comprising a first optical surface and an opposing second optical surface, wherein the first and the second optical surfaces are connected by an edge surface, disposing at least one temporary protective material on at least a portion of a perimeter portion of one or both of the first and the second optical surfaces abutting the edge surface, disposing at least one coating material on the edge surface of the optical lens to obtain at least one edge coating, and removing any excess coating material disposed on the at least one temporary protective material. An optical lens having at least one temporary protective material disposed on only at least a portion of a perimeter portion of one or both of the first and the second optical surfaces abutting the edge surface is also provided.Type: GrantFiled: March 14, 2019Date of Patent: May 14, 2024Assignee: Essilor InternationalInventors: Mabeline Tan, Hui Yu, Ker Chin Ang, David Herfort
-
Patent number: 11980785Abstract: A foam production method includes mixing liquid nitrogen with a foaming material to produce foam. A gas is produced in situ from liquid nitrogen. As the ratio of the volume of the gas produced by gasification of liquid nitrogen to the volume of the liquid nitrogen is relatively high, when a large gas supply flow is needed to generate a large foam flow, a liquid nitrogen storage device of a small volume can be used instead of bulky air supply devices such as high-pressure gas cylinders, air compressors, air compressor sets and the like, reducing the volume of the air supply device. In addition, the liquid nitrogen used in foaming will release nitrogen gas after the foam blast, such that the nitrogen is also able to inhibit combustion on the surface of burning materials, accelerating the extinguishing of the fire.Type: GrantFiled: January 19, 2023Date of Patent: May 14, 2024Assignees: CHINA PETROLEUM & CHEMICAL CORPORATION, CHINA PETROLEUM & CHEMICAL CORPORATION QINGDAO RESEARCH INSTITUTE OF SAFETY ENGINEERINGInventors: Shanjun Mu, Chunming Jiang, Weihua Zhang, Quanzhen Liu, Xuqing Lang, Xiaodong Mu, Lin Wang, Jingfeng Wu, Longmei Tan, Zuzheng Shang, Rifeng Zhou, Jianxiang Li, Hui Yu
-
Publication number: 20240145559Abstract: A transistor structure includes a substrate, a source electrode, a drain electrode, a protective layer and a gate electrode. The source electrode and the drain electrode are provided on the substrate. The protective layer is provided on the substrate. The protective layer is provided between the source electrode and the drain electrode. The protective layer includes a SiNx layer and a SiOx layer. The SiOx layer is provided on the substrate, the SiNx layer is provided on the SiOx layer, and a through hole of the protective layer is formed to extend through the SiNx layer and the SiOx layer. The gate electrode is provided in the through hole, and the gate electrode is separated from at least part of the SiOx layer so as to form an air gap therebetween.Type: ApplicationFiled: December 21, 2022Publication date: May 2, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chang-Yan HSIEH, Po-Tsung TU, Jui-Chin CHEN, Hui-Yu CHEN, Po-Chun YEH
-
Patent number: 11967644Abstract: A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is in contact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type.Type: GrantFiled: January 11, 2023Date of Patent: April 23, 2024Assignee: Silergy Semiconductor Technology (Hangzhou) LTDInventors: Meng Wang, Yicheng Du, Hui Yu
-
Patent number: 11961789Abstract: A semiconductor package includes a chip, a redistribution structure, and first under-ball metallurgies patterns. The chip includes conductive posts exposed at an active surface. The redistribution structure is disposed on the active surface. The redistribution structure includes a first dielectric layer, a topmost metallization layer, and a second dielectric layer. The first dielectric layer includes first openings exposing the conductive posts of the chip. The topmost metallization layer is disposed over the first dielectric layer and is electrically connected to the conductive posts. The topmost metallization layer comprises first contact pads and routing traces connected to the first contact pads. The second dielectric layer is disposed on the topmost metallization layer and includes second openings exposing the first contact pads. The first under-ball metallurgies patterns are disposed on the first contact pads, extending on and contacting sidewalls and top surfaces of the first contact pads.Type: GrantFiled: October 20, 2020Date of Patent: April 16, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Chun-Hui Yu, Kuo-Chung Yee
-
Publication number: 20240100488Abstract: Provided are a high temperature-resistant composite nanofiltration membrane and a preparation method thereof. The high temperature-resistant composite nanofiltration membrane includes a base membrane and a polyamide membrane arranged on the base membrane; wherein the polyamide membrane is prepared from raw materials comprising: an amine, an inorganic salt, a silane additive, a polyacyl chloride, and an oil phase solvent; and the silane additive is at least one selected from the group consisting of 3-aminopropyltriethoxysilane, divinyltriaminopropyltrimethoxysilane, N-cyclohexyl-?-aminopropyltrimethoxysilane, and trimethoxy[3-(phenylamino)propyl]silane.Type: ApplicationFiled: July 13, 2023Publication date: March 28, 2024Inventors: Hui YU, Hongwei LU, Bo PENG, Qunhui HU, Qian LIAO, Pan HE, Yanbo HE, Jun PENG