Abstract: A semiconductor structure including a substrate, a first dielectric layer, a first conductive feature, an etch stop layer, a second dielectric layer and a second conductive feature is provided. The first dielectric layer is disposed over the substrate. The first conductive feature is disposed in the first dielectric layer. The etch stop layer is disposed over the first dielectric layer and the first conductive feature, wherein the etch stop layer comprises a metal-containing layer and a silicon-containing layer, the metal-containing layer is located between the first dielectric layer and the silicon-containing layer, the metal-containing layer comprises a nitride-containing region and an oxide-containing region, and the nitride-containing region contacts the first conductive feature. The second dielectric layer is disposed over the etch stop layer. The second conductive feature penetrates the second dielectric layer and electrically connects with the first conductive feature.

Abstract: A computing system includes one or more electronic components, a first programmable device, and a baseboard management controller (BMC). The first programmable device is communicatively coupled to a first subset of the one or more electronic components. The first programmable device is configured to detect event activities associated with the first subset and to store the event activities as stored first event data. The BMC includes a system event log. The BMC is communicatively coupled to the first programmable device. The BMC is configured to receive the stored first event data and to write the stored first event data in the system event log.

Abstract: A signal quality optimization system and a signal quality optimization method are provided.

Abstract: Interconnect structures exhibiting reduced accumulation of copper vacancies along interfaces between contact etch stop layers (CESLs) and interconnects, along with methods for fabrication, are disclosed herein. A method includes forming a copper interconnect in a dielectric layer and depositing a metal nitride CESL over the copper interconnect and the dielectric layer. An interface between the metal nitride CESL and the copper interconnect has a first surface nitrogen concentration, a first nitrogen concentration and/or a first number of nitrogen-nitrogen bonds. A nitrogen plasma treatment is performed to modify the interface between the metal nitride CESL and the copper interconnect.

Abstract: The application discloses a mobile communication device and method. The mobile communication method includes: when a collision between third party communication by a third party module and Wi-Fi communication by a Wi-Fi module is detected, determining a next Wi-Fi receiving gain; and adjusting a Wi-Fi receiving gain based on the calculated next Wi-Fi receiving gain to concurrently receive Wi-Fi signals and third party signals.

Abstract: Structures and methods for trench isolation are disclosed. In one example, a silicon-on-insulator (SOI) structure is disclosed. The SOI structure includes: a substrate, a dielectric layer and a polysilicon region. The substrate includes: a handle layer, an insulation layer arranged over the handle layer, a buried layer arranged over the insulation layer, and a trench extending downward from an upper surface of the buried layer and terminating in the handle layer. The dielectric layer is located on a bottom surface of the trench and contacting the handle layer. The polysilicon region is located in the trench and contacting the dielectric layer.

Abstract: The present disclosure provides embodiments of semiconductor devices. In one embodiment, the semiconductor device includes a dielectric layer and a fin-shaped structure disposed over the dielectric layer. The fin-shaped structure includes a first p-type doped region, a second p-type doped region, and a third p-type doped region, and a first n-type doped region, a second n-type doped region, and a third n-type doped region interleaving the first p-type doped region, the second p-type doped region, and the third p-type doped region. The first p-type doped region, the third p-type doped region and the third n-type doped region are electrically coupled to a first potential. The second p-type doped region, the first n-type doped region and the second n-type doped region are electrically coupled to a second potential different from the first potential.

Abstract: A power converter is provided. The power converter includes first to fourth switches electrically connected in series, a flying capacitor and a controller. Positive and negative terminals of the flying capacitor are electrically connected to the second and third switches respectively. The controller operates the first and fourth switches to perform a first complementary switching with a first dead time, and operates the second and third switches to perform a second complementary switching with a second dead time. The controller determines to regulate the first or second dead time by detecting a capacitor voltage of the flying capacitor, such that the capacitor voltage of the flying capacitor is maintained within a balance voltage range.

Abstract: Structures and methods for reducing process charging damages are disclosed. In one example, a silicon-on-insulator (SOI) structure is disclosed. The SOI structure includes: a substrate, a polysilicon region and an etch stop layer. The substrate includes: a handle layer, an insulation layer arranged over the handle layer, and a buried layer arranged over the insulation layer. The polysilicon region extends downward from an upper surface of the buried layer and terminates in the handle layer. The etch stop layer is located on the substrate. The etch stop layer is in contact with both the substrate and the polysilicon region.

Abstract: The present invention provides a control method of aMLD, wherein the MLD includes a first station and a second station. The control method includes: using the first station to wirelessly transmit a first packet; notifying the second station that the first station is transmitting the first packet; determining an upper limit of a RX gain of the second station; determining a first RX gain of the second station according to information of a header of a second packet received by the second station and the upper limit of the RX gain; using the first RX gain to receive a payload of the second packet; and after receiving a notification indicating that a transmission of the first packet is ended, releasing the upper limit of the reception gain of the second station.

Abstract: A wireless earphone with radar capabilities includes a first earphone having a first detection unit and a container. When the first earphone is placed inside the container, a first detection wave generated by the first detection unit passes through the container. The first detection wave is reflected from a human body as a first reflected wave, and when the first detection unit receives the first reflected wave through the container, the first detection unit generates a first detection result data and sends the first detection result data to an external device. The container containing the first earphone allows a user to hold the container with the first earphone within, and since the first earphone continues to detect movements outside of the container, the container is transformed into a multifunctional controller or detector for adapting to new application modes initiated by the external device.

Abstract: The present disclosure provides a neutralizing antibody for flaviviruses, a production method, a method of treating or preventing a flaviviruses infection in a subject, and the use thereof.

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device comprises a first electrical conductor, a first additional electrical conductor, a first active region, a second electrical conductor, a second additional electrical conductor, and a second active region. The first electrical conductor has a first width and extends along a first direction. The first additional electrical conductor has a second width and extends along the first direction. The second width is greater than the first width. The first active region extends along a second direction perpendicular to the first direction. The first active region overlaps the first electrical conductor and the first additional electrical conductor from a top view perspective. The second electrical conductor has the first width and extends along the first direction. The second additional electrical conductor has the second width and extends along the first direction.

Abstract: A computing system including two or more controllers, a universal asynchronous receiver-transmitter (UART) multiplexer, and a combinational logic circuit is provided. The two of more controllers include a first controller and a second controller. The first controller is configured to provide a first status signal and a first select control signal, and the second controller is configured to provide a second status signal and a second select control signal. The UART multiplexer is configured to provide UART output from at least a first UART input and a second UART input based on a UART select signal. The combinational logic circuit is configured to determine the UART select signal is one of the first select control signal or the second select control signal based at least in part on the first status signal and the second status signal.

Abstract: The present disclosure generally relates to a dual free layer two dimensional magnetic recording read head. The read head comprises a first lower shield, a first sensor disposed over the first lower shield, a first upper shield disposed over the first sensor, a read separation gap (RSG) disposed on the first upper shield, a second lower shield disposed on the RSG, a second sensor disposed over the second lower shield, and a second upper shield disposed over the second sensor. In one embodiment, the RSG comprises SiO2 and has a thickness of about 7 nm to about 14 nm. The SiO2 isolates the first sensor from the second sensor, and is a chemical mechanical processing (CMP) stop layer. In another embodiment, the RSG comprises a first sublayer comprising AlOx and a second sublayer comprising SiO2. The thicknesses of the first and second sublayers are based on an adjustable capacitance.

Abstract: A method of preventing drippage in a liquid dispensing system includes generating at least a first proxy signal representing at least a first indirect measure of a position of a first automatic control valve (ACV), wherein the first ACV has positions ranging from fully closed to fully open. The method further includes recognizing, based on at least the first proxy signal, whether a failure state exists in which the first ACV has failed to close. The method further includes causing a second ACV to close when the failure state exists, wherein the second ACV is fluidically connected to the first ACV, and the second ACV has positions ranging from fully closed to fully open.

Abstract: A slurry sprayer for supplying a slurry to a wire saw during ingot slicing is disclosed. The slurry sprayer includes a main body and a cover plate that is detachable from the main body for cleaning the slurry sprayer. In some embodiments, the slurry sprayer includes an adjustable support that allows the incline angle of the sprayer to be adjusted and allows the vertical and horizontal position of the slurry sprayer to be adjusted. In some embodiments, the slurry sprayer includes two feed openings to allow the slurry pressure to be more equalized across the slurry sprayer.

Abstract: The invention provides a chip carrier, a chip testing module and a chip handling module. The chip carrier for carrying a plurality of chips comprises a main body with an upper surface and a lower surface. The main body has a plurality of air guide holes, and two ends of each air guide hole are respectively exposed on the upper surface and the lower surface. A part of the air guide holes are defined as a first group, and the air guide holes of the first group are connected. The main body is made of conductive material.

Abstract: The present disclosure generally relate to a read head and methods of forming thereof. Upon forming a dual free layer (DFL) sensor and a rear hard bias (RHB) structure on a seed layer, a photoresist is deposited on the DFL read head and the RHB structure. A refill layer is deposited on the photoresist and the seed layer adjacent to the DFL sensor and the RHB structure. Portions of the refill layer disposed on one or more sidewalls of the photoresist are removed, and a SiOx cap layer is deposited on the refill layer and on the one or more sidewalls. The photoresist is removed, and the SiOx cap layer and top surfaces of the DFL sensor and the RHB structure are planarized to form a substantially flat topography. The SiOx cap layer acts as a stop layer for the refill layer, and remains in the finished read head.