Patents by Inventor Hung-Yi Lin

Hung-Yi Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090091343
    Abstract: A method for manufacturing a conductive film as well as the structure thereof and a probe card using the same are provided in the invention. The conductive film is substantially a stacked structure of a specific thickness formed by the adhering and stacking of at least an substrate in a vacuum environment by the use of surface processing and mechanical healing whereas each substrate has an array of metal micro-threads formed thereon, in which the plural metal micro-threads, each being wrapped in an insulating film, are arranged on the substrate to form the array in a unidirectional and single-layered manner by the use of a LIGA process and polymer thin film technology. In an exemplary embodiment, the insulating film can be a polymer thin film of high dielectric constant, being made of a material such as polydimethylsiloxane (PDMA) or polyimide (PI); and the metal micro-thread is made of a high conductivity and high strength Ni—Co alloy.
    Type: Application
    Filed: February 15, 2008
    Publication date: April 9, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Tung-Chuan Wu, Min-Chieh Chou, Hung-Yi Lin
  • Patent number: 7514287
    Abstract: A method for reducing dimension of an MEMS device. A single crystalline substrate having a diaphragm is provided. A first-step anisotropic dry etching process is performed to form an opening corresponding to the diaphragm in the back surface, the anisotropic dry etching stopping on a specific lattice plane extending from the edge of the diaphragm. A second-step anisotropic wet etching process is performed to etch the single crystalline substrate along the specific lattice plane until the diaphragm is exposed to form a cavity having a diamond-like shape.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: April 7, 2009
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Ter-Chang Huang, Hung-Yi Lin, Wen-Syang Hsu
  • Patent number: 7510892
    Abstract: A light emitting diode structure has a silicon substrate, a conductive layer, and a light emitting diode. The top surface of the silicon substrate has a cup-structure like paraboloid, and the bottom of the cup-structure has a plurality of through-holes penetrating the silicon substrate. The conductive layer fills up the through-holes and protrudes out from the through-holes. The light emitting diode is disposed on the top of the conductive layer protruding out from the through-holes and is located at the focus of the cup-structure.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: March 31, 2009
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Hung-Yi Lin, Hong-Da Chang
  • Publication number: 20090075406
    Abstract: A method for manufacturing an MEMS device is provided. The method includes steps of a) providing a first substrate having a concavity located thereon, b) providing a second substrate having a connecting area and an actuating area respectively located thereon, c) forming plural microstructures in the actuating area, d) mounting a conducting element in the connecting area and the actuating area, e) forming an insulating layer on the conducting element and f) connecting the first substrate to the connecting area to form the MEMS device. The concavity contains the plural microstructures.
    Type: Application
    Filed: December 2, 2008
    Publication date: March 19, 2009
    Applicant: WALSIN LIHWA CORP.
    Inventors: Mingching Wu, Hsueh-An Yang, Hung-Yi Lin, Weileun Fang
  • Publication number: 20090053425
    Abstract: A method for producing single-dimensioned gold-nano-particle patterns having a single-particle resolution in which the line-width is only limited by the particle size. Initially, a focused electron beam is used to generate a positive charge layer on an SiO2 surface. Biotinated DNA molecules attracted by these positive charges are then used to acquire Au-nano-particles revealing the e-beam exposure patterns. The particles in the single-line patterns become separated in an orderly manner, due to the repulsive force between different Au colloidal particles. Each single-line pattern has potential use in nano-photonics and nano-electronics. In nano-electronics, the line patterns serve as a template for high or low resistance conductive nano-wires. Low resistance wires exhibit linear current-voltage characteristics with an extremely high maximum allowed current density. The high resistance wires display charging effect with clear Coulomb oscillation behavior at low temperatures.
    Type: Application
    Filed: August 21, 2007
    Publication date: February 26, 2009
    Applicant: Academia Sinica
    Inventors: Chii-Dong Chen, Hung-Yi Lin, Li-Chu Tsai
  • Patent number: 7492370
    Abstract: A OSD management method for writing OSD data into a memory, the management method includes: respectively writing a first partial data and a second partial data of the first OSD data into a first memory space and a second memory space of the memory; and respectively writing a third partial data and a fourth partial data of the first OSD data into a third memory space and a fourth memory space of the memory; wherein the first and third memory space associate with a first row address of the memory, and the second and fourth memory space associate with a second row address of the memory.
    Type: Grant
    Filed: March 14, 2005
    Date of Patent: February 17, 2009
    Assignee: MStar Semiconductor, Inc.
    Inventors: Hung-Yi Lin, Jiunn-Kuang Chen
  • Publication number: 20090032832
    Abstract: A light emitting diode structure has a silicon substrate, a conductive layer, and a light emitting diode. The top surface of the silicon substrate has a cup-structure like paraboloid, and the bottom of the cup-structure has a plurality of through-holes penetrating the silicon substrate. The conductive layer fills up the through-holes and protrudes out from the through-holes. The light emitting diode is disposed on the top of the conductive layer protruding out from the through-holes and is located at the focus of the cup-structure.
    Type: Application
    Filed: October 8, 2008
    Publication date: February 5, 2009
    Inventors: Hung-Yi Lin, Hong-Da Chang
  • Patent number: 7456043
    Abstract: A substrate is provided and a plurality of trenches are formed in the front surface of the substrate. Then, a thermal oxide layer is formed on inner walls of the trenches and the front surface of the substrate. Subsequently, a first structural layer is formed on the thermal oxide layer, dopants are implanted into the first structural layer, a second structural layer is formed on the first structural layer, and an annealing process is performed to reduce the stress of the first and second structural layers. Following that, the first and second structural layers are patterned to form diaphragms. Finally, the second structural layer is mounted on a support wafer with a bonding layer, and the back surface of the substrate is etched by deep etching techniques to form back chambers corresponding to the diaphragms. Each back chamber has a vertical sidewall and partially exposes the first structural layer.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: November 25, 2008
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Hung-Yi Lin, Yao-Tian Chow, Pin-Ting Liu
  • Publication number: 20080266305
    Abstract: A display controller for displaying multiple windows and associated memory access method are provided. The display controller receives a first video source and a second video source for displaying multiple windows, and includes a line buffer, a deinterlacer, a scaler, and a memory interface unit. The line buffer buffers pixel data of a non-overlapped area of a main image associated with the first video source, and pixel data of a sub image associated with the second video source. The deinterlacer is coupled to the line buffer for selectively deinterlacing data in the line buffer. The scaler is coupled to the deinterlacer for selectively scaling data outputted from the deinterlacer. The memory interface unit is coupled to the line buffer for accessing an external memory.
    Type: Application
    Filed: April 30, 2008
    Publication date: October 30, 2008
    Inventors: Kun-Nan Cheng, Yuan-Chuan Hsu, Hung-Yi Lin, Chung-Ching Chen
  • Publication number: 20080210963
    Abstract: A light emitting diode package structure has a silicon substrate, a plurality of cup-structures on the silicon substrate, a plurality of conductive patterns disposed on the silicon substrate, one of a plurality of light emitting diodes respectively disposed on each cup-structure and a plurality of wires electrically connected to the light emitting diodes and the conductive patterns. The light emitting diodes are electrically connected in series through the conductive wires and the conductive patterns.
    Type: Application
    Filed: August 20, 2007
    Publication date: September 4, 2008
    Inventors: Hung-Yi Lin, Hong-Da Chang
  • Publication number: 20080197370
    Abstract: A light emitting diode structure has a silicon substrate, a conductive layer, and a light emitting diode. The top surface of the silicon substrate has a cup-structure like paraboloid, and the bottom of the cup-structure has a plurality of through-holes penetrating the silicon substrate. The conductive layer fills up the through-holes and protrudes out from the through-holes. The light emitting diode is disposed on the top of the conductive layer protruding out from the through-holes and is located at the focus of the cup-structure.
    Type: Application
    Filed: April 18, 2007
    Publication date: August 21, 2008
    Inventors: Hung-Yi Lin, Hong-Da Chang
  • Publication number: 20080191605
    Abstract: A white light emitting diode package structure having a silicon substrate is disclosed. The white light emitting diode package structure comprises a silicon substrate having a plurality of cup-structures thereon, one of a plurality of blue light emitting diodes is respectively disposed in each cup-structure, and a phosphor structure covering the silicon substrate and the cup-structures. The blue light emitting diodes have various wavelengths and the phosphor structure has a plurality of kinds of phosphor powders and a sealing material. Each kind of phosphor powder is able to convert blue light within a certain wavelength into yellow light.
    Type: Application
    Filed: April 18, 2007
    Publication date: August 14, 2008
    Inventors: Hung-Yi Lin, Hong-Da Chang
  • Publication number: 20080194054
    Abstract: An LED array package structure having a silicon substrate is disclosed. The LED array package structure comprises a silicon substrate having a plurality of cup-structures thereon, a reflective layer disposed on the silicon substrate, a transparent insulation layer disposed on the reflective layer, a conductive layer disposed on the transparent insulation layer and a plurality of LEDs disposed respectively on the conductive layer in each cup-structures.
    Type: Application
    Filed: April 16, 2007
    Publication date: August 14, 2008
    Inventors: Hung-Yi Lin, Hong-Da Chang
  • Patent number: 7392687
    Abstract: A piezoresistive pressure sensor test sample is first provided, and a zero offset of the piezoresistive pressure sensor test sample is measured. Subsequently, a stress deviation corresponding to the zero offset is calculated. Thereafter, at least a piezoresistive pressure sensor under the same process condition as the piezoresistive pressure sensor test sample is formed. When forming the piezoresistive pressure sensor, at least a stress-adjusting thin film is formed on at least a surface of the piezoresistive pressure sensor to calibrate the zero offset of the piezoresistive pressure sensor.
    Type: Grant
    Filed: September 13, 2005
    Date of Patent: July 1, 2008
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Ter-Chang Huang, Hung-Yi Lin, Wen-Syang Hsu
  • Publication number: 20080017963
    Abstract: Disclosed herein is a structure of opto-electronic package having Si-substrate. The Si-substrates are manufactured in batch utilizing the micro-electromechanical processes or the semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Base on the material characteristic of the Si-substrate, and the configuration of the components, such as the connecters, opto-electronic devices, depressions, solder bumps, etc., the present invention can improve the optical effect, the heat dissipating effect, and the reliability of the opto-electronic package structure, and simplifies the complexity of the opto-electronic package structure.
    Type: Application
    Filed: December 19, 2006
    Publication date: January 24, 2008
    Inventor: Hung-Yi Lin
  • Publication number: 20080017880
    Abstract: Disclosed herein is a structure of an opto-electronic package having a Si-substrate. Si-substrates are manufactured in batch utilizing micro-electromechanical processes or semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Based on the material characteristics of the Si-substrate, and the configuration of the components, such as the connecters, opto-electronic devices, depressions, solder bumps, etc., the present invention can improve the optical effect, the heat dissipating effect, and the reliability of the structure of opto-electronic package, and simplifies the complexity of the structure of opto-electronic package.
    Type: Application
    Filed: December 19, 2006
    Publication date: January 24, 2008
    Inventor: Hung-Yi Lin
  • Publication number: 20080017962
    Abstract: Disclosed herein is a structure of opto-electronic package having a Si-substrate. The Si-substrates are manufactured in batch utilizing the micro-electromechanical processes or the semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Based on the material characteristic of the Si-substrate, and the configuration of the components, such as the connecters, opto-electronic devices, depressions, solder bumps, etc., the present invention can improve the optical effect, the heat dissipating effect, and the reliability of the opto-electronic package structure, and simplifies the complexity of the opto-electronic package structure.
    Type: Application
    Filed: December 18, 2006
    Publication date: January 24, 2008
    Inventor: Hung-Yi Lin
  • Publication number: 20080017876
    Abstract: Disclosed herein is a structure of an opto-electronic package having a Si-substrate. Si-substrates are manufactured in batch utilizing micro-electromechanical processes or semiconductor processes, so that these Si-substrates are made with great precision and full of varieties. Based on the material characteristic of the Si-substrate, and the configuration of the components, such as the connecters, opto-electronic devices, depressions, solder bumps, etc., the present invention can improve the optical effect, the heat dissipating effect, and the reliability of the structure of opto-electronic package, and simplifies the complexity of the structure of opto-electronic package.
    Type: Application
    Filed: December 19, 2006
    Publication date: January 24, 2008
    Inventor: Hung-Yi Lin
  • Publication number: 20070190536
    Abstract: A pattern transfer method includes providing a substrate, forming a first biomaterial over the substrate, exposing the first biomaterial to a pattern writing agent in a manner consistent with a pattern to be transferred, forming a second biomaterial over the first biomaterial, wherein the second biomaterial reacts and bonds with portions of the first biomaterial not exposed to the pattern writing agent, and does not react and bond with portions of the first biomaterial exposed to the pattern writing agent.
    Type: Application
    Filed: February 16, 2006
    Publication date: August 16, 2007
    Inventors: Chii-Dong Chen, Hung-Yi Lin, Pei-Yin Chi, Li-Chu Tsai
  • Patent number: D580929
    Type: Grant
    Filed: November 27, 2006
    Date of Patent: November 18, 2008
    Assignee: Kinpo Electronics, Inc.
    Inventors: Lin-Yu Kao, Hung-Yi Lin