Abstract: A device comprises source/drain regions over a substrate and spaced apart along a first direction, a first gate structure between the source/drain regions, and a first channel structure surrounded by the first gate structure. The first channel structure comprises alternately stacking first semiconductor layers and second semiconductor layers. When viewed in a cross section taken along a second direction perpendicular to the first direction, central axes of the second semiconductor layers are laterally offset from central axes of the first semiconductor layers.

Abstract: A method for generating an output image from an input image and an input text instruction that specifies a location and a modification of an edit applied to the input image using a neural network is described. The neural network includes an image encoder, an image decoder, and an instruction attention network. The method includes receiving the input image and the input text instruction; extracting, from the input image, an input image feature that represents features of the input image using the image encoder; generating a spatial feature and a modification feature from the input text instruction using the instruction attention network; generating an edited image feature from the input image feature, the spatial feature and the modification feature; and generating the output image from the edited image feature using the image decoder.

Abstract: A method for performing radio resource allocation in a TN-NTN mixed system is provided. The system includes a satellite that covers an NTN cell, and a plurality of TN base stations (TN BSs) within a coverage of the satellite. The NTN cell serves a plurality of NTN user equipments (NTN UEs). The method includes dividing the plurality of NTN UEs into X NTN UE groups; partitioning a radio resource into M parts, where M?X; dividing the plurality of TN BSs into M TN BS groups; deciding radio resource allocation regarding the plurality of NTN UEs, by allocating an i-th part of the radio resource to an i-th NTN UE group, where i=1, 2, . . . , X; and deciding radio resource allocation regarding the plurality of TN BSs, by allocating a sum of a j-th to an M-th parts of the radio resource to a j-th TN BS group, where j=1, 2, . . . , M.

Abstract: Buffing of a footwear component allows for an alteration of the component surface to achieve an intended surface for aesthetics and/or manufacturing purposes. The buffing is performed in a system having a vision module, a sidewall buffing module, an up surface buffing module, and a down surface buffing module. Each of the buffing modules are adapted for the unique shape and sizes of a footwear component to effectively and automatically buff the footwear component.

Abstract: This disclosure provides a method, an apparatus, and a non-transitory computer-readable medium for radio resource allocation for a terrestrial network (TN) cell. In the method, the TN cell is determined to be outside a coverage of a first non-terrestrial network (NTN) cell. In response to the TN cell being outside the coverage of the first NTN cell, a radio resource is allocated to the TN cell based on a radio resource of the first NTN cell.

Abstract: The present invention relates to a driving method for flicker suppression of a display panel and a driving circuit thereof. The driving circuit includes a source driving circuit and a common voltage generating circuit. The driving method includes driving the source driving circuit to generate at least one first source signal and at least one second source signal, the first source signal corresponds to at least one first pixel on a first scanning line; the second source signal corresponds to at least one second pixel on a second scanning line. The common voltage generating circuit generates at least one common voltage. While driving the first pixel and the second pixel to display the same gray scale image, the first source signal is not equal to the second source signal, or a first common voltage and a second common voltage generated by the common voltage generating circuit are different.

Abstract: There is provided an optical engine for a navigation device including a first light source, a second light source, a lens, a barrier structure and an image sensor. The barrier structure has a first space for containing the first light source, a second space for containing the lens and a third space for containing the second light source and the image sensor. The reflected light associated with the first light source propagates to the image sensor via the lens in the second space. The reflected light associated with the second light source propagates to the image sensor via the third space without passing through the lens in the second space.

Abstract: A semiconductor device includes a substrate, a first and a second nitride-based semiconductor layers, a doped nitride-based semiconductor layer, a gate electrode, a first and a second dielectric protection layers. The second nitride-based semiconductor layer has a bandgap greater than a bandgap of the first nitride-based semiconductor layer. The first and the second dielectric protection layers include oxygen. The first dielectric protection layer is conformal with a profile collectively constructed by the gate electrode, the doped nitride-based semiconductor layer, and the second nitride-based semiconductor layer. The second dielectric protection layer is in contact with the first dielectric protection layer. The first dielectric protection layer has an oxygen concentration less than that of the second dielectric protection layer.

Abstract: Provided is a semiconductor structure including multiple pairs of target patterns, a first conductive line, and a second conductive line. Each of the pairs of target patterns includes a top pattern and a bottom pattern. The first conductive line is disposed on a first side of the pairs of target patterns. The first conductive line is electrically connected to a top pattern of a (aN+1)th pair of target patterns in the pairs of target patterns, a is a fixed integer greater than or equal to 2, and N is an integer greater than or equal to 0. The second conductive line is disposed on a second side of the pairs of target patterns opposite to the first side. The second conductive line is electrically connected to a bottom pattern of the (aN+1)th pair of target patterns in the pairs of target patterns.

Abstract: In some examples a semiconductor chip package includes a conductive terminal. In addition, the semiconductor chip package includes a die pad including a top side and a recess extending into the top side. The die pad is downset relative to the conductive terminal. Further, the semiconductor ship package includes a semiconductor die positioned within the recess, wherein the semiconductor die has an outer perimeter, and a solder fillet engaged within the recess and with the outer perimeter of the semiconductor die. Still further, the semiconductor chip package includes a wire bond coupled to the semiconductor die and the conductive terminal, and a mold compound covering the conductive terminal, the wire bond, the die pad, and the semiconductor die.

Abstract: A device includes a first horizontal-gate-all-around (HGAA) transistor, a second HGAA transistor, a first vertical-gate-all-around (VGAA) transistor, and a second VGAA transistor. The first HGAA transistor and the second HGAA transistor are adjacent to each other. The first VGAA transistor is over the first HGAA transistor. The second VGAA transistor is over the second HGAA transistor. A top surface of the first VGAA transistor is substantially coplanar with a top surface of the second VGAA transistor.

Abstract: According to an aspect of the disclosure, the disclosure is directed to a wireless communication apparatus on a vehicle. The wireless communication the apparatus includes (not limited to): first wireless transceiver configured to transmit and receive data on a first communication path; a second wireless transceiver configured to transmit and receive data on a second communication path; and a processor electrically connected to the first wireless transceiver and the second wireless transceiver and configured at least to: establish, as a default mean of communication, multiple communication paths; transmit by the first wireless transceiver, as the default mean of communication, a first data packet to the network located outside of the vehicle on a first communication path; and transmit by the second wireless transceiver, as the default mean of communication, a first duplicated data packet of the first data packet to the network on a second communication path.

Abstract: A method for manufacturing a semiconductor device includes: forming a patterned mask on a patterned structure disposed on a substrate, such that a first mask portion and a second mask portion of the patterned mask are disposed on a first interconnect feature and a second interconnect feature of the patterned structure, respectively; and subjecting the patterned mask to a plasma treatment process such that the first and second mask portions are deformed to form a capping portion to cap a recess disposed between the first and second interconnect features so as to form an air gap.

Abstract: Improved process flows and methods are provided for processing a semiconductor substrate have exposed dielectric and metal-containing surfaces. More specifically, improved process flows and methods are provided for pre-cleaning the metal-containing surfaces prior to depositing a metal material onto the metal-containing surfaces. Hot vapor-phase etching is used to remove a native oxide film from the metal-containing surfaces. Prior to hot vapor-phase etching, the semiconductor substrate is exposed to a first silicon-containing gas to deposit an inhibitor film onto the exposed dielectric and metal-containing surfaces. The inhibitor film protects the dielectric surfaces while the native oxide film is being removed via the hot vapor-phase etching. In some embodiments, the semiconductor substrate is exposed to a second silicon-containing gas, after hot vapor-phase etching, to remove residues of the hot vapor-phase etching process from the pre-cleaned metal-containing surfaces.

Abstract: The present invention relates to a driving method for flicker suppression of a display panel and a driving circuit thereof. The driving circuit includes a source driving circuit and a common voltage generating circuit. The driving method includes driving the source driving circuit to generate at least one first source signal and at least one second source signal, the first source signal corresponds to at least one first pixel on a first scanning line; the second source signal corresponds to at least one second pixel on a second scanning line. The common voltage generating circuit generates at least one common voltage. While driving the first pixel and the second pixel to display the same gray scale image, the first source signal is not equal to the second source signal, or a first common voltage and a second common voltage generated by the common voltage generating circuit are different.

Abstract: In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.

Abstract: Buffing of a footwear component allows for an alteration of the component surface to achieve an intended surface for aesthetics and/or manufacturing purposes. The buffing is performed in a system having a vision module, a sidewall buffing module, an up surface buffing module, and a down surface buffing module. Each of the buffing modules are adapted for the unique shape and sizes of a footwear component to effectively and automatically buff the footwear component.

Abstract: In an example, an apparatus comprises a lead frame that includes a first row of leads, a first pad coupled to th first row of leads, and a second row of leads parallel to the first row of leads. The lead frame also includes a second pad coupled to the second row of leads. The first and second pads are separated by a gap, and each of the first and second pads has a substantially uniform thickness. The apparatus also includes a device coupled to the first and second pads. The first and second pads are exposed to an exterior of the apparatus.

Abstract: A lid structure, which is used for covering an opening of a container, includes a mainbody, an elastic annular element, and a covering assembly. The mainbody includes a through hole. The elastic annular element is integrally disposed on a peripheral region of the mainbody, wherein the elastic annular element is used for positioning the lid structure on the opening. The covering assembly is disposed on the mainbody and includes a spacer element and a covering element. The spacer element is disposed on and covers the through hole. The spacer element includes a plurality of drain holes and a central connecting portion. The covering element is deformably disposed on the central connecting portion.