Abstract: Provided is casting equipment and a casting method using same. A casting method includes: preparing a tundish; injecting molten steel to the tundish; installing a vacuum forming member on an upper portion of the tundish to form vacuum in at least a partial area of an upper portion of a melting surface of molten steel accommodated in the tundish; forming a rotational flow by blowing a gas into the molten steel; and forming vacuum in at least a partial area of the upper portion of the melting surface of the molten steel. More particularly, the present disclosure may effectively remove inclusions in the molten steel and restrict reoxidation of the molten steel.

Abstract: In a method of manufacturing a display device, the method includes: forming a conductive layer on a base; forming an organic layer, with a hole partially exposing the conductive layer, on the conductive layer; polishing an upper surface of the organic layer; and forming a light emitting element on the polished organic layer.

Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.

Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.

Abstract: A method of manufacturing a transistor display panel and a transistor display panel, the method including forming a polycrystalline silicon layer on a substrate; forming an active layer by patterning the polycrystalline silicon layer; forming a first insulating layer covering the substrate and the active layer; exposing the active layer by polishing the first insulating layer using a polishing apparatus; and forming a second insulating layer that contacts the first insulating layer and the active layer, wherein exposing the active layer by polishing the first insulating layer includes coating a first slurry on a surface of the first insulating layer, the first slurry reducing a polishing rate of the active layer.

Abstract: Methods of forming a field-effect transistor. A gate structure is formed that overlaps with a channel region in a semiconductor fin. The semiconductor fin is etched with a first etching process to form a cavity extending through the semiconductor fin and into a substrate fin underlying the semiconductor fin. After the cavity is formed, the semiconductor fin is etched selective to the substrate fin with a second etching process to widen a portion of the cavity.

Abstract: The present invention provides methods of differentiating mesenchymal stem cells or adult stem cells into nerve cells by treating the mesenchymal stem cells or the adult stem cells with an electromagnetic field having a high intensity of 100 to 1,500 mT and a low frequency of 0.01 to 100 Hz. These methods also provide injecting the mesenchymal stem cells or adult stem cells into a subject prior to treating the mesenchymal stem cells or adult stem cells with an electromagnetic field having a high intensity of 100 to 1,500 mT and a low frequency of 0.01 to 100 Hz.

Abstract: A thin-film transistor (TFT) array substrate is provided. The TFT array substrate includes a base substrate, a semiconductor layer disposed on the base substrate, an insulating layer disposed on the semiconductor layer, and a gate electrode disposed on the insulating layer. A top surface of a portion of the insulating layer overlapping the semiconductor layer in a plan view of the base substrate and a top surface of the gate electrode are placed on the same level.

Abstract: A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are present on a fin structure, wherein an upper surface of the first spacers is offset from an upper surface of the replacement gate structure, and forming at least second spacers on the first spacers and the exposed surfaces of the replacement gate structure. The method may further include substituting the replacement gate structure with a functional gate structure having a first width portion in a first space between adjacent first spacers, and a second width portion having a second width in a second space between adjacent second spacers, wherein the second width is greater than the first width.

Abstract: A method of manufacturing a display device includes: forming an active layer on a substrate; forming a first insulation layer covering the active layer; forming a gate metal line on the first insulation layer; forming a third insulation layer covering the gate metal line and including a silicon oxide; forming a fourth insulation layer including a silicon nitride on the third insulation layer; forming a fifth insulation layer including a silicon oxide on the fourth insulation layer; arranging a blocking member over a region in which the active layer and the gate metal line overlap; forming a fifth auxiliary insulation layer by doping nitrogen ions in the fifth insulation layer; and exposing a part of an upper surface of the fourth insulation layer by removing a portion of a fifth main insulation layer of the fifth insulation layer which does not overlap the fifth auxiliary insulation layer.

Abstract: A method for determining concentration and pressure of respective gas consisting of multi-gas using emitting and receiving of ultrasound includes: measuring a reference ultrasound flight time; measuring ultrasound flight times at plural concentrations, temperatures and pressures; obtaining an ultrasound flight time table comprising ultrasound flight time change values which are differences between the reference ultrasound flight time, which varies according to parameters of concentration, temperature and pressure, and the measured ultrasound flight time; obtaining an ultrasound amplitude table comprising ultrasound amplitude values of a waveform of a predetermined sequence of the received ultrasound waveform at plural concentrations, temperatures and pressures in a state that concentration, temperature and pressure of the target respective gas are parameters; and calculating the concentration and the pressure of the target gas based on performing temperature compensations for the ultrasound flight time change

Abstract: A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are present on a fin structure, wherein an upper surface of the first spacers is offset from an upper surface of the replacement gate structure, and forming at least second spacers on the first spacers and the exposed surfaces of the replacement gate structure. The method may further include substituting the replacement gate structure with a functional gate structure having a first width portion in a first space between adjacent first spacers, and a second width portion having a second width in a second space between adjacent second spacers, wherein the second width is greater than the first width.

Abstract: Provided is a method for quantifying A? in plasma by treating the plasma with MPP and/or TCEP, and a method for diagnosing, using the quantifying method, whether or not clinical cognitive deterioration and pathological A? accumulation occur. Through cut-off values of measured values measured by the method for quantifying A? according to the present subject matter, it is possible to identify normal, MCI and AD subjects and determine whether or not accumulation of A? in the brain occurs, and it is possible to predict progression to AD.

Abstract: A method of manufacturing a display device includes: forming an active layer on a substrate; forming a first insulation layer covering the active layer; forming a gate metal line on the first insulation layer; forming a third insulation layer covering the gate metal line and including a silicon oxide; forming a fourth insulation layer including a silicon nitride on the third insulation layer; forming a fifth insulation layer including a silicon oxide on the fourth insulation layer; arranging a blocking member over a region in which the active layer and the gate metal line overlap; forming a fifth auxiliary insulation layer by doping nitrogen ions in the fifth insulation layer; and exposing a part of an upper surface of the fourth insulation layer by removing a portion of a fifth main insulation layer of the fifth insulation layer which does not overlap the fifth auxiliary insulation layer.

Abstract: A method for manufacturing a display device includes forming a first gate metal wire on a substrate, forming a first insulation layer that covers the first gate metal wire, forming a second gate metal wire on the first insulation layer, forming a second main insulation layer that covers the second gate metal wire, forming a second auxiliary insulation layer on the second main insulation layer, forming an exposed portion of an upper surface of the second main insulation layer by polishing the second auxiliary insulation layer, and forming a first data metal wire on the second main insulation layer and the second auxiliary insulation layer.

Abstract: A method of manufacturing a transistor display panel and a transistor display panel, the method including forming a polycrystalline silicon layer on a substrate; forming an active layer by patterning the polycrystalline silicon layer; forming a first insulating layer covering the substrate and the active layer; exposing the active layer by polishing the first insulating layer using a polishing apparatus; and forming a second insulating layer that contacts the first insulating layer and the active layer, wherein exposing the active layer by polishing the first insulating layer includes coating a first slurry on a surface of the first insulating layer, the first slurry reducing a polishing rate of the active layer.

Abstract: A substrate polishing system includes: a polishing machine and a substrate transporter. The polishing machine includes: a lower surface plate to which a substrate is mounted, and an upper surface plate which faces the lower surface plate and polishes the substrate in cooperation with the lower surface plate, the upper surface plate having a larger area than the substrate mounted on the lower surface plate. The substrate transporter is adjacent to the polishing machine and commonly transports the substrate to and from the polishing machine in a first direction, attaches the substrate to the lower surface plate before polishing thereof, and separates from the lower surface plate the substrate after polishing thereof.

Abstract: Provided is a method for preparing boron nitride nanotubes, the method including: injecting a boron-metal catalyst composite into a reaction chamber; injecting a nitrogen precursor into the reaction chamber; producing a decomposition product of the boron-metal catalyst composite in a gas state by irradiating the boron-metal catalyst composite with a carbon dioxide laser or a free electron laser; and forming boron nitride nanotubes by reacting the decomposition product of the boron-metal catalyst composite in the gas state with the nitrogen precursor.

Abstract: A method of forming a gate structure for a semiconductor device that includes forming first spacers on the sidewalls of replacement gate structures that are present on a fin structure, wherein an upper surface of the first spacers is offset from an upper surface of the replacement gate structure, and forming at least second spacers on the first spacers and the exposed surfaces of the replacement gate structure. The method may further include substituting the replacement gate structure with a functional gate structure having a first width portion in a first space between adjacent first spacers, and a second width portion having a second width in a second space between adjacent second spacers, wherein the second width is greater than the first width.

Abstract: Provided is a meniscus flow control device includes: a meniscus flow detection unit for detecting, in a meniscus flow form of molten steel, relative temperature values for positions measured by temperature measurers, and relatively comparing the temperature values measured by the temperature measurers to thereby determine the flow state of the molten steel meniscus to be normal or abnormal; a magnetic field generation unit, installed outside a mold, for generating a magnetic field and controlling the flow of the molten steel by the magnetic field; and a flow control unit for maintaining the operation of the magnetic field generation unit in the current state when the meniscus flow state detected by the meniscus flow detection unit is determined to be normal, and for controlling the magnetic field generation unit to adjust the meniscus flow to be normal when the detected meniscus flow state is determined to be abnormal.