Patents by Inventor Ichio Yudasaka

Ichio Yudasaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9142703
    Abstract: A photoelectric conversion device includes a plurality of photoelectric conversion regions disposed over a substrate, and a colored region disposed among the photoelectric conversion regions over the substrate, the colored region forming an image over the substrate.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: September 22, 2015
    Assignee: SEIKO EPSON CORPORATION
    Inventors: Hideki Tanaka, Ichio Yudasaka, Masahiro Furusawa, Tsutomu Miyamoto, Tatsuya Shimoda
  • Publication number: 20140212999
    Abstract: A photoelectric conversion device includes a plurality of photoelectric conversion regions disposed over a substrate, and a colored region disposed among the photoelectric conversion regions over the substrate, the colored region forming an image over the substrate.
    Type: Application
    Filed: March 27, 2014
    Publication date: July 31, 2014
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hideki TANAKA, Ichio YUDASAKA, Masahiro FURUSAWA, Tsutomu MIYAMOTO, Tatsuya SHIMODA
  • Patent number: 8723015
    Abstract: A photoelectric conversion device includes a plurality of photoelectric conversion regions disposed over a substrate, and a colored region disposed among the photoelectric conversion regions over the substrate, the colored region forming an image over the substrate.
    Type: Grant
    Filed: March 1, 2006
    Date of Patent: May 13, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Hideki Tanaka, Ichio Yudasaka, Masahiro Furusawa, Tsutomu Miyamoto, Tatsuya Shimoda
  • Patent number: 8159124
    Abstract: In order to provide an active matrix display device in which a thick insulating film is preferably formed around an organic semiconductive film of a thin film luminescent device without damaging the thin film luminescent device, the active matrix display device is provided with a bank layer (bank) along a data line (sig) and a scanning line (gate) to suppress formation of parasitic capacitance in the data line (sig), in which the bank layer (bank) surrounds a region that forms the organic semiconductive film of the thin film luminescent device by an ink-jet process. The bank layer (bank) includes a lower insulating layer formed of a thick organic material and an upper insulating layer of an organic material which is deposited on the lower insulating layer and has a smaller thickness so as to avoid contact of the organic semiconductive film with the upper insulating layer.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: April 17, 2012
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7932518
    Abstract: Display devices such as EL elements or LED elements, are formed from thin film elements having banks of prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks. The banks may be formed of an organic material on a bank formation surface configured of an inorganic material, plasma treatment is performed under conditions that the induction gas is fluorine-based and that fluorine is present excessively, and the areas enclosed by the banks subjected to surface treatment are filled with the liquid thin film material to form the thin film layer or layers.
    Type: Grant
    Filed: September 17, 2008
    Date of Patent: April 26, 2011
    Assignee: Seiko Epson Corporation
    Inventors: Shunichi Seki, Hiroshi Kiguchi, Ichio Yudasaka, Hiroo Miyajima
  • Publication number: 20100045577
    Abstract: In order to provide an active matrix display device in which parasitic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film and disconnection or the like does not occur in the opposing electrode formed on the upper layer of the thick insulating film, in an active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines, and by depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have a step due to the bank layer, disconnection of the opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.
    Type: Application
    Filed: October 27, 2009
    Publication date: February 25, 2010
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Ichio YUDASAKA
  • Patent number: 7647505
    Abstract: The current society can be referred to as a card society, since people can use various types of cards for a variety of applications. However, card users must always carry a number of cards depending upon the application, and must use different cards according to the purpose, which can bother such users. A memory of an IC chip of an IC card includes a fingerprint information area to verify the identity of a card owner, a personal information area in which personal information of the card owner is classified and recorded with different security levels set up, a company information area in which each company writes information of the company using an “encryption key” unique to the company, and a public organization information area in which each public organization writes information of the public organization using an “encryption key” unique to the public organization.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: January 12, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20090303165
    Abstract: In order to provide an active matrix display device in which parasitic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film and disconnection or the like does not occur in the opposing electrode formed on the upper layer of the thick insulating film, in an active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines, and by depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have a step due to the bank layer, disconnection of the opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.
    Type: Application
    Filed: August 13, 2009
    Publication date: December 10, 2009
    Applicant: Seiko Epson Corporation
    Inventor: Ichio YUDASAKA
  • Patent number: 7585717
    Abstract: A method for manufacturing a semiconductor device includes: forming a lower gate electrode over a substrate; forming a sacrifice film over the substrate such that the lower gate electrode is overlapped with the sacrifice film; forming a semiconductor film over the sacrifice film such that the semiconductor film crosses over the lower gate electrode; removing the sacrifice film; forming a lower gate insulating film in an empty space between the lower gate electrode and the semiconductor film, the empty space being obtained by removing the sacrifice film; forming an upper gate insulating film over the semiconductor film; and forming an upper gate electrode over the upper gate insulating film, the upper gate electrode being electrically connected to the lower gate electrode.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: September 8, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7544614
    Abstract: A slit forming process with respect to a coated film, includes: forming a step pattern having an end part on a substrate; coating a liquid material for forming a coated film on the substrate in the manner of covering at least the end part of the step pattern; and forming the coated film by drying the coated liquid material, together with forming a slit at a position corresponding to the end part of the step pattern.
    Type: Grant
    Filed: January 3, 2006
    Date of Patent: June 9, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7524734
    Abstract: A wiring substrate includes a substrate, a first film, and a second film formed between the substrate and the first film, and an empty space is formed between at least a part of the second film and the substrate.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: April 28, 2009
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7524718
    Abstract: A method for manufacturing a photoelectric transducer, comprising: forming a first electrode on a substrate; forming a first conductivity-type semiconductor layer on the first electrode; forming an I type semiconductor layer on the first conductivity-type semiconductor layer; forming on the I type semiconductor layer a second conductivity-type semiconductor layer that is different from the first conductivity-type; and forming a second electrode on the second conductivity-type semiconductor layer, wherein the forming of the I type semiconductor layer includes: forming a precursor film of the I type semiconductor layer on the first conductivity-type semiconductor layer by arranging droplets containing a silicon compound in an island shape; and converting the precursor film into the I type semiconductor layer by carrying out heat treatment or photoirradiation treatment to the precursor film.
    Type: Grant
    Filed: March 14, 2006
    Date of Patent: April 28, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Masahiro Furusawa, Ichio Yudasaka, Hideki Tanaka, Tsutomu Miyamoto, Hideo Shimamura
  • Patent number: 7521299
    Abstract: A method of manufacturing a transistor includes disposing a droplet containing a bank material as a solute or a dispersoid on a substrate, drying the droplet to form a bank, ejecting a conductive material on a part of the bank to form a first conductive region and a second conductive region with the part of the bank interposed therebetween, removing the bank to form a groove between the first and second conductive regions, supplying a semiconductor material into the groove to form a semiconductor film, forming a gate insulating film on the semiconductor film, and forming a gate electrode at a position on the gate insulating film facing the semiconductor film.
    Type: Grant
    Filed: June 1, 2005
    Date of Patent: April 21, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Hideki Tanaka, Takashi Masuda, Ichio Yudasaka, Takashi Aoki
  • Patent number: 7510093
    Abstract: An etching method of the invention includes arranging droplets including a film-forming material on a substrate, drying each of the droplets to form a dry film having a width smaller than the diameter of each droplet at the time of the arrangement, and performing etching while using the dry film as an etching protective film.
    Type: Grant
    Filed: August 10, 2005
    Date of Patent: March 31, 2009
    Assignee: Seiko Epson Corporation
    Inventors: Takashi Aoki, Takashi Masuda, Hideki Tanaka, Ichio Yudasaka
  • Publication number: 20090020751
    Abstract: Display devices such as EL elements or LED elements, are formed from thin film elements having banks of prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks. The banks may be formed of an organic material on a bank formation surface configured of an inorganic material, plasma treatment is performed under conditions that the induction gas is fluorine-based and that fluorine is present excessively, and the areas enclosed by the banks subjected to surface treatment are filled with the liquid thin film material to form the thin film layer or layers.
    Type: Application
    Filed: September 17, 2008
    Publication date: January 22, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Shunichi Seki, Hiroshi Kiguchi, Ichio Yudasaka, Hiroo Miyajima
  • Patent number: 7442955
    Abstract: Display devices such as EL elements or LED elements, are formed from thin film elements having banks of prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks. The banks may be formed of an organic material on a bank formation surface configured of an inorganic material, plasma treatment is performed under conditions that the induction gas is fluorine-based and that fluorine is present excessively, and the areas enclosed by the banks subjected to surface treatment are filled with the liquid thin film material to form the thin film layer or layers.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: October 28, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Shunichi Seki, Hiroshi Kiguchi, Ichio Yudasaka, Hiroo Miyajima
  • Publication number: 20080180421
    Abstract: In order to provide an active matrix display device in which a thick insulating film is preferably formed around an organic semiconductive film of a thin film luminescent device without damaging the thin film luminescent device, the active matrix display device is provided with a bank layer (bank) along a data line (sig) and a scanning line (gate) to suppress formation of parasitic capacitance in the data line (sig), in which the bank layer (bank) surrounds a region that forms the organic semiconductive film of the thin film luminescent device by an ink-jet process. The bank layer (bank) includes a lower insulating layer formed of a thick organic material and an upper insulating layer of an organic material which is deposited on the lower insulating layer and has a smaller thickness so as to avoid contact of the organic semiconductive film with the upper insulating layer.
    Type: Application
    Filed: March 11, 2008
    Publication date: July 31, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Ichio YUDASAKA
  • Patent number: 7405134
    Abstract: Exemplary embodiments of the present invention provide a method of manufacturing a semiconductor device that can take a connection between layers without giving damage to a layer, which is underlying. The semiconductor device includes forming conductive members Ms and Md at a predetermined position of a semiconductor film, forming an insulating film on a whole surface of a substrate excluding the conductive members Ms and Md, and forming a conductive film that is connected to the semiconductor film with the conductive member Ms and Md.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: July 29, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Hideki Tanaka
  • Patent number: 7375774
    Abstract: A simple method of manufacturing a semiconductor device including a thick and dense insulator layer having a uniform film thickness includes forming the insulator layer by repeatedly applying a liquid material to a conductive layer plural times.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: May 20, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Hideki Tanaka, Ichio Yudasaka, Masami Miyasaka
  • Patent number: 7364939
    Abstract: In order to provide an active matrix display device in which a thick insulating film is preferably formed around an organic semiconductive film of a thin film luminescent device without damaging the thin film luminescent device, the active matrix display device is provided with a bank layer (bank) along a data line (sig) and a scanning line (gate) to suppress formation of parasitic capacitance in the data line (sig), in which the bank layer (bank) surrounds a region that forms the organic semiconductive film of the thin film luminescent device by an ink-jet process. The bank layer (bank) includes a lower insulating layer formed of a thick organic material and an upper insulating layer of an organic material which is deposited on the lower insulating layer and has a smaller thickness so as to avoid contact of the organic semiconductive film with the upper insulating layer.
    Type: Grant
    Filed: March 4, 2005
    Date of Patent: April 29, 2008
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka