Patents by Inventor Ichio Yudasaka

Ichio Yudasaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050026419
    Abstract: Method of forming a multilayer interconnection structure that includes a contact hole for reliably connecting between layers, without damaging a substrate. A column shaped mask material is formed in a position for forming a contact hole using a resist, and an interlayer insulating film is applied to the whole surface of the substrate excluding the mask material. Then, the mask material is removed by a method such as peeling. As a result, a hole generated thereby is used as a contact hole.
    Type: Application
    Filed: June 25, 2004
    Publication date: February 3, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Ichio Yudasaka, Mitsuru Sato
  • Publication number: 20050020000
    Abstract: In a transistor having a top gate structure, a portion of a gate insulating film is formed using a coating method. At this time, the size of the semiconductor film on which the coating film is formed is appropriately set to correspond to the properties of the coating liquid, the coating conditions, and the film thickness required in the coating film. Electrical characteristics and reliability of a transistor are improved.
    Type: Application
    Filed: June 3, 2004
    Publication date: January 27, 2005
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Ichio Yudasaka
  • Patent number: 6846513
    Abstract: Provided is a method of forming a silicon thin-film which comprises a step of arranging in one or more parts of a liquid arranging surface liquid which contains a silicide comprising ring silane and/or a derivative thereof, such ring silane comprising silicon and hydrogen, and a step of forming a silicon thin-film by vaporizing silicide from liquid and supplying the silicide to a thin-film-forming surface.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: January 25, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Masahiro Furusawa, Satoru Miyashita, Ichio Yudasaka, Tatsuya Shimoda, Yasuaki Yokoyama, Yasuo Matsuki, Yasumasa Takeuchi
  • Publication number: 20040255848
    Abstract: A coating apparatus coats a liquid material on a substrate in a coating chamber. A first liquid supply system that supplies the liquid material is provided in the coating chamber. A second liquid supply system is provided in the first liquid supply system that supplies a liquid that cleans or that deactivates the liquid material remaining in the coating chamber and/or in the first liquid supply system. A coating apparatus, a thin film forming method, a thin film forming apparatus, a semiconductor device manufacturing method, an electro-optic device, and an electronic instrument are provided that enable a high performance thin film with few defects and with a high degree of reproducibility to be obtained, that allow maintenance of the apparatus to be performed efficiently and safely, and that enable a thin film to be formed at low cost.
    Type: Application
    Filed: April 5, 2004
    Publication date: December 23, 2004
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20040242008
    Abstract: In a method of forming contact holes without using a vacuum device, a resist film at positions corresponding to contact hole forming regions above a source region 16, a drain region 18 and a gate electrode 34 of a polysilicon film 14, is exposed and developed to form mask pillars 40. Then a liquid insulating material is applied onto the whole surface of a glass substrate 10 except for the mask pillars 40, to form an insulating layer 42. Next the mask pillars 40 are removed by ashing, and an insulating layer 42, second contact holes 44 and first contact holes 28 which pass through a gate insulating film 26 are formed.
    Type: Application
    Filed: March 9, 2004
    Publication date: December 2, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Mitsuru Sato, Ichio Yudasaka
  • Publication number: 20040201048
    Abstract: Display devices such as EL elements or LED elements, or color filters, are provided, wherewith, when forming thin films such as organic semiconductor films or colored resins, there is remarkably little variation in film thickness from pixel to pixel. When fabricating thin film elements having banks of a prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks, if the width of the banks is made a (&mgr;m), the height thereof is made c (&mgr;m), the width of the areas to be coated is made b (&mgr;m), and the diameter of the liquid droplets of the liquid material forming the thin film layer is made d (&mgr;m), the banks are formed on the substrate so as to satisfy the conditions that a>d/4, d/2<b<5d, c>t0 (where t0 (&mgr;m) is the film thickness of the thin film layer), and c>½×d/b.
    Type: Application
    Filed: October 17, 2003
    Publication date: October 14, 2004
    Applicant: Seiko Epson Corporation
    Inventors: Shunichi Seki, Hiroshi Kiguchi, Ichio Yudasaka, Hiroo Miyajima
  • Publication number: 20040195205
    Abstract: A thin film formation method in accordance with the present invention forms banks (110) where affinity bank layers and non-affinity bank layers are alternately layered by repeating a step of forming an affinity bank layer (111-11n) with a material having affinity for a thin film material solution (130) (such inorganic material as SiO2) and a step of forming a non-affinity bank layer (121-12n) with a material having non-affinity for the thin film material solution (130) (such organic material as resist) one or more times. Finally the thin film material solution (130) is filled between banks by an ink jet method, heat treatment is executed, and a thin film layer (131-13n) is sequentially layered. By these steps, cost required for affinity control can be decreased and forming multi-layer thin films with uniform film thickness becomes possible.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 7, 2004
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 6770936
    Abstract: In a TFT including on the surface side of a substrate a channel region opposed to a gate electrode, with a gate insulating film provided therebetween, and a source-drain region connected to the channel region, and a TFT including a source-drain wiring layer electrically connected to the source-drain region, and a gate wiring layer electrically connected to the gate electrode, at least one component part composed of a conductive film or a semiconductor film, among the component parts of each TFT, is provided with a heat-radiating extension extended from the component part itself for enhancing the heat-radiating efficiency from the component part.
    Type: Grant
    Filed: May 26, 1998
    Date of Patent: August 3, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Satoshi Inoue, Ichio Yudasaka
  • Publication number: 20040145018
    Abstract: In a TFT including on the surface side of a substrate a channel region opposed to a gate electrode, with a gate insulating film provided therebetween, and a source-drain region connected to the channel region, and a TFT including a source-drain wiring layer electrically connected to the source-drain region, and a gate wiring layer electrically connected to the gate electrode, at least one component part composed of a conductive film or a semiconductor film, amoung the component parts of each TFT, is provided with a heat-radiating extension extended from the component part itself for enhancing the heat-radiating efficiency from the component part.
    Type: Application
    Filed: January 15, 2004
    Publication date: July 29, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Satoshi Inoue, Ichio Yudasaka
  • Patent number: 6767775
    Abstract: All or a part of the thin films such as the silicon film, insulation film and conductive film are formed using liquid materials. The main method includes the steps of forming a coating film by coating the liquid material on the substrate, and heat-treating the coating film for converting it into a desired thin film, thereby enabling the thin film transistor to be manufactured using a cheap manufacturing equipment.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: July 27, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Shunichi Seki
  • Patent number: 6765265
    Abstract: The present invention provides a thin film transistor (TET) and its production method which enable the stabilizing of saturation current and improving reliability by improving the film quality of the channel region. The TFT includes a channel region towering over a gate electrode through a gate insulation film, a source region connecting to the channel region and a drain region connecting to the channel region on an opposite side of the source region are formed on the polycrystal semiconductor film on which island-like patterning is performed. An indented section is formed on a surface of the channel region, and the section corresponding to the indented section becomes a recombination center which captures the small-number carrier (holes) because the degree of the crystallization is low in the section corresponding to the indented section due to shift from the optimum conditions at the time of laser annealing of the semiconductor.
    Type: Grant
    Filed: December 11, 2001
    Date of Patent: July 20, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Mitsutoshi Miyasaka, Piero Migliorato
  • Patent number: 6755983
    Abstract: A thin film formation method in accordance with the present invention forms banks (110) where affinity bank layers and non-affinity bank layers are alternately layered by repeating a step of forming an affinity bank layer (111-11n) with a material having affinity for a thin film material solution (130) (such inorganic material as SiO2) and a step of forming a non-affinity bank layer (121-12n) with a material having non-affinity for the thin film material solution (130) (such organic material as resist) one or more times. Finally the thin film material solution (130) is filled between banks by an ink jet method, heat treatment is executed, and a thin film layer (131-13n) is sequentially layered. By these steps, cost required for affinity control can be decreased and forming multi-layer thin films with uniform film thickness becomes possible.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: June 29, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 6734839
    Abstract: In an active matrix display device, each pixel is provided with a pixel electrode, an organic semiconductor film deposited on the upper layer side of the pixel electrode, and a thin film luminescent element provided with an opposing electrode formed on the upper layer side of the organic semiconductor film. A protective film covering almost the entire surface of a substrate is formed on the upper layer of the opposing electrode. The protective film prevents the entry of moisture or oxygen to inhibit the deterioration of the thin film luminescent element.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: May 11, 2004
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20040087068
    Abstract: [Object] To provide a method for forming a high-performance thin-film at low cost using a liquid material in safety, an apparatus for forming a thin-film, a method for manufacturing a semiconductor device, an electro-optical unit, and an electronic apparatus.
    Type: Application
    Filed: April 21, 2003
    Publication date: May 6, 2004
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20040082195
    Abstract: In this production method of a thin film device, a thin film is formed by discharging a liquid material from a nozzle in a deposition chamber to coat the liquid material onto a substrate. The substrate is then subjected to heat treatment by a first heat treatment unit and a second heat treatment unit, thereby improving the crystallinity and fitness of the film as well as its adhesion with other films.
    Type: Application
    Filed: April 17, 2003
    Publication date: April 29, 2004
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Masahiro Furusawa
  • Patent number: 6727123
    Abstract: The present invention provides a thin-film transistor (TFT) and its production method which enables an arrangement restraining bipolar transistor type behavior, in order to stabilize saturation current and to provide a TFT that can improve reliability. The TFT includes a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite this source region are formed in a polycrystal semiconductor film that was patterned in island forms. In the channel region, a recombination center is formed for capturing a small number of carriers (holes) by introducing impurities, such as inert gases, metals, Group III elements, Group IV elements and Group V elements after a crystallization process is carried out on a semiconductor film 100.
    Type: Grant
    Filed: December 18, 2001
    Date of Patent: April 27, 2004
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Mitsutoshi Miyasaka, Piero Migliorato
  • Publication number: 20040029364
    Abstract: A method of manufacturing a device comprising individual thin films including a silicon film, a gate insulating film, a conductive film for a gate electrode, an interlayer insulating film, and a conductive film for an electrode and wiring, comprising: a step of applying a liquid material to form an applied film; and a heat treatment and/or a light irradiating treatment of making the applied film into the silicon film, wherein, as the liquid material, a high-order silane composition comprising a high-order silence formed by photopolymerization by irradiating a silane compound solution having a photopolymerization property with UV rays is used.
    Type: Application
    Filed: April 22, 2003
    Publication date: February 12, 2004
    Inventors: Takashi Aoki, Masahiro Furusawa, Ichio Yudasaka
  • Publication number: 20040008311
    Abstract: In order to provide an active matrix display device in which a thick insulating film is preferably formed around an organic semiconductive film of a thin film luminescent device without damaging the thin film luminescent device, the active matrix display device is provided with a bank layer (bank) along a data line (sig) and a scanning line (gate) to suppress formation of parasitic capacitance in the data line (sig), in which the bank layer (bank) surrounds a region that forms the organic semiconductive film of the thin film luminescent device by an ink-jet process. The bank layer (bank) includes a lower insulating layer formed of a thick organic material and an upper insulating layer of an organic material which is deposited on the lower insulating layer and has a smaller thickness so as to avoid contact of the organic semiconductive film with the upper insulating layer.
    Type: Application
    Filed: July 11, 2003
    Publication date: January 15, 2004
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20030234398
    Abstract: A device comprising a semiconductor film (12) formed on a substrate (11), a gate region (15), in which a gate insulating film (13) formed on the semiconductor film and a gate electrode film (14) are laminated, isolation means (A) formed on both sides of the gate region to prevent contact between the gate electrode film and other regions, and a source region and a drain region formed by baking a liquid semiconductor material (17) and disposed on regions on the substrate and on both sides of the gate region.
    Type: Application
    Filed: April 22, 2003
    Publication date: December 25, 2003
    Inventors: Takashi Aoki, Masahiro Furusawa, Ichio Yudasaka
  • Publication number: 20030206144
    Abstract: An active matrix display device is provided in which parasistic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film, and disconnection or the like does not occur in an opposing electrode formed on the upper layer of the thick insulating film. In the active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines. By depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have any a step due to the existence of the bank layer, disconnection of opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.
    Type: Application
    Filed: May 21, 2003
    Publication date: November 6, 2003
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka