Patents by Inventor Ichio Yudasaka

Ichio Yudasaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080087217
    Abstract: A coating apparatus coats a liquid material on a substrate in a coating chamber. A first liquid supply system that supplies the liquid material is provided in the coating chamber. A second liquid supply system is provided in the first liquid supply system that supplies a liquid that cleans or that deactivates the liquid material remaining in the coating chamber and/or in the first liquid supply system. A coating apparatus, a thin film forming method, a thin film forming apparatus, a semiconductor device manufacturing method, an electro-optic device, and an electronic instrument are provided that enable a high performance thin film with few defects and with a high degree of reproducibility to be obtained, that allow maintenance of the apparatus to be performed efficiently and safely, and that enable a thin film to be formed at low cost.
    Type: Application
    Filed: October 3, 2007
    Publication date: April 17, 2008
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7348224
    Abstract: A method for manufacturing a thin film transistor results in a thin film transistor including a semiconductor film, a channel region provided in the semiconductor film, source and drain regions sandwiching the channel region, and a gate electrode facing the channel region with an intermediary of a gate insulating film. The method includes depositing a droplet that includes a semiconductor material on a substrate; and forming the semiconductor film by drying the droplet to precipitate the semiconductor material on at least a peripheral edge of the droplet.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: March 25, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Takashi Masuda
  • Publication number: 20080036699
    Abstract: In order to provide an active matrix display device in which parasitic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film and disconnection or the like does not occur in the opposing electrode formed on the upper layer of the thick insulating film, in an active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines, and by depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have a step due to the bank layer, disconnection of the opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.
    Type: Application
    Filed: October 2, 2007
    Publication date: February 14, 2008
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7294155
    Abstract: A coating apparatus coats a liquid material on a substrate in a coating chamber. A first liquid supply system that supplies the liquid material is provided in the coating chamber. A second liquid supply system is provided in the first liquid supply system that supplies a liquid that cleans or that deactivates the liquid material remaining in the coating chamber and/or in the first liquid supply system. A coating apparatus, a thin film forming method, a thin film forming apparatus, a semiconductor device manufacturing method, an electro-optic device, and an electronic instrument are provided that enable a high performance thin film with few defects and with a high degree of reproducibility to be obtained, that allow maintenance of the apparatus to be performed efficiently and safely, and that enable a thin film to be formed at low cost.
    Type: Grant
    Filed: April 5, 2004
    Date of Patent: November 13, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7288792
    Abstract: Exemplary embodiments of the present invention are intended to provide a semiconductor device that can readily address or achieve high integration. Exemplary embodiments provide a semiconductor device constructed to include a transistor and a multi-layer wiring structure electrically connected to the transistor, the multi-layer wiring structure having a first wiring layer disposed in the same layer as the semiconductor layer of the transistor.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: October 30, 2007
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7273801
    Abstract: Display devices such as EL elements or LED elements, are formed from thin film elements having banks of prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks. The banks may be formed of an organic material on a bank formation surface configured of an inorganic material, plasma treatment is performed under conditions that the induction gas is fluorine-based and that fluorine is present excessively, and the areas enclosed by the banks subjected to surface treatment are filled with the liquid thin film material to form the thin film layer or layers.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: September 25, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Shunichi Seki, Hiroshi Kiguchi, Ichio Yudasaka, Hiroo Miyajima
  • Patent number: 7265021
    Abstract: Aspects of the invention can provide an alignment method that is preferably applicable when manufacturing equipments by liquid-phase processing. The alignment method in a device manufacturing process can include forming of a functional film on a substrate by liquid-phase processing, forming an alignment mark on the substrate on which the functional film is formed so as to make a pattern of the alignment mark appear on a film that is formed after forming the functional film, and aligning the film that is formed after forming the functional film by using the alignment mark.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: September 4, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Hideki Tanaka
  • Patent number: 7262128
    Abstract: Method of forming a multilayer interconnection structure that includes a contact hole for reliably connecting between layers, without damaging a substrate. A column shaped mask material is formed in a position for forming a contact hole using a resist, and an interlayer insulating film is applied to the whole surface of the substrate excluding the mask material. Then, the mask material is removed by a method such as peeling. As a result, a hole generated thereby is used as a contact hole.
    Type: Grant
    Filed: June 25, 2004
    Date of Patent: August 28, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Mitsuru Sato
  • Publication number: 20070148839
    Abstract: A method for manufacturing a semiconductor device includes: forming a lower gate electrode over a substrate; forming a sacrifice film over the substrate such that the lower gate electrode is overlapped with the sacrifice film; forming a semiconductor film over the sacrifice film such that the semiconductor film crosses over the lower gate electrode; removing the sacrifice film; forming a lower gate insulating film in an empty space between the lower gate electrode and the semiconductor film, the empty space being obtained by removing the sacrifice film; forming an upper gate insulating film over the semiconductor film; and forming an upper gate electrode over the upper gate insulating film, the upper gate electrode being electrically connected to the lower gate electrode.
    Type: Application
    Filed: November 29, 2006
    Publication date: June 28, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Ichio YUDASAKA
  • Patent number: 7229859
    Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
    Type: Grant
    Filed: January 29, 2003
    Date of Patent: June 12, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Sadao Kanbe, Wakao Miyazawa
  • Patent number: 7214959
    Abstract: Display devices such as EL elements or LED elements, are formed from thin film elements having banks of prescribed height and a thin film layer formed by an ink jet method in areas to be coated that are partitioned by those banks. The banks may be formed of an organic material on a bank formation surface configured of an inorganic material, plasma treatment is performed under conditions that the induction gas is fluorine-based and that fluorine is present excessively, and the areas enclosed by the banks subjected to surface treatment are filled with the liquid thin film material to form the thin film layer or layers.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: May 8, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Shunichi Seki, Hiroshi Kiguchi, Ichio Yudasaka, Hiroo Miyajima
  • Patent number: 7179733
    Abstract: In a method of forming contact holes without using a vacuum device, a resist film at positions corresponding to contact hole forming regions above a source region 16, a drain region 18 and a gate electrode 34 of a polysilicon film 14, is exposed and developed to form mask pillars 40. Then a liquid insulating material is applied onto the whole surface of a glass substrate 10 except for the mask pillars 40, to form an insulating layer 42. Next the mask pillars 40 are removed by ashing, and an insulating layer 42, second contact holes 44 and first contact holes 28 which pass through a gate insulating film 26 are formed.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: February 20, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Mitsuru Sato, Ichio Yudasaka
  • Publication number: 20070023899
    Abstract: A wiring substrate includes a substrate, a first film, and a second film formed between the substrate and the first film, and an empty space is formed between at least a part of the second film and the substrate.
    Type: Application
    Filed: June 8, 2006
    Publication date: February 1, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Ichio Yudasaka
  • Patent number: 7141492
    Abstract: The invention provides a method of forming a high-performance thin-film at low cost using a liquid material in safety, an apparatus to form a thin-film, a method of manufacturing a semiconductor device, an electro-optical unit, and an electronic apparatus. An apparatus to form a thin-film includes a coating unit to apply a liquid material containing a thin-film component onto a substrate and also includes heat-treating units to heat the substrate applied with the liquid material. The coating unit and the heat-treating units each include a control device to control the atmosphere in a treating chamber to treat the substrate.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: November 28, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7118943
    Abstract: In this production method of a thin film device, a thin film is formed by discharging a liquid material from a nozzle in a deposition chamber to coat the liquid material onto a substrate. The substrate is then subjected to heat treatment by a first heat treatment unit and a second heat treatment unit, thereby improving the crystallinity and fitness of the film as well as its adhesion with other films.
    Type: Grant
    Filed: April 17, 2003
    Date of Patent: October 10, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Masahiro Furusawa
  • Publication number: 20060213547
    Abstract: A photoelectric conversion device includes a plurality of photoelectric conversion regions disposed over a substrate, and a colored region disposed among the photoelectric conversion regions over the substrate, the colored region forming an image over the substrate.
    Type: Application
    Filed: March 1, 2006
    Publication date: September 28, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hideki Tanaka, Ichio Yudasaka, Masahiro Furusawa, Tsutomu Miyamoto, Tatsuya Shimoda
  • Publication number: 20060214088
    Abstract: A method for manufacturing a photoelectric transducer, comprising: forming a first electrode on a substrate; forming a first conductivity-type semiconductor layer on the first electrode; forming an I type semiconductor layer on the first conductivity-type semiconductor layer; forming on the I type semiconductor layer a second conductivity-type semiconductor layer that is different from the first conductivity-type; and forming a second electrode on the second conductivity-type semiconductor layer, wherein the forming of the I type semiconductor layer includes: forming a precursor film of the I type semiconductor layer on the first conductivity-type semiconductor layer by arranging droplets containing a silicon compound in an island shape; and converting the precursor film into the I type semiconductor layer by carrying out heat treatment or photoirradiation treatment to the precursor film.
    Type: Application
    Filed: March 14, 2006
    Publication date: September 28, 2006
    Applicant: Seiko Epson Corporation
    Inventors: Masahiro Furusawa, Ichio Yudasaka, Hideki Tanaka, Tsutomu Miyamoto, Hideo Shimamura
  • Publication number: 20060188648
    Abstract: A slit forming process with respect to a coated film, includes: forming a step pattern having an end part on a substrate; coating a liquid material for forming a coated film on the substrate in the manner of covering at least the end part of the step pattern; and forming the coated film by drying the coated liquid material, together with forming a slit at a position corresponding to the end part of the step pattern.
    Type: Application
    Filed: January 3, 2006
    Publication date: August 24, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 7084428
    Abstract: There is provided a transistor and a method of manufacturing this transistor that allow a high degree of freedom when designing a wiring structure and also allow an improvement in product quality to be achieved. The transistor includes a source area, a drain area, and a channel area, each of which are formed by semiconductor films, and also a gate insulating film and a gate electrode. The semiconductor film containing the source area and the semiconductor film containing the drain area are formed separately sandwiching both sides of an insulating member. The semiconductor film containing the channel area is formed on top of the insulating member.
    Type: Grant
    Filed: November 21, 2003
    Date of Patent: August 1, 2006
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Masahiro Furusawa, Takashi Aoki
  • Publication number: 20060154406
    Abstract: A method of manufacturing a transistor includes disposing a droplet containing a bank material as a solute or a dispersoid on a substrate, drying the droplet to form a bank, ejecting a conductive material on a part of the bank to form a first conductive region and a second conductive region with the part of the bank interposed therebetween, removing the bank to form a groove between the first and second conductive regions, supplying a semiconductor material into the groove to form a semiconductor film, forming a gate insulating film on the semiconductor film, and forming a gate electrode at a position on the gate insulating film facing the semiconductor film.
    Type: Application
    Filed: June 1, 2005
    Publication date: July 13, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hideki Tanaka, Takashi Masuda, Ichio Yudasaka, Takashi Aoki