Patents by Inventor Ichio Yudasaka

Ichio Yudasaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6642651
    Abstract: In order to provide an active matrix display device in which a thick insulating film is preferably formed around an organic semiconductive film of a thin film luminescent device without damaging the thin film luminescent device, the active matrix display device is provided with a bank layer (bank) along a data line (sig) and a scanning line (gate) to suppress formation of parasitic capacitance in the data line (sig), in which the bank layer (bank) surrounds a region that forms the organic semiconductive film of the thin film luminescent device by an ink-jet process. The bank layer (bank) includes a lower insulating layer formed of a thick organic material and an upper insulating layer of an organic material which is deposited on the lower insulating layer and has a smaller thickness so as to avoid contact of the organic semiconductive film with the upper insulating layer.
    Type: Grant
    Filed: March 22, 2002
    Date of Patent: November 4, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 6621101
    Abstract: The present invention provides, in a TFT, a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite the source region that are formed in a polycrystal semiconductor film that was patterned in island forms. In the channel region, a recombination center is formed for capturing a small number of carriers (holes) by impurities, such as inert-gas, metals, Group III elements, Group IV elements and Group V elements, introduced to a predetermined region in this channel region, or by defects generated due to the introduction of these impurities. The present invention thus provides an arrangement restraining bipolar transistor type behavior to stabilize saturation current and to provide a TFT that can improve reliability.
    Type: Grant
    Filed: December 12, 2001
    Date of Patent: September 16, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Mitsutoshi Miyasaka, Piero Migliorato
  • Publication number: 20030172279
    Abstract: The current society can be referred to as a card society, since people can use various types of cards for a variety of applications. However, card users must always carry a number of cards depending upon the application, and must use different cards according to the purpose, which can bother such users. A memory of an IC chip of an IC card includes a fingerprint information area to verify the identity of a card owner, a personal information area in which personal information of the card owner is classified and recorded with different security levels set up, a company information area in which each company writes information of the company using an “encryption key” unique to the company, and a public organization information area in which each public organization writes information of the public organization using an “encryption key” unique to the public organization.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 11, 2003
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20030134519
    Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
    Type: Application
    Filed: January 29, 2003
    Publication date: July 17, 2003
    Applicant: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Sadao Kanbe, Wakao Miyazawa
  • Patent number: 6593591
    Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
    Type: Grant
    Filed: June 4, 1999
    Date of Patent: July 15, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Sadao Kanbe, Wakao Miyazawa
  • Patent number: 6580633
    Abstract: A semiconductor memory device comprising: an active layer in which are formed a transistor source, channel and drain; a gate for the transistor; a layer of ferroelectric material; and an electrode for applying a voltage to the ferroelectric material; the electrode being spaced apart from the gate, the layer of ferroelectric material having two stable states of internal polarization, and the arrangement being such that the two states of polarization have a detectable difference in effect upon the transfer characteristic of the transistor. The arrangement enables cross-talk between memory cells upon write to be avoided and can mitigate physical interface problems between the ferroelectric material and the active layer.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: June 17, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Satoshi Inoue, Ichio Yudasaka, Piero Migliorato
  • Patent number: 6580129
    Abstract: The present invention provides, in a TFT, a gate electrode and a channel domain that are plurally divided in the channel-length direction, a low-concentration domain that is formed between the divided channel domains, and a low-concentration drain domain that adjoins a second channel domain located closest to a drain domain side among the divided channel domains. Therefore, even if the impurity concentration is relatively high in the low-concentration domain located between the divided channel domains and a low-concentration drain domain, an abnormal increase of drain current in the saturated region can be prevented, and a TFT with a high drain current level can be obtained. Thus, the present invention provides a TFT and its manufacturing method where abnormal increase of drain current in the saturated region can be prevented and the drain current level in the saturated region is sufficiently high.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: June 17, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Basil Lui, Piero Migliorato, Ichio Yudasaka, Mitsutoshi Miyasaka
  • Publication number: 20030087110
    Abstract: Provided is a method of forming a silicon thin-film which comprises a step of arranging in one or more parts of a liquid arranging surface liquid which contains a silicide comprising ring silane and/or a derivative thereof, such ring silane comprising silicon and hydrogen, and a step of forming a silicon thin-film by vaporizing silicide from liquid and supplying the silicide to a thin-film-forming surface.
    Type: Application
    Filed: December 28, 2001
    Publication date: May 8, 2003
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Masahiro Furusawa, Satoru Miyashita, Ichio Yudasaka, Tatsuya Shimoda, Yasuaki Yokoyama, Yasuo Matsuki, Yasumasa Takeuchi
  • Publication number: 20030080337
    Abstract: The present invention provides a thin film transistor (TFT) and its production method which enable the stabilizing of saturation current and improving reliability by improving the film quality of the channel region. The TFT includes a channel region towering over a gate electrode through a gate insulation film, a source region connecting to the channel region and a drain region connecting to the channel region on an opposite side of the source region are formed on the polycrystal semiconductor film on which island-like patterning is performed. An indented section is formed on a surface of the channel region, and the section corresponding to the indented section becomes a recombination center which captures the small-number carrier (holes) because the degree of the crystallization is low in the section corresponding to the indented section due to shift from the optimum conditions at the time of laser annealing of the semiconductor.
    Type: Application
    Filed: December 11, 2001
    Publication date: May 1, 2003
    Inventors: Ichio Yudasaka, Mitsutoshi Miyasaka, Piero Migliorato
  • Publication number: 20030076608
    Abstract: A thin film formation method in accordance with the present invention forms banks (110) where affinity bank layers and non-affinity bank layers are alternately layered by repeating a step of forming an affinity bank layer (111-11n) with a material having affinity for a thin film material solution (130) (such inorganic material as SiO2) and a step of forming a non-affinity bank layer (121-12n) with a material having non-affinity for the thin film material solution (130) (such organic material as resist) one or more times. Finally the thin film material solution (130) is filled between banks by an ink jet method, heat treatment is executed, and a thin film layer (131-13n) is sequentially layered. By these steps, cost required for affinity control can be decreased and forming multi-layer thin films with uniform film thickness becomes possible.
    Type: Application
    Filed: September 20, 2002
    Publication date: April 24, 2003
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 6548356
    Abstract: A semiconductor transistor comprising a substrate having an active layer formed thereon, a source and a drain formed in the active layer, a gate insulating layer formed on the active layer and a gate electrode formed on the insulating layer, wherein the gate electrode is split, the active layer has a doped region located between the source and the drain and aligned with the split in the gate electrode, and the gate electrode is aligned with the drain so as not to overlap the drain. The transistor may be formed using a method comprising the steps of: providing a semiconductor layer in which the source and drain are to be formed; forming a gate insulating layer on the semiconductor layer; forming a split gate electrode on the gate insulating layer; and using the split gate electrode as a mask in the doping of a portion of the semiconductor layer between the source and the drain of the final transistor.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: April 15, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Basil Lui, Piero Migliorato, Ichio Yudasaka, Mitsutoshi Miyasaka
  • Patent number: 6541354
    Abstract: A solution containing a cyclic silane compound, which does not contain carbon, and/or a silane compound modified by boron or phosphorus is applied onto a substrate and a silicon precursor film is formed, and the film is then transformed into semiconductor silicon by heat and/or light treatment. Thereby, it is possible to easily produce a silicon film having satisfactory characteristics as an electronic material at low costs, differing from the vacuum process, such as by CVD methods.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: April 1, 2003
    Assignees: Seiko Epson Corporation, JSR Corporation
    Inventors: Tatsuya Shimoda, Satoru Miyashita, Shunichi Seki, Masahiro Furusawa, Ichio Yudasaka, Yasumasa Takeuchi, Yasuo Matsuki
  • Patent number: 6541918
    Abstract: An active-matrix light-emitting apparatus is provided having step-cutting insulation films, each film having upper portions protruding as overhang sections in interlayer portions of pixel electrodes and light-emitting layers in border regions of interpixel sections. Therefore, the light-emitting layers, even when formed so as to overlap a plurality of pixels and to produce step cutting at the overhang sections, are insulated in each of the pixels. Accordingly, crosstalk is avoided in these interpixel sections, and display quality is improved.
    Type: Grant
    Filed: November 12, 1999
    Date of Patent: April 1, 2003
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20030057424
    Abstract: The present invention provides, in a TFT, a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite the source region that are formed in a polycrystal semiconductor film that was patterned in island forms. In the channel region, a recombination center is formed for capturing a small number of carriers (holes) by impurities, such as inert-gas, metals, Group III elements, Group IV elements and Group V elements, introduced to a predetermined region in this channel region, or by defects generated due to the introduction of these impurities. The present invention thus provides an arrangement restraining bipolar transistor type behavior to stabilize saturation current and to provide a TFT that can improve reliability.
    Type: Application
    Filed: December 12, 2001
    Publication date: March 27, 2003
    Inventors: Ichio Yudasaka, Mitsutoshi Miyasaka, Piero Migliorato
  • Publication number: 20030059989
    Abstract: The present invention provides a thin-film transistor (TFT) and its production method which enables an arrangement restraining bipolar transistor type behavior, in order to stabilize saturation current and to provide a TFT that can improve reliability. The TFT includes a channel region facing a gate electrode through a gate insulating film, a source electrode connected to the channel region and a drain region connected to the channel region on the side opposite this source region are formed in a polycrystal semiconductor film that was patterned in island forms. In the channel region, a recombination center is formed for capturing a small number of carriers (holes) by introducing impurities, such as inert gases, metals, Group III elements, Group IV elements and Group V elements after a crystallization process is carried out on a semiconductor film 100.
    Type: Application
    Filed: December 18, 2001
    Publication date: March 27, 2003
    Inventors: Ichio Yudasaka, Mitsutoshi Miyasaka, Piero Migliorato
  • Patent number: 6518700
    Abstract: An organic light-emitting device comprising a transparent cover sheet; a region of organic light-emitting material behind the cover sheet; a region of circuitry behind the cover sheet for regulating the flow of current to the organic light-emitting material; and a non-light-transmissive layer which lies between the cover sheet and the circuitry.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: February 11, 2003
    Assignees: Cambridge Display Technology Limited, Seiko Epson Corporation
    Inventors: Richard Henry Friend, Karl Pichler, Ichio Yudasaka
  • Patent number: 6518087
    Abstract: A solar battery is provided having a structure in which at least two semiconductor thin-films are disposed one over the other between a pair of electrodes, each semiconductor thin-film differing from the other in the impurity concentration thereof and/or the type of semiconductor. Formation of at least one of the semiconductor thin-films consists of coating a liquid coating composition containing a silicon compound so as to form a coating film and a step of converting the coating film into a silicon film by heat treatment and/or light treatment.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: February 11, 2003
    Assignees: Seiko Epson Corporation, JSR Corporation
    Inventors: Masahiro Furusawa, Shunichi Seki, Satoru Miyashita, Tatsuya Shimoda, Ichio Yudasaka, Yasuo Matsuki, Yasumasa Takeuchi
  • Patent number: 6514801
    Abstract: All or a part of the thin films such as a silicon film, an insulation film and a conductive film constituting the thin film transistor is formed using a liquid material. The method mainly consist of the steps of: foaming a coating film by coating a substrate with the liquid material; and forming a thin film with a desired thickness by heat-treating the coating film.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: February 4, 2003
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Shunichi Seki
  • Patent number: 6498049
    Abstract: A method for forming a display device, comprising: depositing a thin-film transistor switch circuit on a substrate; depositing by ink-jet printing an electrode layer of light transmissive conductive organic material in electrical contact with the output of the thin-film transistor circuit; and depositing an active region of the device over the electrode layer.
    Type: Grant
    Filed: August 17, 2000
    Date of Patent: December 24, 2002
    Assignees: Cambridge Display Technology, Seiko Epson Corporation
    Inventors: Richard H. Friend, Carl R. Towns, Julian C. Carter, Stephen K. Heeks, Hermann F. Wittman, Karl Pichler, Ichio Yudasaka
  • Publication number: 20020179906
    Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
    Type: Application
    Filed: July 9, 2002
    Publication date: December 5, 2002
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Sadao Kanbe, Wakao Miyazawa