Patents by Inventor Ichio Yudasaka

Ichio Yudasaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6476988
    Abstract: A thin film formation method in accordance with the present invention forms banks (110) where affinity bank layers and non-affinity bank layers are alternately layered by repeating a step of forming an affinity bank layer (111-11n) with a material having affinity for a thin film material solution (130) (such inorganic material as SiO2) and a step of forming a non-affinity bank layer (121-12n) with a material having non-affinity for the thin film material solution (130) (such organic material as resist) one or more times. Finally the thin film material solution (130) is filled between banks by an ink jet method, heat treatment is executed, and a thin film layer (131-13n) is sequentially layered. By these steps, cost required for affinity control can be decreased and forming multi-layer thin films with uniform film thickness becomes possible.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: November 5, 2002
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20020158248
    Abstract: The present invention provides, in a TFT, a gate electrode and a channel domain that are plurally divided in the channel-length direction, a low-concentration domain that is formed between the divided channel domains, and a low-concentration drain domain that adjoins a second channel domain located closest to a drain domain side among the divided channel domains. Therefore, even if the impurity concentration is relatively high in the low-concentration domain located between the divided channel domains and a low-concentration drain domain, an abnormal increase of drain current in the saturated region can be prevented, and a TFT with a high drain current level can be obtained. Thus, the present invention provides a TFT and its manufacturing method where abnormal increase of drain current in the saturated region can be prevented and the drain current level in the saturated region is sufficiently high.
    Type: Application
    Filed: December 13, 2001
    Publication date: October 31, 2002
    Inventors: Basil Lui, Piero Migliorato, Ichio Yudasaka, Mitsutoshi Miyasaka
  • Publication number: 20020158269
    Abstract: A semiconductor transistor comprising a substrate (10) having an active layer (14) formed thereon, a source (32) and a drain (30,38) formed in the active layer, a gate insulating layer (16) formed on the active layer and a gate electrode (34) formed on the insulating layer, wherein the gate electrode is split, the active layer has a doped region (36) located between the source and the drain and aligned with the split in the gate electrode, and the gate electrode is aligned with the drain so as not to overlap the drain. The transistor may be formed using a method comprising the steps of: providing a semiconductor layer (14) in which the source (32) and drain (30, 38) are to be formed; forming a gate insulating layer (16) on the semiconductor layer; forming a split gate electrode (34) on the gate insulating layer, and using the split gate electrode as a mask in the doping of a portion (36) of the semiconductor layer between the source and the drain of the final transistor.
    Type: Application
    Filed: December 13, 2001
    Publication date: October 31, 2002
    Inventors: Basil Lui, Piero Migliorato, Ichio Yudasaka, Mitsutoshi Miyasaka
  • Publication number: 20020100908
    Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
    Type: Application
    Filed: June 4, 1999
    Publication date: August 1, 2002
    Inventors: ICHIO YUDASAKA, TATSUYA SHIMODA, SADAO KANBE, WAKAO MIYAZAWA
  • Publication number: 20020097363
    Abstract: In order to provide an active matrix display device in which a thick insulating film is preferably formed around an organic semiconductive film of a thin film luminescent device without damaging the thin film luminescent device, the active matrix display device is provided with a bank layer (bank) along a data line (sig) and a scanning line (gate) to suppress formation of parasitic capacitance in the data line (sig), in which the bank layer (bank) surrounds a region that forms the organic semiconductive film of the thin film luminescent device by an ink-jet process. The bank layer (bank) includes a lower insulating layer formed of a thick organic material and an upper insulating layer of an organic material which is deposited on the lower insulating layer and has a smaller thickness so as to avoid contact of the organic semiconductive film with the upper insulating layer.
    Type: Application
    Filed: March 22, 2002
    Publication date: July 25, 2002
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20020089497
    Abstract: In an active matrix display device, each pixel is provided with a pixel electrode, an organic semiconductor film deposited on the upper layer side of the pixel electrode, and a thin film luminescent element provided with an opposing electrode formed on the upper layer side of the organic semiconductor film. A protective film covering almost the entire surface of a substrate is formed on the upper layer of the opposing electrode. The protective film prevents the entry of moisture or oxygen to inhibit the deterioration of the thin film luminescent element.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 11, 2002
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Ichio Yudasaka
  • Publication number: 20020075207
    Abstract: An active matrix display device is provided in which parasitic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film, and disconnection or the like does not occur in an opposing electrode formed on the upper layer of the thick insulating film. In the active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines. By depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have a step due to the existence of the bank layer, disconnection of the opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.
    Type: Application
    Filed: November 27, 2001
    Publication date: June 20, 2002
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Ichio Yudasaka
  • Publication number: 20020074547
    Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
    Type: Application
    Filed: July 10, 2001
    Publication date: June 20, 2002
    Applicant: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Sadao Kanbe, Wakao Miyazawa
  • Publication number: 20020054522
    Abstract: A semiconductor memory device comprising: an active layer in which are formed a transistor source, channel and drain; a gate for the transistor; a layer of ferroelectric material; and an electrode for applying a voltage to the ferroelectric material; the electrode being spaced apart from the gate, the layer of ferroelectric material having two stable states of internal polarization, and the arrangement being such that the two states of polarization have a detectable difference in effect upon the transfer characteristic of the transistor. The arrangement enables cross-talk between memory cells upon write to be avoided and can mitigate physical interface problems between the ferroelectric material and the active layer.
    Type: Application
    Filed: September 27, 2001
    Publication date: May 9, 2002
    Inventors: Satoshi Inoue, Ichio Yudasaka, Piero Migliorato
  • Patent number: 6380672
    Abstract: In order to provide an active matrix display device in which a thick insulating film is preferably formed around an organic semiconductive film of a thin film luminescent device without damaging the thin film luminescent device, the active matrix display device is provided with a bank layer (bank) along a data line (sig) and a scanning line (gate) to suppress formation of parasitic capacitance in the data line (sig), in which the bank layer (bank) surrounds a region that forms the organic semiconductive film of the thin film luminescent device by an ink-jet process. The bank layer (bank) includes a lower insulating layer formed of a thick organic material and an upper insulating layer of an organic material which is deposited on the lower insulating layer and has a smaller thickness so as to avoid contact of the organic semiconductive film with the upper insulating layer.
    Type: Grant
    Filed: April 21, 1999
    Date of Patent: April 30, 2002
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 6373453
    Abstract: An active matrix display device is provided in which parasitic capacitance or the like is suppressed by forming a thick insulating film around an organic semiconductor film, and disconnection or the like does not occur in an opposing electrode formed on the upper layer of the thick insulating film. In the active matrix display device, first, a bank layer composed of a resist film is formed along data lines and scanning lines. By depositing an opposing electrode of a thin film luminescent element on the upper layer side of the bank layer, capacitance that parasitizes the data lines can be suppressed. Additionally, a discontinuities portion is formed in the bank layer. Since the discontinuities portion is a planar section which does not have a step due to the existence of the bank layer, disconnection of the opposing electrode does not occur at this section. When an organic semiconductor film is formed by an ink jet process, a liquid material discharged from an ink jet head is blocked by the bank layer.
    Type: Grant
    Filed: April 20, 1999
    Date of Patent: April 16, 2002
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20020034585
    Abstract: A process capable of forming a silicon film on a substrate efficiently, for example, at a high yield and a high forming rate with simple operation and device unlike CVD and plasma CVD.
    Type: Application
    Filed: September 10, 2001
    Publication date: March 21, 2002
    Applicant: JSR CORPORATION
    Inventors: Yasuo Matsuki, Yasuaki Yokoyama, Yasumasa Takeuchi, Masahiro Furusawa, Ichio Yudasaka, Satoru Miyashita, Tatsuya Shimoda
  • Patent number: 6359606
    Abstract: In an active matrix display device, each pixel is provided with a pixel electrode, an organic semiconductor film deposited on the upper layer side of the pixel electrode, and a thin film luminescent element provided with an opposing electrode formed on the upper layer side of the organic semiconductor film. A protective film covering almost the entire surface of a substrate is formed on the upper layer of the opposing electrode. The protective film prevents the entry of moisture or oxygen to inhibit the deterioration of the thin film luminescent element.
    Type: Grant
    Filed: July 1, 1999
    Date of Patent: March 19, 2002
    Assignee: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Publication number: 20020022148
    Abstract: [Objective]
    Type: Application
    Filed: August 23, 2001
    Publication date: February 21, 2002
    Applicant: Seiko Epson Corporation
    Inventor: Ichio Yudasaka
  • Patent number: 5989945
    Abstract: Any one of an insulating film forming a TFT, a silicon film and a conductive film is formed by applying a solution and annealing it. In a spin coater (102), a coating solution containing a thin film component which is supplied from a solution storage section (105) is spin-coated onto a substrate. The substrate after coating the coating solution is annealed in an annealing section (103) to form a coating film on the substrate. Additional laser annealing improves one of film characteristics, i.e., crystallinity, density and adhesiveness. Application of the coating solution or a resist by an ink jet process increases utilization of the solution and permits forming a patterned coating film. Because a thin film device in accordance with the present invention is inexpensive and has a high throughput, TFT production by a production system having high utilization of the coating solution drastically reduces initial investment and production cost of a liquid crystal display device.
    Type: Grant
    Filed: February 13, 1998
    Date of Patent: November 23, 1999
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Tatsuya Shimoda, Sadao Kanbe, Wakao Miyazawa
  • Patent number: 5953582
    Abstract: In the formation of a thin-film transistor (620) capable of improving the OFF current characteristic, first, all ions (arrow Ion-1) generated from a mixed gas (doping gas) containing 5% PH.sub.3 with the remainder being H.sub.2 gas are implanted to a polycrystalline silicon film (604) at an approximately 80 keV energy level to achieve a P.sup.+ ion dose in the range from 3.times.10.sup.13 /cm.sup.2 to 1.times.10.sup.14 /cm.sup.2 in the process forming low concentration source-drain areas (602, 603). Next, all ions generated from a doping gas of pure hydrogen (arrow Ion-2) are implanted to the low concentration area (604a) at an approximately 20 keV energy level to achieve an H.sup.+ ion dose from 1.times.10.sup.14 /cm.sup.2 to 1.times.10.sup.15 /cm.sup.2. Then, the impurity is activated by heat treatment of the low concentration area (604a) implanted with impurity for approximately one hour at approximately 300.degree. C. in a nitrogen atmosphere.
    Type: Grant
    Filed: June 27, 1997
    Date of Patent: September 14, 1999
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Minoru Matsuo, Satoshi Takenaka
  • Patent number: 5563427
    Abstract: In the formation of a thin-film transistor (620) capable of improving the OFF current characteristic, first, all ions (arrow Ion-1) generated from a mixed gas (doping gas) containing 5% PH.sub.3 with the remainder being H.sub.2 gas are implanted to a polycrystalline silicon film (604) at an approximately 80 keV energy level to achieve a P.sup.+ ion dose in the range from 3.times.10.sup.13 /cm.sup.2 to 1.times.10.sup.14 /cm.sup.2 in the process forming low concentration source-drain areas (602, 603). Next, all ions generated from a doping gas of pure hydrogen (arrow Ion-2) are implanted to the low concentration area (604a) at an approximately 20 keV energy level to achieve an H.sup.+ ion dose from 1.times.10.sup.14 /cm.sup.2 to 1.times.10.sup.15 /cm.sup.2. Then, the impurity is activated by heat treatment of the low concentration area (604a) implanted with impurity for approximately one hour at approximately 300.degree. C. in a nitrogen atmosphere.
    Type: Grant
    Filed: December 6, 1994
    Date of Patent: October 8, 1996
    Assignee: Seiko Epson Corporation
    Inventors: Ichio Yudasaka, Minoru Matsuo, Satoshi Takenaka
  • Patent number: 5414547
    Abstract: As shown in FIG. 8, black matrices (216) made of molybdenum silicide layers (216bb . . . ) also are, for each of plural pixel regions (201bb . . . ), provided on a transparent substrate (209) having a matrix array. The molybdenum layers (216bb) are insulated and separated from data lines (202a, 202b, gate lines 203a, 203b) and surrounding molybdenum silicide layers (216ab, 216ba . . . ) on the boundary regions with surrounding pixel regions, but are electrically connected to a pixel electrode (206) of its pixel region (201bb). The outer end of the molybdenum silicide layer (216bb) and the outer end of the pixel electrode (206) coincide with each other.
    Type: Grant
    Filed: July 16, 1993
    Date of Patent: May 9, 1995
    Assignee: Seiko Epson Corporation
    Inventors: Mutsumi Matsuo, Ichio Yudasaka, Kiyohiko Kanai, Katsumi Nagase, Takashi Inoue