Patents by Inventor In Chang Hwang

In Chang Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110133769
    Abstract: An LED package interface inspection apparatus for an LED device comprises a current source, a voltage measuring unit, and a testing control unit. The testing control unit provides at least one control signal to command the current source to output at least one current for the LED device. The testing control unit also provides at least two signals to command the voltage measuring unit to measure a first forward voltage of the LED device at a first time and a second forward voltage of the LED device at a second time. The testing control unit calculates a voltage difference between the first forward voltage and the second forward voltage, and determines that the LED device is defective if the voltage difference is larger than a predetermined threshold value.
    Type: Application
    Filed: June 25, 2010
    Publication date: June 9, 2011
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chiu Ling CHEN, Fei Chang Hwang, Chien Ping Wang, Sheng Pan Huang
  • Publication number: 20110120171
    Abstract: An air-cooling type chiller is provided. The chiller may include a plurality of fans, and an intermediate device provided between adjacent fans of the plurality of fans. When one of the fans is disabled, air is not drawn in through the disabled fan due to the intermediate device, but instead may pass through a condenser, thereby minimizing degradation in condensing efficiency. The intermediate device may be formed as an auxiliary condenser so that any air drawn in through a disabled fan passes through the auxiliary condenser, also minimizing impact on condensing efficiency.
    Type: Application
    Filed: March 17, 2010
    Publication date: May 26, 2011
    Inventors: Nam-Joon Cho, Gi-Seop Lee, Bon-Chang Hwang, Jong-Ho Hong
  • Publication number: 20110086467
    Abstract: A method of fabricating an organic thin film transistor is disclosed, which comprises steps of (S1) forming a gate electrode on a substrate; (S2) forming a gate insulating layer on the gate electrode; (S3) providing a gas on the surface of the gate insulating layer to form hydrophobic molecules on the surface of the gate insulating layer; (S4) forming an organic semiconductor layer, a source electrode, and a drain electrode over the gate insulating layer having hydrophobic molecules thereon, wherein the gas of step (S3) is at least one selected from the group consisting of halogen-substituted hydrocarbon, un-substituted hydrocarbon, and the mixtures thereof. The method of the present invention utilizes gases comprising carbon or fluorine atom to perform surface treatment on the surface of the gate insulating layer, therefore the hydrophobic character of the surface of the gate insulating layer can be enhanced and the electrical properties of the OTFT can be improved.
    Type: Application
    Filed: January 26, 2010
    Publication date: April 14, 2011
    Applicant: National Tsing Hua University
    Inventors: Cheng Wei Chou, Hsiano Wen Zan, Jenn-Chang Hwang, Chung Hwa Wang, Li Shiuan Tsai, Wen Chieh Wang
  • Publication number: 20110065233
    Abstract: The present invention relates to a method for fabricating an organic thin film transistor, including: (A) providing a gate electrode; (B) forming a gate insulating layer on the gate electrode; and (C) forming an organic active layer, a source electrode and a drain electrode over the gate insulating layer, and increasing crystallinity of the organic active layer by irradiating the organic active layer. Accordingly, through irradiation, the present invention can efficiently enhance the field effect mobility, and thereby significantly improves the device performance of an organic thin film transistor. Additionally, irradiation mentioned in the present invention also can be used for repairing an organic thin film transistor.
    Type: Application
    Filed: January 26, 2010
    Publication date: March 17, 2011
    Applicant: National Tsing Hua University
    Inventors: Jenn-Chang Hwang, Chung Hwa Wang, Sheng-Wei Chen
  • Publication number: 20110059610
    Abstract: A method of backside metal process for semiconductor electronic devices, particularly of using an electroless plating for depositing a metal seed layer for the plated backside metal film. The backside of a semiconductor wafer, with electronic devices already fabricated on the front side, is first coated with a thin metal seed layer by electroless plating. Then, the backside metal layer, such as a gold layer or a copper layer, is coated on the metal seed layer. The metal seed layer not only increases the adhesion between the front side metal layer and the backside metal layer through backside via holes, but also prevents metal peeling after subsequent fabrication processes. This is helpful for increasing the reliability of device performances. Suitable materials for the metal seed layer includes Pd, Au, Ni, Ag, Co, Cr, Cu, Pt, or their alloys, such as NiP, NiB, AuSn, Pt—Rh and the likes.
    Type: Application
    Filed: January 15, 2010
    Publication date: March 10, 2011
    Applicant: WIN Semiconductors Corp.
    Inventors: Chang-Hwang Hua, Wen Chu
  • Patent number: 7888942
    Abstract: A life test device comprises an oven, a current source, a voltage meter, a control module, and a process module. A light-emitting diode (LED) is disposed in the oven. The temperature of the oven is gradually changed in a first period and remains at a set temperature in a second period. The current source provides a first current and a second current to the LED. The voltage meter measures forward voltages of the LED. The control module controls the current source to output the first or second current to the LED and controls the voltage meter to measure the forward voltages of the LED. The process module calculates a junction temperature of the LED according to the forward voltages and a variation relationship formula between the forward voltages and the temperature of the oven.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: February 15, 2011
    Assignee: Industrial Technology Research Institute
    Inventors: Chiu-Ling Chen, Sheng-Pan Huang, Fei-Chang Hwang
  • Publication number: 20110012137
    Abstract: A structure of light-emitting diode (LED) dies having an AC loop (a structure of AC LED dies), which is formed with at least one unit of AC LED micro-dies disposed on a chip. The unit of AC LED micro-dies comprises two LED micro-dies arranged in mutually reverse orientations and connected with each other in parallel, to which an AC power supply may be applied so that the LED unit may continuously emit light in response to a positive-half wave voltage and a negative-half wave voltage in the AC power supply. Since each AC LED micro-die is operated forwardly, the structure of AC LED dies also provides protection from electrical static charge (ESD) and may operate under a high voltage.
    Type: Application
    Filed: August 23, 2010
    Publication date: January 20, 2011
    Applicants: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE, EPISTAR CORPORATION
    Inventors: Ming-Te LIN, Fei-Chang Hwang, Chia-Tai Kuo
  • Publication number: 20100327872
    Abstract: A life test device comprises an oven, a current source, a voltage meter, a control module, and a process module. A light-emitting diode (LED) is disposed in the oven. The temperature of the oven is gradually changed in a first period and remains at a set temperature in a second period. The current source provides a first current and a second current to the LED. The voltage meter measures forward voltages of the LED. The control module controls the current source to output the first or second current to the LED and controls the voltage meter to measure the forward voltages of the LED. The process module calculates a junction temperature of the LED according to the forward voltages and a variation relationship formula between the forward voltages and the temperature of the oven.
    Type: Application
    Filed: November 21, 2008
    Publication date: December 30, 2010
    Applicant: Industrial Technology Research Institute
    Inventors: Chiu-Ling Chen, Sheng-Pan Huang, Fei-Chang Hwang
  • Patent number: 7808921
    Abstract: A method for identifying a bridge node in a network using a processor and memory unit in a specially programmed special purpose-purpose computer including the steps of, for each node in a plurality of nodes in the network: determining a global metric proportional to total traffic flow in the network and through the node; determining a local metric proportional to traffic flow between the node and each second node in the network connected to the node and traffic flow between each second node and each third node in the network connected to a second node; determining a second local metric proportional to the respective traffic flows between each node and each second node; and calculating a respective combination of the global metric and the first and second local metrics; and selecting, a bridge node from among the plurality of nodes based on the respective combinations.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: October 5, 2010
    Assignee: The Research Foundation of State University of New York
    Inventors: Aidong Zhang, Murali Ramanathan, Woo-Chang Hwang, Young-Rae Cho
  • Publication number: 20100230662
    Abstract: An organic thin film transistor is disclosed, which comprises an azole-metal complex compound used as the gate insulating layer. The method of making the self-assembled gate insulating layer is a water-based processing method that enables the azole-metal complex compound to be self-formed on the patterned gate electrode in a water-based solution and serves as a gate insulating layer. The organic thin film transistor (OTFT) of the present invention comprises the azole-metal complex compound used in the gate insulating layer, therefore can be manufactured in a simple, quick, easy way for large quantities, and low cost.
    Type: Application
    Filed: September 15, 2009
    Publication date: September 16, 2010
    Applicant: National Tsing Hua University
    Inventors: Sheng-Wei Chen, Chung--Hua Wang, Jenn-Chang Hwang
  • Patent number: 7763529
    Abstract: A method of fabricating a silicon carbide (SiC) layer is disclosed, which comprises steps: (S1) heating a silicon-based substrate at a temperature of X ° C.; (S2) carburizating the silicon-based substrate with a first hydrocarbon-containing gas at a temperature of Y ° C. to form a carbide layer on the silicon-based substrate; (S3) annealing the silicon-based substrate with the carbide layer thereon at a temperature of Z ° C.; and (S4) forming a silicon carbide layer on the carbide layer with a second hydrocarbon-containing gas and a silicon-containing gas at a temperature of W ° C.; wherein, X is 800 to 1200; Y is 1100 to 1400; Z is 1200 to 1500; W is 1300 to 1550; and X<Y?Z?W. In the method of the present invention, since no cooling steps between respective steps are required, the full process time can be reduced and the cost is lowered because no energy consumption occurs for the cooling and the re-heating steps.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: July 27, 2010
    Assignee: National Tsing Hua University
    Inventors: Wei-Yu Chen, Jenn-Chang Hwang, Chih-Fang Huang, Chien-Cheng Chen
  • Patent number: 7738462
    Abstract: A method and apparatus for processing data in a Controller Area Network (CAN) are discussed. In an embodiment of this invention, dummy data is added to data to be transmitted via a CAN message, and information indicating that the dummy data is added is transmitted via the CAN message. A length of the dummy data is determined such that data to be transmitted via the CAN message becomes a predetermined length, and data in which five or more successive bits do not have a same value is added as the dummy data. The information is included in a field indicating a length of data to be transmitted via the CAN message, and is indicated by a value within a reserved range of the field. Accordingly, data processing efficiency can be improved, and flexible CAN communication can be performed via the CAN message.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: June 15, 2010
    Assignee: LG Electronics Inc.
    Inventor: Hee Chang Hwang
  • Publication number: 20100081261
    Abstract: A method of fabricating a silicon carbide (SiC) layer is disclosed, which comprises steps: (S1) heating a silicon-based substrate at a temperature of X ° C.; (S2) carburizating the silicon-based substrate with a first hydrocarbon-containing gas at a temperature of Y ° C. to form a carbide layer on the silicon-based substrate; (S3) annealing the silicon-based substrate with the carbide layer thereon at a temperature of Z ° C.; and (S4) forming a silicon carbide layer on the carbide layer with a second hydrocarbon-containing gas and a silicon-containing gas at a temperature of W ° C.; wherein, X is 800 to 1200; Y is 1100 to 1400; Z is 1200 to 1500; W is 1300 to 1550; and X<Y?Z?W. In the method of the present invention, since no cooling steps between respective steps are required, the full process time can be reduced and the cost is lowered because no energy consumption occurs for the cooling and the re-heating steps.
    Type: Application
    Filed: September 25, 2009
    Publication date: April 1, 2010
    Applicant: National Tsing Hua University
    Inventors: Wei-Yu Chen, Jenn-Chang Hwang, Chih-Fang Huang, Chien-Cheng Chen
  • Publication number: 20100035405
    Abstract: A method for mounting a thinned semiconductor wafer on a carrier substrate for further processing is disclosed. The method consists of a series of steps, which is based on providing a frame with a double-side tape to mount the thinned wafer on the carrier substrate. The frame is used to support the double-side tape and can be designed to fit the conventional production line for holding, picking and transferring wafers. The carrier substrate can be a sapphire substrate, a quartz substrate or other substrates that can sustain further processing, such as thermal treatments and/or chemical etchings. The method of the present invention not only prevents possible damages to the highly brittle chip after wafer thinning, but also fits the conventional production line for processing semiconductor wafers.
    Type: Application
    Filed: August 7, 2008
    Publication date: February 11, 2010
    Applicant: WIN Semiconductors Corp.
    Inventors: Jason Chou, Chang-Hwang Hua, Ping-Wei Chen, Sen Yang
  • Publication number: 20100014235
    Abstract: An electronic device is provided, and includes a keyboard module and a display module. The keyboard module includes a first key area, a second key area, and a joining area disposed between the first key area and the second key area. The display module has a connecting surface detachably disposed on the joining area and electrical connected to the keyboard module. The display module is stood on the keyboard module to face a first direction in a first operation mode and a second direction is opposite to the first direction in a second operation mode.
    Type: Application
    Filed: July 15, 2009
    Publication date: January 21, 2010
    Inventors: Chien-Hsin HUANG, Chang-Hwang Chiou
  • Patent number: 7606775
    Abstract: A scheduling apparatus and method of an intelligent mobile communication terminal are provided. The scheduling apparatus of the mobile communication terminal may include a Real Time Clock (RTC) for providing a real time when an action of a mobile terminal is proceeding; a memory for storing information of a user mode and a CPU for standardizing a time value, a user mode information and an action of the terminal transferred from the RTC to store in the memory. The CPU may further transfer the standardized data stored in the memory to a co-processor through an interrupt and the CPU may control peripheral devices upon receiving an output value from the co-processor. The co-processor may also be provided for receiving data from the CPU through an interrupt communication and calculating an output value according to an MOBP learning algorithm. An LCD may output a message according to the output value under the control of the CPU.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: October 20, 2009
    Assignee: LG Electronics Inc.
    Inventor: Ki-Chang Hwang
  • Publication number: 20090218580
    Abstract: A structure of light-emitting diode (LED) dies having an AC loop (a structure of AC LED dies), which is formed with at least one unit of AC LED micro-dies disposed on a chip. The unit of AC LED micro-dies comprises two LED micro-dies arranged in mutually reverse orientations and connected with each other in parallel, to which an AC power supply may be applied so that the LED unit may continuously emit light in response to a positive-half wave voltage and a negative-half wave voltage in the AC power supply. Since each AC LED micro-die is operated forwardly, the structure of AC LED dies also provides protection from electrical static charge (ESD) and may operate under a high voltage.
    Type: Application
    Filed: April 15, 2009
    Publication date: September 3, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INTSITUTE
    Inventors: Ming-Te LIN, Fei-Chang Hwang, Chia-Tai Kuo
  • Patent number: 7531843
    Abstract: A structure of light-emitting diode (LED) dies having an AC loop (a structure of AC LED dies), which is formed with at least one unit of AC LED micro-dies disposed on a chip. The unit of AC LED micro-dies comprises two LED micro-dies arranged in mutually reverse orientations and connected with each other in parallel, to which an AC power supply may be applied so that the LED unit may continuously emit light in response to a positive-half wave voltage and a negative-half wave voltage in the AC power supply. Since each AC LED micro-die is operated forwardly, the structure of AC LED dies also provides protection from electrical static charge (ESD) and may operate under a high voltage.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: May 12, 2009
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Te Lin, Fei-Chang Hwang, Chia-Tai Kuo
  • Publication number: 20090113713
    Abstract: A method for making a wheel rim includes the steps of: A) casting an aluminum alloy containing silicon and magnesium into a blank including a lateral portion and a disk portion that is surrounded by the lateral portion and that has a plurality of radial elements extending toward and connected to the lateral portion; B) forging the disk portion of the blank to form the radial elements into radial ribs; C) solution heat-treating the blank after forging; and D) spinning the lateral portion to form a rim body.
    Type: Application
    Filed: November 1, 2007
    Publication date: May 7, 2009
    Inventors: Wang-Fa Tsai, Shou-Chang Hwang
  • Patent number: 7527860
    Abstract: A vertical aligned nano-scale diamond structure comprising diamond nanotip or nanotube is provided. More particularly, apparatus and method are disclosed for depositing such diamond structure on a rugged polycrystalline substrate.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: May 5, 2009
    Assignee: National Tsing Hua University
    Inventors: Ya-Ko Chih, Jenn-Chang Hwang, Chwung-Shan Kuo, Da-Jeng Yao, Chien-Hsun Chen, An-Ping Lee, Chi-Ming Hung