Abstract: The present invention relates to a reclining apparatus for a rear seat of a vehicle, having a back frame having a upper end and a lower end; a cushion frame having a front side and a back side, wherein the back side of the cushion frame is pivotally connected to the lower end of the back frame; a back frame locking module disposed on the upper end of the back frame, the back frame locking module removably engageable to a body panel and acting as a pivot center when engaged with the body panel; and a guide module configured to guide the cushion frame pivotally connected to the back frame so that the lower portion of the back frame pivots about the upper portion when the cushion frame slides up forward or down rearward to allow the back frame to move between an upright position and a reclined position.

Abstract: A structure of a semiconductor chip with substrate via holes and metal bumps and a fabrication method thereof. The structure comprises a substrate, at least one backside metal layer, at least one first metal layer, at least one electronic device, and at least one metal bump. The substrate has at least one substrate via hole penetrating through the substrate. The at least one first metal layer and electronic device are formed on the front side of the substrate. The at least one metal bump is formed on the at least one first metal layer. The at least one backside metal layer is formed on the backside of the substrate covering the inner surface of the substrate via hole and at least part of the backside of the substrate and connected to the first metal layer on the top of the substrate via hole.

Abstract: An analog-to-digital converting circuit includes a first comparison circuit configured to compare a first analog signal associated with a first digital signal with an analog input signal and output a first selection signal based on a result of the comparison, a second comparison circuit configured to compare a second analog signal associated with a second digital signal with the analog input signal and output a second selection signal based on a result of the comparison, and a selection circuit configured to generate intermediate digital signals associated with the first digital signal and output one of the intermediate digital signals as the first digital signal and another of the intermediate digital signals as the second digital signal, based on the first selection signal and the second selection signal.

Abstract: An arrangement of light emitting diodes including a first micro-die, a second micro-die, a first bridge, a second bridge and a substrate supporting the first micro-die and the second micro die. The first micro-die includes a first edge having a first end and a second end, a second edge opposite and not parallel to the first edge, a first connecting portion near the first end, and a second connecting portion near the second end.

Abstract: A compound semiconductor integrated circuit chip has a front and/or back surface metal layer used for electrical connection to an external circuit. The compound semiconductor integrated circuit chip (first chip) comprises a substrate, an electronic device layer, and a dielectric layer. A first metal layer is formed on the front side of the dielectric layer, and a third metal layer is formed on the back side of the substrate. The first and third metal layer are made essentially of Cu and used for the connection to other electronic circuits. A second chip may be mounted on the first chip with electrical connection made with the first or the third metal layer that extend over the electronic device in the first chip in the three-dimensional manner to make the electrical connection between the two chips having connection nodes away from each other.

Abstract: The present invention relates to a reclining apparatus for a rear seat of a vehicle, having a back frame having a upper end and a lower end; a cushion frame having a front side and a back side, wherein the back side of the cushion frame is pivotally connected to the lower end of the back frame; a back frame locking module disposed on the upper end of the back frame, the back frame locking module removably engageable to a body panel and acting as a pivot center when engaged with the body panel; and a guide module configured to guide the cushion frame pivotally connected to the back frame so that the lower portion of the back frame pivots about the upper portion when the cushion frame slides up forward or down rearward to allow the back frame to move between an upright position and a reclined position.

Abstract: An N-type organic thin film transistor, an ambipolar field-effect transistor, and methods of fabricating the same are disclosed. The N-type organic thin film transistor of the present invention comprises: a substrate; a gate electrode locating on the substrate; a gate-insulating layer covering the gate electrode, and the gate-insulating layer is made of silk protein; a buffering layer locating on the gate-insulating layer, and the buffering layer is made of pentacene; an N-type organic semiconductor layer locating on the buffering layer; and a source and a drain electrode, wherein the N-type organic semiconductor layer, the buffering layer, the source and the drain electrode are disposed over the gate dielectric layer.

Abstract: The present invention relates to a premium advertising cost-sharing matching method, system, and advertising gift, which provides an advertising gift supplier and the advertisers to choose to share an advertising gift with other advertisers for advertising their own advertisement on said advertising gift and sharing an advertising cost.

Abstract: A fabrication method for producing semiconductor chips with enhanced die strength comprises following steps: forming a semiconductor wafer with enhanced die strength by comprising the substrate, the active layer on the front side of the substrate and the backside metal layer on the backside of the substrate, wherein at least one integrated circuit forms in the active layer; forming a protection layer on a front side of the semiconductor wafer; dicing the semiconductor wafer by at least one laser dicing process and removing the laser dicing residues and removing said protection layer by at least one etching process, whereby plural semiconductor chips with enhanced die strength are produced, and wherein the backside metal layer of said semiconductor chip fully covers the backside of said semiconductor chip after dicing.

Abstract: An improved structure of backside copper metallization for semiconductor devices and a fabrication method thereof, in which the improved structure comprises sequentially from top to bottom an active layer, a substrate, a backside metal seed layer, at least one thermal expansion buffer layer, a backside metal layer, and at least one oxidation resistant layer, in which the backside metal seed layer is formed of Pd, and the thermal expansion coefficient of the thermal expansion buffer layer is in the range between the thermal expansion coefficients of the backside metal seed layer and of the backside metal layer. The semiconductor chip using the structure provided by the present invention can sustain high-temperature operations.

Abstract: An analog-to-digital converting circuit includes a first comparison circuit configured to compare a first analog signal associated with a first digital signal with an analog input signal and output a first selection signal based on a result of the comparison, a second comparison circuit configured to compare a second analog signal associated with a second digital signal with the analog input signal and output a second selection signal based on a result of the comparison, and a selection circuit configured to generate intermediate digital signals associated with the first digital signal and output one of the intermediate digital signals as the first digital signal and another of the intermediate digital signals as the second digital signal, based on the first selection signal and the second selection signal.

Abstract: An electronic device is provided, and includes a keyboard module and a display module. The keyboard module includes a first key area, a second key area, and a joining area disposed between the first key area and the second key area. The display module has a connecting surface detachably disposed on the joining area and electrical connected to the keyboard module. The display module is stood on the keyboard module to face a first direction in a first operation mode and a second direction is opposite to the first direction in a second operation mode.

Abstract: The present invention provides a copper interconnect for III-V compound semiconductor devices, which comprises a metal contact layer and a copper-containing metal layer, in which the metal contact layer is formed of a material selected from a group consisting of Ti/Pd/Cu, Ti/NiV/Cu, TiW/TiWN/TiW/Cu, TiW/TiWN/TiW/Au, TiW/Cu, and TiW/Au, and the copper-containing metal layer comprises a copper layer. The copper-containing metal layer further includes a metal protection layer covering on the copper layer to prevent the copper layer from oxidation. The metal protection layer is formed of Ni/Au, Ni/Pd/Au, NiV/Au, or solder.

Abstract: A method of processing copper backside metal layer for semiconductor chips is disclosed. The backside of a semiconductor wafer, with electronic devices already fabricated on the front side, is first coated with a thin metal seed layer by either electroless plating or sputtering. Then, the copper backside metal layer is coated on the metal seed layer. The metal seed layer not only increases the adhesion between the front side metal layer and the copper backside metal layer through backside via holes, but also prevents metal peeling from semiconductor's substrate after subsequent fabrication processes, which is helpful for increasing the reliability of device performances. Suitable materials for the metal seed layer includes Pd, Au, Ni, Ag, Co, Cr, Pt, or their alloys, such as NiP, NiB, AuSn, Pt—Rh and the likes. The use of Pd as seed layer is particularly useful for the copper backside metal layer, because the Pd layer also acts as a diffusion barrier to prevent Cu atoms entering the semiconductor wafer.

Abstract: An electronic device including a bio-polymer material and a method for manufacturing the same are disclosed. The electronic device of the present invention comprises: a substrate; a first electrode disposed on the substrate; a bio-polymer layer disposed on the first electrode, wherein the bio-polymeric material is selected from a group consisting of wool keratin, collagen hydrolysate, gelatin, whey protein and hydroxypropyl methylcellulose; and a second electrode disposed on the biopolymer material layer. The present invention is suitable for various electronic devices such as an organic thin film transistor, an organic floating gate memory, or a metal-insulator-metal capacitor.

Abstract: An organic floating gate memory device having protein and a method of fabricating the same are disclosed.

Abstract: A portable electronic device includes a main body, a cap body and a hinge assembly. The cap body is movably attached to the main body, and the hinge assembly is disposed between the main body and the cap body. The hinge assembly includes a sliding portion and a rotating portion connected to each other. When the cap body and the main body are totally overlapped, the cap body is selectively to rotate or to slide with respect to the main body over the hinge assembly.

Abstract: The present invention relates to hydroxamate compounds of the following formula I, an isomer, pharmaceutically acceptable salt or hydrate thereof. The present invention also relates to a method for preparing the hydroxamate compounds, comprising allowing a compound of the following formula II to react with bromoaniline in the presence of an inorganic salt so as to prepare a compound of the following formula III.

Abstract: A circuit board and a method for manufacturing the same are disclosed. The circuit board of the present invention comprises: a carrier board, wherein a first circuit layer is disposed on at least one surface of the carrier board, and the first circuit layer comprises plural conductive pads; a protein dielectric layer disposed on the surface of the carrier board and the first circuit layer, wherein the protein dielectric layer has plural openings to expose the conductive pads; and a second circuit layer disposed on a surface of the protein dielectric layer, wherein the second circuit layer comprises plural first conductive vias, and each first conductive via is correspondingly formed in the opening and electrically connects to the conductive pad.

Abstract: An improved structure of semiconductor chips with enhanced die strength and a fabrication method thereof are disclosed. The improved structure comprises a substrate, an active layer, and a backside metal layer, in which the active layer is formed on the front side of the substrate and includes at least one integrated circuit; the backside metal layer is formed on the backside of the substrate, which fully covers the area corresponding to the area covered by the integrated circuits in the active layer. By using the specific dicing process of the present invention, the backside metal layer and the substrate can be diced tidily. Die cracking on the border between the substrate and the backside metal layer of the diced single chip can be prevented, and thereby the die strength can be significantly enhanced.