Abstract: The coil component according to an aspect of the present disclosure includes: a body having one surface and the other surface opposing each other, and a plurality of side surfaces connecting one side to the other side; a coil buried in the body and having an end exposed to the side surface of the body; an external electrode including a connection portion disposed on the side surface of the body and connected to the end of the coil, and an extension portion extending from the connection portion to one surface of the body; and a groove formed in one surface of the body and having a bottom surface, substantially parallel to one surface of the body, and an internal wall connecting the bottom surface to one surface of the body, wherein the extension portion extends along the internal wall and the bottom surface of the groove.

Abstract: A method of forming a semiconductor device includes forming a first interconnect structure over a carrier; forming a thermal dissipation block over the carrier; forming metal posts over the first interconnect structure; attaching a first integrated circuit die over the first interconnect structure and the thermal dissipation block; removing the carrier; attaching a semiconductor package to the first interconnect structure and the thermal dissipation block using first electrical connectors and thermal dissipation connectors; and forming external electrical connectors, the external electrical connectors being configured to transmit each external electrical connection into the semiconductor device, the thermal dissipation block being electrically isolated from each external electrical connection.

Abstract: Disclosed is an augmented reality content in-situ authoring method and apparatus. In an augmented reality content in-situ authoring method, a reference object or an augmented target object to be augmented may be selected from a camera preview image of a real world, a two-dimensional (2D) plane region may be recognized based on the selected reference object or the augmented target object and then a virtual 3D space may be constructed and divided based on the 2D plane region, and augmented reality content may be augmented through the divided space.

Abstract: Disclosed are an electronic device for monitoring an abnormal state of energy consumption and a method of operating the same. The method includes receiving factory data related to product production of a factory and energy used in the factory, determining an energy stability indicator (ESI) indicating an amount of the energy used for the product production based on the factory data, generating a normalized energy stability indicator distribution (ESID) with respect to a preset time period based on the ESI, determining a distribution difference by comparing the generated ESID and a reference distribution predetermined for energy consumption of the factory, and outputting one or more observed variables for monitoring an abnormal state of consumption of the energy with respect to a period in which the distribution difference is large.

Abstract: A semiconductor device including a substrate, a low-k dielectric layer, a cap layer, and a conductive layer is provided. The low-k dielectric layer is disposed over the substrate. The cap layer is disposed on the low-k dielectric layer, wherein a carbon atom content of the cap layer is greater than a carbon atom content of the low-k dielectric layer. The conductive layer is disposed in the cap layer and the low-k dielectric layer.

Abstract: Provided are an electric appliance and a method of manufacturing the same, the electric appliance having a smaller size and a reduced overall weight by preventing a fluid from flowing into a space unrelated to a heating component in a state where the fluid fills its case. The electric appliance includes: a case including a first space and a second space communicated to each other; a first component disposed in the first space; a second component disposed in the second space; a connection portion electrically connecting the first component and the second component to each other; and a potting pattern including a resin material and formed in the first space.

Abstract: A multilayer electronic component includes a body including a dielectric layer and first and second internal electrodes alternately disposed in a first direction with the dielectric layer interposed therebetween, and having first and second surfaces in the first direction, third and fourth surfaces in a second direction, and fifth and sixth surfaces in a third direction; side margin portions disposed on the fifth and sixth surfaces; and external electrodes disposed on the third and fourth surfaces. Side margin portions includes BaTiO3, Zn, and Zr, an amount of Zn and an amount of Zr in the side margin portions are 0.5 mol or more and 1.0 mol or less, relative to 100 mol of Ti included in the side margin portions. The amount of Zn and the amount of Zr in the side margin portions are different from an amount of Zn and an amount of Zr in the dielectric layer.

Abstract: According to an aspect of the present disclosure, a display device includes a substrate in which a pixel including a plurality of sub pixels is defined; an adhesive layer disposed on the substrate; and a plurality of light emitting diodes self-assembled which are transferred onto the adhesive layer and disposed in the plurality of sub pixels. Accordingly, the light emitting diode is disposed on the adhesive layer to fix the light emitting diode which is transferred from the donor.

Abstract: A multilayer electronic component includes a body including a dielectric layer and internal electrodes; and external electrodes disposed on the body, wherein the dielectric layer includes a plurality of dielectric grains having a perovskite-based composition represented by ABO3, the A includes a first element including at least one of Bi, Na, K, Sr, and Ca, and the B includes a second element including Ti, wherein at least one of the plurality of dielectric grains has a core-shell structure, and a content of the first element included in the core portion is twice or more than a content of the first element included in the shell portion, and wherein the core portion includes a first core portion on an internal side and a second core portion covering at least a portion of the first core portion, and the second core portion includes Zr.

Abstract: Provided is a capacitor, a semiconductor device including the same, and an electronic apparatus including the semiconductor device, wherein the capacitor includes a first electrode including a first metal ion, a second electrode arranged spaced apart from the first electrode, a dielectric layer provided between the first electrode and the second electrode, and an interfacial layer provided between the first electrode and the dielectric layer and including a compound represented by MxOyNz, in which a diffusion energy barrier value of M is equal to or greater than a diffusion energy barrier value of the first metal ion.

Abstract: An electrostatic chuck includes an electrostatic chuck body having a step portion protruding from a lower end, an adhesive layer disposed on an upper surface of the electrostatic chuck body, a ceramic puck adhered to the adhesive layer and having an edge protruding from the upper surface of the electrostatic chuck body, and a sealant disposed between the step portion and the edge of the ceramic puck and configured to block reaction gas from permeating into the adhesive layer. The sealant includes a coating layer disposed on an external surface thereof, and the coating layer includes a metal oxide including a single rare earth oxide and/or a multilayer heterogeneous metal oxide.

Abstract: An anode for a lithium secondary battery includes an anode current collector, and an anode active material layer formed on at least one surface of the anode current collector. The anode active material layer includes an anode active material and an anode binder. The anode active material includes a plurality of composite particles, each of the composite particles include a silicon-based active material particle, and a solid electrolyte interphase (SEI) layer formed on at least a portion of a surface of the silicon-based active material particle. A relative standard deviation of thickness values of the SEI layer of the composite particles, which are measured by an X-ray photoelectron spectroscopy (XPS) from 9 different composite particles among the plurality of composite particles after repeating 100 cycles of charging and discharging is 20% or less.

Abstract: There is provided a substrate processing apparatus. The substrate processing apparatus may include a substrate supporter supporting a substrate, a processing solution feeder supplying a processing solution to the substrate, first and second recovery containers configured to recover the processing solution, a first pipe connected to the first recovery container and including an insulating material, a second pipe connected to the second recovery container and including an insulating material, a first static electricity eliminator in contact with the first pipe, a second static electricity eliminator in contact with the second pipe, and a plurality of first conductive lines connected to the first and second static electricity eliminators.

Abstract: The present disclosure describes a semiconductor structure and a method for forming the same. The semiconductor structure can include a substrate, a gate structure over the substrate, and a source/drain (S/D) region adjacent to the gate structure. The S/D region can include first and second side surfaces separated from each other. The S/D region can further include top and bottom surfaces between the first and second side surfaces. A first separation between the top and bottom surfaces can be greater than a second separation between the first and second side surfaces.

Abstract: Provided is a substrate heater including a support plate configured to be loaded with a substrate, an insulating layer arranged under the support plate, and a heating portion arranged under the insulating layer and configured to heat the support plate, wherein the insulating layer includes a plurality of layers, wherein at least two of the plurality of layers of the insulating layer have different thermal expansion coefficients from each other.

Abstract: A semiconductor device includes a substrate, a gate trench in the substrate, a gate insulating film in the gate trench, a titanium nitride (TiN)-lower gate electrode film on the gate insulating film, the titanium nitride (TiN)-lower gate electrode film including a top surface, a first side surface, and a second side surface opposite the first side surface, a polysilicon-upper gate electrode film on the titanium nitride (TiN)-lower gate electrode film, and a gate capping film on the polysilicon-upper gate electrode film. A center portion of the top surface of the titanium nitride (TiN)-lower gate electrode film overlaps a center portion of the polysilicon-upper gate electrode film in a direction that is perpendicular to a top surface of the substrate, and each of the first side surface and the second side surface of the titanium nitride (TiN)-lower gate electrode film is connected to the gate insulating film.

Abstract: A semiconductor package includes a wiring substrate, a solder ball on a lower surface of the wiring substrate, a ball land between the lower surface of the wiring substrate and the solder ball and having an upper surface having a circular shape, and a mask layer covering the lower surface of the wiring substrate and including an opening through which a portion of the ball land is exposed. The ball land includes a first land region which is exposed via the opening and has an upper surface having a semicircular shape with a first radius and a second land region which is integrated with a flat side surface of the first land region and has an upper surface having a semicircular shape with a second radius that is less than the first radius.

Abstract: An electronic device and an electronic apparatus including the electronic device are provided. The electronic device includes a conductive material layer, and a ferroelectric layer covering the conductive material layer. The ferroelectric layer includes a first oxide layer including a first component, and a second oxide layer including hafnium and a second component and having a thickness that is twice or more than a thickness of the first oxide layer.

Abstract: Interconnect structures and method of forming the same are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a third dielectric layer over the second dielectric layer, a second contact feature extending through the second dielectric layer and the third dielectric layer, and a graphene layer between the second contact feature and the third dielectric layer.

Abstract: An overcurrent protection circuit includes a variable voltage source configured to generate a first voltage which that in response to a variable current; an amplifier comprising a first input terminal to which the first voltage is applied; and a limit current source connected to a second input terminal of the amplifier and configured to generate a limit current corresponding to the first voltage.