Abstract: The invention relates to a solar photovoltaic energy conversion apparatus. The apparatus consists of a substrate, a buffer layer formed on the substrate layer, a first transparent conductive oxide layer formed on the buffer layer, periodic protrusions containing first silicon layers formed on the first transparent conductive oxide layer, second silicon layers formed on the first silicon layers, a second transparent conductive oxide layer covering the first silicon layers, the second silicon layers and the first transparent conductive oxide layer, and an anti-reflective protective layer. The first silicon layer and the second silicon layer are the electrodes with the opposite type of charge carriers. The first transparent conductive layer and the second transparent conductive layer are the electrodes with the opposite type of charge carriers. This TCO-based hybrid solar photovoltaic energy conversion device not only can allow the transmission of visible sunlight but also can enhance the photovoltaic energy.

Abstract: In a non-invasive human metabolic condition measuring apparatus and method, a micro-light source emits an incident light having a wavelength from 329 nm to 473 nm to trigger a mitochondrial metabolite of a human mucosa tissue, and the metabolite is excited to generate a fluorescent signal having a wavelength from 405 nm to 572 nm, and the fluorescent signal is filtered by an optical filter, received by a micro receiver, and amplified by an amplification circuit sequentially, and then a filter circuit and an analog/digital conversion circuit of a microprocessing unit are provided for filtering and performing an analog/digital signal conversion respectively, so that the metabolite content can be calculated by the computation to provide human metabolic conditions, and a combination of micro components and circuits is used for miniaturizing the apparatus to provide a convenient carry of the apparatus.

Abstract: A method for forming an interconnect of a solid oxide fuel cell includes the following steps. First of all, a powder mixture substantially including equal to or more than 90 wt % chromium powder, with the balance being iron powder and inevitable impurities, is provided. Then the powder mixture is pressurized by a pressing process with a pressure equal to or over 8 mt/cm2 to form a green interconnect with a density being equal to or over 90% of the theoretical density. Next the green interconnect is sintered by a sintering process to form an interconnect body. Finally, a protection process is performed on at least one surface of the interconnect body to form an interconnect.

Abstract: An illuminant transparent solar cell device, comprising a transparent substrate and the following layers disposed from bottom up sequentially on the transparent substrate: a transparent fluorescent layer, a p-type transparent conductive oxide layer, an intrinsic-type transparent conductive oxide layer, a n-type transparent conductive oxide layer, and an anti-reflection layer serving as a protection layer. In the illuminant transparent solar cell device, the characteristics of a p-type and an n-type transparent conductive oxide layers as well as a transparent fluorescent layer are utilized so that sunlight can not only be used to provide natural lighting in daytime but also be used to generate electricity which is stored in an electricity storage device by transmitting through this device while the electricity stored therein can be used to provide indoor lighting at night, thus saving the consumption of fossil fuel energy.

Abstract: A surface-finished yarn having multiple inorganic materials is provided. The surface-finished yarn comprises a yarn, a first material and a second material. The surface of the yarn comprises a plurality of the plurality of first regions and a plurality of second regions wherein the plurality of first regions and the plurality of second regions are alternately disposed along an axial direction of the yarn. The first material is disposed onto the plurality of first regions while the second material different from the first material is disposed onto the plurality of second regions.

Abstract: A method of manufacturing a non-volatile memory is provided. An insulating layer, a conductive material layer and a polish stop layer are sequentially on a substrate. Trenches are formed in a portion of the substrate, the polish stop layer, the conductive material layer and the insulating layer, and the conductive material layer is segmented to form conductive blocks. A dielectric material layer is formed to cover the polish stop layer and fill the trenches. A chemical mechanical polishing process is performed until exposing a surface of the polish stop layer. A portion of the dielectric layer is removed to form trench isolation structures. A portion of sidewalls of each conductive block is removed to form floating gates. A width of each floating gate is decreased gradually from bottom to top.

Abstract: The invention relates to a solar photovoltaic energy conversion apparatus. The apparatus consists of a substrate, a buffer layer formed on the substrate layer, a first transparent conductive oxide layer formed on the buffer layer, periodic protrusions containing first silicon layers formed on the first transparent conductive oxide layer, second silicon layers formed on the first silicon layers, a second transparent conductive oxide layer covering the first silicon layers, the second silicon layers and the first transparent conductive oxide layer, and an anti-reflective protective layer. The first silicon layer and the second silicon layer are the electrodes with the opposite type of charge carriers. The first transparent conductive layer and the second transparent conductive layer are the electrodes with the opposite type of charge carriers. This TCO-based hybrid solar photovoltaic energy conversion device not only can allow the transmission of visible sunlight but also can enhance the photovoltaic energy.

Abstract: A method and apparatus for affecting behavioral patterns of a child are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of determining a behavioral pattern of a child based on a set of detected data while the child performs acts associated with the behavioral pattern, comparing the behavioral pattern against a first set of expected conditions to generate a comparison result, and generating a reward for the child based on the comparison result, wherein the reward affects the behavioral pattern.

Abstract: A surface-finished yarn having multiple inorganic materials is provided. The surface-finished yarn comprises a yarn, a first material and a second material. The surface of the yarn comprises a plurality of the plurality of first regions and a plurality of second regions wherein the plurality of first regions and the plurality of second regions are alternately disposed along an axial direction of the yarn. The first material is disposed onto the plurality of first regions while the second material different from the first material is disposed onto the plurality of second regions.

Abstract: A substrate including a memory cell region and a peripheral circuit region is provided. A first dielectric layer, a first conductive layer and a mask layer are formed on the substrate. Isolation structures are formed, and the isolation structures in the memory cell region are denser than that in the peripheral circuit region. A protective layer is formed on the substrate in the second region. The mask layer in the first region is removed. A second conductive layer is formed on the substrate, wherein the protective layer has an etching selectivity the same to that of the second conductive layer. Portion of the second conductive layer and the protective layer are removed by using the isolation structures as stop layer. Portion of the isolation structures and the mask layer in the peripheral circuit region are removed. A second dielectric layer and a third conductive layer are formed on the substrate.

Abstract: A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.

Abstract: A method and system for detecting a mobile model are provided. The system gathers model IDs by receiving a customized massage from a sender and then storing the model ID, issuing a WAP PUSH message containing an access URL to a mobile station, receiving a request with a UserAgent attached and mobile phone number from a mobile station, adding a new record of the mobile phone number and its corresponding UserAgent into a ID database when the UserAgent is not in the mapping table.

Abstract: A method for manufacturing semiconductor device is provided. First, a substrate is provided. Then, a plurality of first gate lines disposed in parallel to each other and a first dummy gate line disposed in a direction perpendicular to the first gate lines are formed on the substrate. There is a first gap between the first dummy gate line and the first gate lines and there is a second gap between every pair of adjacent first gate lines. Thereafter, a second composite layer and a conductive layer are sequentially formed over the substrate. The conductive layer is etched back to form a plurality of second device structures that completely fills the second gaps. Then, the conductive layer in the first gap is removed.

Abstract: A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.

Abstract: A method of fabricating a nonvolatile memory is provided. The method includes forming a bottom dielectric layer, a charge trapping layer, a top dielectric layer and a conductive layer on the substrate sequentially. Portions of conductive layer, top dielectric layer, charge trapping layer and bottom dielectric layer are removed to form several trenches. An insulation layer is formed in the trenches to form a plurality of isolation structures. A plurality of word lines are formed on the conductive layer and the isolation structures. By using the word lines as a mask, portions of bottom dielectric layer, charge trapping layer, top dielectric layer, conductive layer and isolation structures are removed to form a plurality of devices. The bottom oxide layer has different thickness on the substrate so that these devices can be provided with different performance. These devices serve as memory cells with different character or devices in periphery region.

Abstract: A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.

Abstract: A method for manufacturing semiconductor device is provided. First, a substrate is provided. Then, a plurality of first gate lines disposed in parallel to each other and a first dummy gate line disposed in a direction perpendicular to the first gate lines are formed on the substrate. There is a first gap between the first dummy gate line and the first gate lines and there is a second gap between every pair of adjacent first gate lines. Thereafter, a second composite layer and a conductive layer are sequentially formed over the substrate. The conductive layer is etched back to form a plurality of second device structures that completely fills the second gaps. Then, the conductive layer in the first gap is removed.

Abstract: A method of fabricating a non-volatile memory is provided. A tunneling dielectric layer, a charge trapping layer and a barrier dielectric layer are sequentially formed over a substrate. Then, a pad conductive layer with openings is formed over the barrier dielectric. Thereafter, the barrier dielectric layer, the charge trapping layer, the tunneling dielectric layer and a portion of the substrate, which are not covered by the pad conductive layer, are removed so as to form trenches. Trench isolation structures are formed in the trenches. Then, a conductive layer is formed over the pad conductive layer. The conductive layer and the pad conductive layer are defined to form stacked gate structures. The barrier dielectric layer, the charge trapping layer and the tunneling dielectric layer, which are not covered by the stacked gate structures, are removed. Doped regions are formed within the substrate adjacent to two sides of each stacked gate structure.

Abstract: A method of fabricating a non-volatile memory is described. A plurality of first memory units having gaps between each other is formed over a substrate. Insulating spacers are formed on the sidewalls of the first memory units. A composite layer is formed on the substrate and the gaps between the first memory units are filled with a doped polysilicon layer. Thereafter, a portion of the doped polysilicon layer is removed to form trenches. After that, a metallic layer fills the trenches. A portion of the metallic layer is removed to form a plurality of gates. The gates and the composite layer together form a plurality of second memory units. The second memory units and the first memory units together constitute a memory cell column. Then, a source region and a drain region are formed in the substrate adjacent to the two sides of the memory cell column.

Abstract: A method of fabricating a nonvolatile memory is provided. The method includes forming a bottom dielectric layer, a charge trapping layer, a top dielectric layer and a conductive layer on the substrate sequentially. Portions of conductive layer, top dielectric layer, charge trapping layer and bottom dielectric layer are removed to form several trenches. An insulation layer is formed in the trenches to form a plurality of isolation structures. A plurality of word lines are formed on the conductive layer and the isolation structures. By using the word lines as a mask, portions of bottom dielectric layer, charge trapping layer, top dielectric layer, conductive layer and isolation structures are removed to form a plurality of devices. The bottom oxide layer has different thickness on the substrate so that these devices can be provided with different performance. These devices serve as memory cells with different character or devices in periphery region.