Patents by Inventor Isamu Nishimura

Isamu Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240395723
    Abstract: A semiconductor device includes a substrate, a first semiconductor element, and a wiring. The substrate includes an obverse surface and a reverse surface facing away from each other in a first direction. The first semiconductor element includes a first electrode and a second electrode. The wiring includes a portion located between the substrate and each of the first electrode and the second electrode. The first electrode and the second electrode are electrically bonded to the wiring. The substrate is formed with a recess recessed from the obverse surface, and the wiring is accommodated in the recess. The wiring includes an exposed surface that is flush with the obverse surface. A roughness of the exposed surface is smaller than a roughness of the reverse surface.
    Type: Application
    Filed: August 8, 2024
    Publication date: November 28, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Isamu NISHIMURA
  • Patent number: 12106893
    Abstract: A coil module includes a conductor layer, at least one element, and a sealing resin. The conductor layer is formed along a predetermined plane and includes a wiring portion and a helical-shaped coil portion. The at least one element is mounted on the wiring portion. The sealing resin covers the conductor layer and the at least one element. The sealing resin is integrally formed of a single type of resin material and has a predetermined thickness in a first direction perpendicular to the plane.
    Type: Grant
    Filed: March 12, 2020
    Date of Patent: October 1, 2024
    Assignee: ROHM CO., LTD.
    Inventors: Akihito Saito, Isamu Nishimura, Yoshihiro Sekimoto
  • Publication number: 20240234402
    Abstract: A semiconductor device includes: a first semiconductor element; a second semiconductor element; an insulating element including a first coil; a second coil magnetically coupled to the first coil; and a support substrate on which the first semiconductor element and the second semiconductor element are mounted. The support substrate includes an insulating base member, and a substrate wiring formed on the base member. The substrate wiring includes a first wiring member electrically interposed between the first semiconductor element and the first coil, and a second wiring member electrically interposed between the second semiconductor element and the second coil. The second coil is arranged between the first coil and the base member. The insulating element is supported by the support substrate.
    Type: Application
    Filed: January 4, 2024
    Publication date: July 11, 2024
    Inventor: Isamu NISHIMURA
  • Publication number: 20240186382
    Abstract: The present disclosure provides a nitride semiconductor device. The nitride semiconductor device includes a gate layer formed on an electron supply layer; a first insulating film, formed on the gate layer and having an opening exposing the gate layer; and a gate electrode including a gate field plate portion formed on the first insulating film. A side surface of the first insulating film is located further inside the gate electrode than a side surface of the gate field plate portion. The nitride semiconductor device further includes a second insulating film covering at least side surfaces of each of the gate layer, the first insulating film and the gate electrode. The second insulating film includes a portion embedded in a recessed portion formed by a lower surface of the gate field plate portion, the side surface of the first insulating film and an upper surface of the gate layer.
    Type: Application
    Filed: November 29, 2023
    Publication date: June 6, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Isamu NISHIMURA
  • Publication number: 20240136347
    Abstract: A semiconductor device includes: a first semiconductor element; a second semiconductor element; an insulating element including a first coil; a second coil magnetically coupled to the first coil; and a support substrate on which the first semiconductor element and the second semiconductor element are mounted. The support substrate includes an insulating base member, and a substrate wiring formed on the base member. The substrate wiring includes a first wiring member electrically interposed between the first semiconductor element and the first coil, and a second wiring member electrically interposed between the second semiconductor element and the second coil. The second coil is arranged between the first coil and the base member. The insulating element is supported by the support substrate.
    Type: Application
    Filed: January 4, 2024
    Publication date: April 25, 2024
    Inventor: Isamu NISHIMURA
  • Publication number: 20240112992
    Abstract: A semiconductor device includes a first resin layer having a first obverse surface facing in a thickness direction, a first wiring layer facing the first obverse surface, a semiconductor layer, and a semiconductor element. The semiconductor element includes an electrode electrically connected to the semiconductor layer and facing the first obverse surface and is electrically bonded at the electrode to the first wiring layer. The semiconductor device further includes a second resin layer having a second obverse surface facing the same side as the first obverse surface in the thickness direction, and a second wiring layer facing the second obverse surface and electrically connected to the semiconductor layer. The second wiring layer is in contact with the semiconductor layer. The second wiring layer extends across an outer edge of the semiconductor layer as viewed in the thickness direction.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 4, 2024
    Inventor: Isamu NISHIMURA
  • Publication number: 20240021592
    Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.
    Type: Application
    Filed: September 13, 2023
    Publication date: January 18, 2024
    Inventors: Isamu NISHIMURA, Mamoru YAMAGAMI
  • Publication number: 20240021717
    Abstract: A nitride semiconductor device includes an electron transit layer, formed above a substrate, and an electron supply layer formed on the electron transit layer and having a larger band gap than the electron transit layer. A gate layer is formed on the electron supply layer and contains an acceptor impurity. A gate electrode is formed on the gate layer. A source electrode and a drain electrode are located at opposite sides of the gate layer and contact the electron supply layer. The gate electrode has a greater length than the gate layer in a first direction in which the source electrode, the gate layer, and the drain electrode are arranged. The gate electrode contacts an entire upper surface of the gate layer and extends from the gate layer toward at least one of the source electrode and the drain electrode.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 18, 2024
    Applicant: ROHM CO., LTD.
    Inventor: Isamu NISHIMURA
  • Patent number: 11817439
    Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: November 14, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Isamu Nishimura, Mamoru Yamagami
  • Publication number: 20230298805
    Abstract: The semiconductor device of the present invention includes an insulating layer, a high voltage coil and a low voltage coil which are disposed in the insulating layer at an interval in the vertical direction, a low potential portion which is provided in a low voltage region disposed around a high voltage region for the high voltage coil in planar view and is connected with potential lower than the high voltage coil, and an electric field shield portion which is disposed between the high voltage coil and the low voltage region and includes an electrically floated metal member.
    Type: Application
    Filed: April 13, 2023
    Publication date: September 21, 2023
    Inventors: Kosei OSADA, Isamu NISHIMURA, Tetsuya KAGAWA, Daiki YANAGISHIMA, Toshiyuki ISHIKAWA, Michihiko MIFUJI, Satoshi KAGEYAMA, Nobuyuki KASAHARA
  • Patent number: 11657953
    Abstract: The semiconductor device of the present invention includes an insulating layer, a high voltage coil and a low voltage coil which are disposed in the insulating layer at an interval in the vertical direction, a low potential portion which is provided in a low voltage region disposed around a high voltage region for the high voltage coil in planar view and is connected with potential lower than the high voltage coil, and an electric field shield portion which is disposed between the high voltage coil and the low voltage region and includes an electrically floated metal member.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: May 23, 2023
    Assignee: ROHM CO., LTD.
    Inventors: Kosei Osada, Isamu Nishimura, Tetsuya Kagawa, Daiki Yanagishima, Toshiyuki Ishikawa, Michihiko Mifuji, Satoshi Kageyama, Nobuyuki Kasahara
  • Publication number: 20220352105
    Abstract: A semiconductor device includes a substrate, a wire portion, a bonding portion, a semiconductor element, and an encapsulation resin. The substrate includes substrate main and back surfaces facing in opposite directions. The wire portion includes a conductive layer formed on the substrate main surface. The bonding portion includes a first plated layer formed on an upper surface of the wire portion and a first solder layer formed on an upper surface of the first plated layer. The semiconductor element includes an element main surface facing the substrate main surface, an element electrode formed on the element main surface, and a second plated layer formed on a lower surface of the element electrode and bonded to the first solder layer. The encapsulation resin covers the semiconductor element. The bonding portion is larger than the element electrode as viewed in a thickness-wise direction that is perpendicular to the substrate main surface.
    Type: Application
    Filed: September 29, 2020
    Publication date: November 3, 2022
    Inventors: Isamu NISHIMURA, Hiroyuki SHINKAI, Yoshihisa TAKADA, Hideaki YANAGIDA, Hirofumi TAKEDA
  • Publication number: 20220270988
    Abstract: Provided is an electronic part that includes a first substrate including a first base and a first coil, the first coil being electrically insulated from the first base, a second substrate including a second base and a second coil, the second coil being electrically insulated from the second base, and a support member that supports the first substrate and the second substrate. The first substrate is arranged between the second substrate and the support member in a thickness direction of the support member and overlaps the second substrate as viewed in the thickness direction, the first base is positioned between the first coil and the second coil in the thickness direction, and the first coil and the second coil are magnetically coupled.
    Type: Application
    Filed: February 24, 2022
    Publication date: August 25, 2022
    Inventor: Isamu NISHIMURA
  • Publication number: 20220157503
    Abstract: A coil module includes a substrate, a conductor layer, at least one element, and a sealing resin. The substrate includes a semiconductor material. The conductor layer is formed on the substrate and includes a wiring section and a coil section of a helical shape. The at least one element is mounted on the wiring section. The sealing resin covers the obverse surface of the substrate, the conductor layer, and the at least one element. The at least one element includes, for example, a magnetic detection element.
    Type: Application
    Filed: March 12, 2020
    Publication date: May 19, 2022
    Inventors: Akihito SAITO, Isamu NISHIMURA, Yoshihiro SEKIMOTO
  • Patent number: 11315866
    Abstract: A semiconductor device includes: a substrate including a main surface; a wiring portion including a first conductive layer formed on the main surface, and a first plating layer which is provided on the first conductive layer and on which an oxide film is formed; a semiconductor element including an element mounting surface and an element electrode formed on the element mounting surface; a bonding portion including a second plating layer made of the same material as the first plating layer and laminated on the first conductive layer, and a solder layer laminated on the second plating layer and bonded to the element electrode; and a sealing resin covering the semiconductor element.
    Type: Grant
    Filed: June 5, 2020
    Date of Patent: April 26, 2022
    Assignee: ROHM CO., LTD.
    Inventors: Isamu Nishimura, Hirofumi Takeda, Hideaki Yanagida, Taro Hayashi, Natsuki Sakamoto
  • Patent number: 11315848
    Abstract: A semiconductor device, includes: a semiconductor element including an element main surface and an element back surface facing opposite sides in a thickness direction; a wiring part electrically connected to the semiconductor element; an electrode pad electrically connected to the wiring part; a sealing resin configured to cover a part of the semiconductor element; and a first metal layer configured to make contact with the element back surface and exposed from the sealing resin, wherein the semiconductor element overlaps the first metal layer when viewed in the thickness direction.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: April 26, 2022
    Assignee: ROHM CO., LTD.
    Inventor: Isamu Nishimura
  • Patent number: 11305553
    Abstract: A thermal print head includes: a substrate; a resistor layer supported by the substrate and including a plurality of heat generating portions arranged in a main scanning direction; a wiring layer supported by the substrate and forming an energizing path to the plurality of heat generating portions; and an insulating layer interposed between the substrate and the resistor layer, wherein the substrate has a cavity portion overlapping the plurality of heat generating portions when viewed in a thickness direction of the substrate.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: April 19, 2022
    Assignee: ROHM Co., Ltd.
    Inventor: Isamu Nishimura
  • Publication number: 20220077124
    Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.
    Type: Application
    Filed: November 15, 2021
    Publication date: March 10, 2022
    Inventors: Isamu NISHIMURA, Mamoru YAMAGAMI
  • Publication number: 20220059266
    Abstract: A coil module includes a conductor layer, at least one element, and a sealing resin. The conductor layer is formed along a predetermined plane and includes a wiring portion and a helical-shaped coil portion. The at least one element is mounted on the wiring portion. The sealing resin covers the conductor layer and the at least one element. The sealing resin is integrally formed of a single type of resin material and has a predetermined thickness in a first direction perpendicular to the plane.
    Type: Application
    Filed: March 12, 2020
    Publication date: February 24, 2022
    Inventors: Akihito SAITO, Isamu NISHIMURA, Yoshihiro SEKIMOTO
  • Patent number: 11211368
    Abstract: A semiconductor device includes a substrate having a main surface, a plurality of first wirings, each having a first embedded part embedded in the substrate and exposed from the main surface, and a mounted part which is in contact with the main surface and is connected to the first embedded part, a semiconductor element having an element rear surface and a plurality of electrodes bonded to the mounted parts, a plurality of second wirings, each having a second embedded part embedded in the substrate and exposed from the main surface and a columnar part protruding from the second embedded part in the thickness direction, and being located outward from the semiconductor element as viewed in the thickness direction; and a passive element located on the side facing the main surface in the thickness direction more than the semiconductor element, and electrically connected to the plurality of second wirings.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: December 28, 2021
    Assignee: ROHM CO., LTD.
    Inventors: Isamu Nishimura, Mamoru Yamagami