Patents by Inventor Isamu Nishimura
Isamu Nishimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10070530Abstract: An electronic component includes a substrate including a first principal surface, a second principal surface positioned on a side opposite to the first principal surface, a first side surface that connects the first principal surface and the second principal surface and that extends along a first direction, a second side surface that connects the first principal surface and the second principal surface and that extends along a second direction intersecting the first direction, and a corner portion that connects the first side surface and the second side surface and that has a curved surface curved outwardly, and a chip arranged at the first principal surface of the substrate.Type: GrantFiled: July 10, 2017Date of Patent: September 4, 2018Assignee: ROHM CO., LTD.Inventors: Motohiro Toyonaga, Yasuhiro Fuwa, Mamoru Yamagami, Isamu Nishimura
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Patent number: 9983272Abstract: Provided is a magnetism detection device by which it is possible to achieve a reduction in size and an increase in accuracy. A magnetism detection device includes: a magneto-impedance element; a magnetic field direction changing body; and a substrate that is formed of a semiconductor material and has an element arrangement recessed portion bottom surface and a back surface that face mutually opposite sides in a thickness direction, and a through-hole that reaches the element arrangement recessed portion bottom surface and the back surface and has a cross-sectional dimension that increases toward the main surface starting from the element arrangement recessed portion bottom surface. The magneto-impedance element is mounted on the element arrangement recessed portion bottom surface, and the magnetic field direction changing body is accommodated in the through-hole.Type: GrantFiled: December 10, 2015Date of Patent: May 29, 2018Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Yasuhiro Fuwa
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Patent number: 9937729Abstract: A thermal print head includes a semiconductor substrate, a resistor layer and a wiring layer. The resistor layer is formed on the semiconductor substrate and has a plurality of heat generating portions arranged in the main scanning direction. The wiring layer is formed on the semiconductor substrate to be included in a conduction path for energizing the plurality of heat generating portions. The conduction path includes a path or paths provided by the semiconductor substrate itself.Type: GrantFiled: December 21, 2016Date of Patent: April 10, 2018Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Yasuhiro Fuwa
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Publication number: 20180076106Abstract: The present invention provides a semiconductor device and a method of making the same for suppressing warpages of an article due to a difference of temperature strains during the process of making the semiconductor device. The semiconductor device of the present invention includes a semiconductor element 31; a substrate 1 having a main surface 11 and formed with a recess 14 recessed from the main surface 11 and accommodating the semiconductor element 31; a wiring portion 20 connected to the substrate 1 and electrically connected to the semiconductor element 31; and a sealing resin 4 filled in the recess 14. The substrate 1 includes an electrical insulative synthetic resin. The recess 14 has a bottom surface 141 and a connecting surface 142 connected to the bottom surface141 and the main surface11.Type: ApplicationFiled: August 25, 2017Publication date: March 15, 2018Inventor: Isamu NISHIMURA
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Patent number: 9899360Abstract: A semiconductor device includes a semiconductor substrate, a conducting portion, and a sealing resin. The substrate has a main surface and is formed with a recessed portion in the main surface. The conducting portion is formed on the substrate. The sealing resin is disposed in the recessed portion. The conducting portion includes a first wiring layer and a second wiring layer both formed in the recessed portion. The second wiring layer is closer to the main surface than is the first wiring layer in the normal direction of the main surface.Type: GrantFiled: November 17, 2015Date of Patent: February 20, 2018Assignee: ROHM CO., LTD.Inventor: Isamu Nishimura
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Publication number: 20180020549Abstract: An electronic component includes a substrate including a first principal surface, a second principal surface positioned on a side opposite to the first principal surface, a first side surface that connects the first principal surface and the second principal surface and that extends along a first direction, a second side surface that connects the first principal surface and the second principal surface and that extends along a second direction intersecting the first direction, and a corner portion that connects the first side surface and the second side surface and that has a curved surface curved outwardly, and a chip arranged at the first principal surface of the substrate.Type: ApplicationFiled: July 10, 2017Publication date: January 18, 2018Applicant: ROHM CO., LTD.Inventors: Motohiro TOYONAGA, Yasuhiro FUWA, Mamoru YAMAGAMI, Isamu NISHIMURA
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Publication number: 20180009232Abstract: A thermal print head includes a semiconductor substrate, a resistor layer with heat generating portions arranged in the main scanning direction, a wiring layer included in a conduction path for energizing the heat generating portions, and a protective layer covering the resistor layer and the wiring layer. The semiconductor substrate includes a projection protruding from the obverse surface of the substrate and elongated in the main scanning direction. The projection has first and second inclined side surfaces spaced apart from each other in the sub-scanning direction. The heat generating portions are arranged to overlap with the first inclined side surface of the projection as viewed in plan view.Type: ApplicationFiled: September 20, 2017Publication date: January 11, 2018Inventors: Isamu NISHIMURA, Yasuhiro FUWA
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Publication number: 20180013058Abstract: A magnetoelectric converting element includes a substrate, a magnetosensitive layer, a first insulating layer, an underlying conductive layer, a second insulating layer, and a terminal conductor. The magnetosensitive layer is formed on the substrate. The first insulating layer is formed with first opening for exposing a part of the magnetosensitive layer. The underlying conductive layer is formed on the exposed part of the magnetosensitive layer. The second insulating layer is formed with a second opening for exposing a part of the underlying conductive layer. The terminal conductor is formed on the exposed part of the underlying conductive layer. The second opening is arranged to be located inside the first opening in plan view.Type: ApplicationFiled: July 3, 2017Publication date: January 11, 2018Inventors: Isamu NISHIMURA, Michihiko MIFUJI, Satoshi NAKAGAWA
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Publication number: 20170317000Abstract: An electronic component includes a substrate that has a first principal surface and a second principal surface, a chip that includes a mounting surface on which a plurality of terminal electrodes are formed and a non-mounting surface positioned on a side opposite to the mounting surface and that is arranged at the first principal surface of the substrate in a posture in which the mounting surface faces the first principal surface of the substrate, and a sealing resin that seals the chip at the first principal surface of the substrate so as to expose the non-mounting surface of the chip.Type: ApplicationFiled: May 1, 2017Publication date: November 2, 2017Applicant: ROHM CO., LTD.Inventor: Isamu NISHIMURA
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Patent number: 9796189Abstract: A thermal print head includes a semiconductor substrate, a resistor layer with heat generating portions arranged in the main scanning direction, a wiring layer included in a conduction path for energizing the heat generating portions, and a protective layer covering the resistor layer and the wiring layer. The semiconductor substrate includes a projection protruding from the obverse surface of the substrate and elongated in the main scanning direction. The projection has first and second inclined side surfaces spaced apart from each other in the sub-scanning direction. The heat generating portions are arranged to overlap with the first inclined side surface of the projection as viewed in plan view.Type: GrantFiled: December 23, 2016Date of Patent: October 24, 2017Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Yasuhiro Fuwa
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Publication number: 20170287624Abstract: The semiconductor device of the present invention includes an insulating layer, a high voltage coil and a low voltage coil which are disposed in the insulating layer at an interval in the vertical direction, a low potential portion which is provided in a low voltage region disposed around a high voltage region for the high voltage coil in planar view and is connected with potential lower than the high voltage coil, and an electric field shield portion which is disposed between the high voltage coil and the low voltage region and includes an electrically floated metal member.Type: ApplicationFiled: June 15, 2017Publication date: October 5, 2017Applicant: ROHM CO., LTD.Inventors: Kosei OSADA, Isamu NISHIMURA, Tetsuya KAGAWA, Daiki YANAGISHIMA, Toshiyuki ISHIKAWA, Michihiko MIFUJI, Satoshi KAGEYAMA, Nobuyuki KASAHARA
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Publication number: 20170280564Abstract: An electronic component includes a first functional element including a pair of first connecting electrode portions formed on a first mounting surface, a pair of pillar electrodes connected to the corresponding first connecting electrode portions, a second functional element that includes a pair of second connecting electrode portions formed on a second mounting surface and that is arranged in a space defined by the first mounting surface of the first functional element and the pair of pillar electrodes, a pair of pad electrodes connected to the corresponding second connecting electrode portions, and a sealing resin that seals the pair of pillar electrodes, the pair of pad electrodes and the second functional element so as to expose the first lower surfaces of the pair of pillar electrodes and the second lower surfaces of the pair of pad electrodes.Type: ApplicationFiled: March 21, 2017Publication date: September 28, 2017Applicant: ROHM CO., LTD.Inventor: Isamu NISHIMURA
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Patent number: 9704840Abstract: The present invention provides an optical semiconductor device for improving minimization and increase of detection precision.Type: GrantFiled: August 2, 2016Date of Patent: July 11, 2017Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Makoto Murata
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Patent number: 9697948Abstract: The semiconductor device of the present invention includes an insulating layer, a high voltage coil and a low voltage coil which are disposed in the insulating layer at an interval in the vertical direction, a low potential portion which is provided in a low voltage region disposed around a high voltage region for the high voltage coil in planar view and is connected with potential lower than the high voltage coil, and an electric field shield portion which is disposed between the high voltage coil and the low voltage region and includes an electrically floated metal member.Type: GrantFiled: November 10, 2014Date of Patent: July 4, 2017Assignee: ROHM CO., LTD.Inventors: Kosei Osada, Isamu Nishimura, Tetsuya Kagawa, Daiki Yanagishima, Toshiyuki Ishikawa, Michihiko Mifuji, Satoshi Kageyama, Nobuyuki Kasahara
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Patent number: 9698092Abstract: An electronic device, suitable for achieving a smaller size, includes a semiconductor substrate having a main surface and a back surface opposite to the main surface, a main electronic element arranged on the substrate, and a conducting layer electrically connected to the main electronic element. The substrate is formed with an element arrangement recessed portion that is recessed from the main surface and in which the main electronic element is arranged. The element arrangement recessed portion has a bottom surface facing in the thickness direction, and a side surface inclined with respect to the thickness direction of the substrate. The electronic device includes an auxiliary electronic element formed on the side surface of the element arrangement recessed portion.Type: GrantFiled: December 24, 2015Date of Patent: July 4, 2017Assignee: ROHM CO., LTD.Inventor: Isamu Nishimura
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Publication number: 20170182795Abstract: A thermal print head includes a semiconductor substrate, a resistor layer with heat generating portions arranged in the main scanning direction, a wiring layer included in a conduction path for energizing the heat generating portions, and a protective layer covering the resistor layer and the wiring layer. The semiconductor substrate includes a projection protruding from the obverse surface of the substrate and elongated in the main scanning direction. The projection has first and second inclined side surfaces spaced apart from each other in the sub-scanning direction. The heat generating portions are arranged to overlap with the first inclined side surface of the projection as viewed in plan view.Type: ApplicationFiled: December 23, 2016Publication date: June 29, 2017Inventors: Isamu NISHIMURA, Yasuhiro FUWA
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Publication number: 20170182794Abstract: A thermal print head includes a semiconductor substrate, a resistor layer and a wiring layer. The resistor layer is formed on the semiconductor substrate and has a plurality of heat generating portions arranged in the main scanning direction. The wiring layer is formed on the semiconductor substrate to be included in a conduction path for energizing the plurality of heat generating portions. The conduction path includes a path or paths provided by the semiconductor substrate itself.Type: ApplicationFiled: December 21, 2016Publication date: June 29, 2017Inventors: Isamu NISHIMURA, Yasuhiro FUWA
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Patent number: 9673144Abstract: A semiconductor device has a resistor area and wiring area selectively disposed on a semiconductor substrate. In this semiconductor device, a second interlayer insulating film is formed above the semiconductor substrate, and a thin-film resistor is disposed on the second interlayer insulating film in the resistor area. Vias that contact the thin-film resistor from below are formed in the second interlayer insulating film. A wiring line is disposed on the second interlayer insulating film in the wiring area. A dummy wiring line that covers the thin-film resistor from above is disposed in a third wiring layer that is in the same layer as the wiring line, and an insulating film is interposed between the thin-film resistor and the dummy wiring line.Type: GrantFiled: December 21, 2015Date of Patent: June 6, 2017Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Michihiko Mifuji, Kazumasa Nishio
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Patent number: 9660150Abstract: A semiconductor light-emitting device includes a substrate, an LED chip, a control element, a conductive layer and an insulating layer. The substrate, made of a semiconductor material, has an obverse surface and a reverse surface spaced apart from each other in the thickness direction of the substrate. The control element controls light emission of the LED chip. The conductive layer is electrically connected to the LED chip and the control element. The insulating layer is arranged between at least apart of the conductive layer and the substrate. The substrate has a recess formed in the obverse surface, and the LED chip is housed in the recess. The control element is arranged between the LED chip and the reverse surface in the thickness direction of the substrate.Type: GrantFiled: April 26, 2016Date of Patent: May 23, 2017Assignee: ROHM CO., LTD.Inventors: Isamu Nishimura, Yasuhiro Fuwa
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Patent number: 9627344Abstract: The semiconductor device of the present invention includes an insulating layer, a copper wiring for wire connection formed on the insulating layer, a shock absorbing layer formed on an upper surface of the copper wiring, the shock absorbing layer being made of a metallic material with a hardness higher than copper, a bonding layer formed on the shock absorbing layer, the bonding layer having a connection surface for a wire, and a side protecting layer covering a side surface of the copper wiring, wherein the side protecting layer has a thickness thinner than a distance from the upper surface of the copper wiring to the connection surface of the bonding layer.Type: GrantFiled: April 2, 2014Date of Patent: April 18, 2017Assignee: ROHM CO., LTD.Inventors: Satoshi Kageyama, Isamu Nishimura