Abstract: A cutter element for use in a drill bit, comprising a substrate and a plurality of layers thereon. The substrate comprises a grip portion and an extending portion. The layers are applied to the extending portion such that at least one of the layers is harder than at least one of the layers above it. The layers can include one or more layers of polycrystalline diamond and can include a layer in which the composition of the material changes with distance from the substrate.

Abstract: A device for use in boxing pliable objects having a footprint into boxes. The boxing device includes a trapdoor unit, a box conveying unit, a tamping unit, and a control unit. The trapdoor unit has coplanar sliding trays that are adapted to be rapidly and simultaneously moved apart from a horizontal closed position, wherein the trays are close together with each, to a horizontal opened position, wherein the trays are slid apart by a distance sufficiently large to pass the footprint of the plurality of objects and permit the objects to fall therethrough in a flat manner into open boxes below. The box conveying unit moves empty open boxes to a position underneath the trapdoor unit. The tamping unit has tamping plates which tamps the objects into the box, and the control unit which controls the operation of the trapdoor unit, the box conveying unit, and the tamping unit.

Abstract: A pack of self-opening plastic bags adapted for use with a bagging rack. Each plastic bag preferably has an extension portion extending above an open mouth of the bag. At least one bag pack suspension aperture is formed at an upper region of the bag and is adapted for use in suspending the bag pack on a bagging rack. A carrying handle aperture is formed through an upper region of the bag pack. Areas of compression bonds are formed adjacent upper regions of the bag pack, the handle carrying apertures, and/or the suspension aperture.

Abstract: A method for removing copper from the edge of a semiconductor wafer to prevent particle and copper contamination provides a photoresist or other protective layer on top of the copper. An edge bead removal process is performed on the photoresist to expose the edge of the copper on the semiconductor wafer. An etchant that is selective to the copper and does not attack photoresist material is applied to the semiconductor wafer. The edge of the copper, which forms the potential source of particle or copper contamination, is thereby etched. The remaining copper, protected by the photoresist layer, remains unexposed to the etchant. After the copper edge has been removed, the photoresist material is also removed to expose the protected underlying copper for further processing.

Abstract: A tungsten gate MOS transistor and a memory cell useful in flash EEPROM devices are fabricated by encapsulating the tungsten gate electrode contact of each of the MOS transistor and floating gate memory cell with silicon nitride capping and sidewall layers, thereby preventing deleterious oxidation during subsequent processing at high temperature in an oxidizing ambient.

Abstract: A silicon carbide via mask/ARC is formed in implementing trench first-via last dual damascene techniques with an attendant improvement in dimensional accuracy and increased efficiency. Embodiments include forming a silicon carbide mask having an extinction coefficient (k) of about −0.2 to about −0.5 on a first dielectric layer overlying a metal feature, depositing a second dielectric layer, etching a trench in the second dielectric layer stopping on the silicon carbide via mask and then etching a via in the first dielectric layer. Embodiments further include Cu and Cu alloy dual damascene methodology.

Abstract: An ultra-large scale integrated circuit is manufactured by using silicon-based, low dielectric constant materials in which the dielectric constant has been reduced by spinning on the dielectric to silicon wafers, eliminating soft bake steps, and heating the wafers to about 400° C. for about one hour in a vacuum or inert atmosphere.

Abstract: A device for use in boxing pliable objects having a footprint into boxes. The boxing device includes a trapdoor unit, a box conveying unit, a tamping unit, and a control unit. The trapdoor unit has coplanar sliding trays that are adapted to be rapidly and simultaneously moved apart from a horizontal closed position, wherein the trays are close together with each, to a horizontal opened position, wherein the trays are slid apart by a distance sufficiently large to pass the footprint of the plurality of objects and permit the objects to fall therethrough in a flat manner into open boxes below. The box conveying unit moves empty open boxes to a position underneath the trapdoor unit. The tamping unit has tamping plates which tamps the objects into the box, and the control unit which controls the operation of the trapdoor unit, the box conveying unit, and the tamping unit.

Abstract: A pack of self-opening bags with a front, rear, and co-joined side walls, with front and rear tabs extending from top edges of the front and rear walls. The tabs have a curved aperture slits therein, and the tabs are frangibly adhered together with contact adhesive. The slit has a main cut section, a first curved end section at one end, and a second curved end section at the opposite end. The first curved section has a curve that extends upwardly and inwardly from the main cut section. The second curved section has a substantially semicircular curve that extends from the main cut section in a direction towards the bottom edge of the tab and has an end that is substantially perpendicular to and adjacent the main cut section. In one embodiment, the first curved section is dashed.

Abstract: This invention describes improved apparatus and methods for spin-on deposition of semiconductor thin films. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods comprise dispensing of solutions containing thin film precursor via a moveable dispensing device and the careful regulation of the pattern of deposition of the precursor solution onto the wafer. The invention also comprises the careful regulation of deposition variables including dispensation time, wafer rpm, stop time and rates of wafer rotation. In one embodiment, the precursor solution is dispensed from the outer edge of the wafer toward the center. In alternative embodiments, processors regulate the movement of the dispensing arm and the precursor pump to provide an evenly dispensed layer of precursor solution. The invention also describes improved methods for evaporating solvents and curing thin films.

Abstract: An integrated circuit having semiconductor devices is connected by a first conductive channel damascened into a first oxide layer above the devices. A stop nitride layer, a via oxide layer, a via nitride layer, and a via resist are sequentially deposited on the first channel and the first oxide layer. The via resist is photolithographically developed with rectangular cross-section vias greater than the width of the channels and the via nitride layer is etched to the rectangular cross-section. A second channel oxide layer and a second channel resist are sequentially deposited on the via nitride layer and the exposed via oxide layer. The second channel resist is photolithographically developed with the second channels and an anisotropic oxide etch etches the second channels and rectangular box vias down to the stop nitride layer.

Abstract: The present invention provides a method of preventing the dishing phenomenon occurring atop a dual damascene structure on a semiconductor wafer. The semiconductor has a substrate, a first dielectric layer positioned on the substrate, a dual damascene hole positioned in the first dielectric layer through to the surface of the substrate, a barrier layer covering the surface of the first dielectric layer and both the surface of the walls and bottom of the dual damascene hole, and a copper layer positioned on the barrier layer and filling the dual damascene hole to form the dual damascene structure. The method first involves performing a first chemical mechanical polishing (CMP) process to remove portions of the copper layer down to the surface of the barrier layer. A photoresist layer is then formed atop the dual damascene structure to remove portions of the barrier layer uncovered by the photoresist layer.

Abstract: An interlayer dielectric for a damascene structure includes a first etch stop layer formed on a substrate. A first interlayer dielectric layer containing fluorine is formed on the first etch stop layer by deposition. A second etch stop layer is formed on the first interlayer dielectric layer. A second interlayer dielectric layer containing fluorine is formed on the second etch stop layer by deposition. The first and second interlayer dielectric layers and the first and second etch stop layers are etched to form at least one trench and at least one via. The at least one trench and the at least one via are treated with an H2/N2 plasma in-situ, wherein a fluorine-depleted region in the first and second interlayer dielectric layers is formed, and wherein a nitrided region is formed adjacent the fluorine-depleted region, with the nitrided region corresponding to a side surface of the at least one trench and the at least one via.

Abstract: This invention describes improved apparatus and methods for spin-on deposition of thin films applicable to the manufacture of semiconductor devices. The improved apparatus provides for controlled temperature, pressure and gas compositions within the deposition chamber. The improved methods comprise dispensing of solutions containing thin film precursor via a moveable dispensing device and the careful regulation of the pattern of deposition of the precursor solution onto the wafer. The invention also comprises the careful regulation of deposition variables including dispensation time, wafer rpm, stop time and rates of wafer rotation. In one embodiment, the precursor solution is dispensed from the outer edge of the wafer toward the center. In alternative embodiments, processors regulate the movement of the dispensing arm and the precursor pump to provide an evenly dispensed layer of precursor solution. The invention also describes improved methods for evaporating solvents and curing thin films.

Abstract: An ultra-large scale integrated circuit is manufactured by using silicon-based, low dielectric constant materials which are spin-coated, dried, cured, and capped in-situ in chemical vapor deposition equipment. The low dielectric constant material is spun on, processed in chemical vapor deposition equipment, subject to chemical-mechanical polishing, and then processed by a conventional photolithographic process for depositing conductors. The material is then reprocessed for each successive layer of conductor separated by dielectric.

Abstract: In connection with an electronic reading/annotation device, a method for automatically selecting between an electronic writing pen tool used for handwriting tasks and an electronic marker tool used for highlighting tasks is provided. Whereas handwriting normally consists of small radius curves, and frequent changes of direction, highlighting strokes are normally long and smooth with hardly ever a change of direction. The automatic selection method utilizes analysis of the shape of each stroke. More specifically, the length of each stroke is calculated between a starting point and a later made point of the stroke. If the length of the stroke is close to that of a straight line between the same two points and the stroke is determined not to be a handwriting stroke, the highlighting function is automatically selected. The exact determination of “close” is a tunable parameter.

Abstract: The invention provides a system and a method for densifying a surface of a porous film. By reducing the porosity of a film, the method yields a densified film that is more impenetrable to subsequent liquid processes. The method comprises the steps of providing a film having an exposed surface. The film can be supported by a semiconductor substrate. When the film is moved to a processing position, a focused source of radiation is created by a beam source. The exposed surface of the film is then irradiated by the beam source at the processing position until a predetermined dielectric constant is achieved. The film or beam source may be rotated, inclined, and/or moved between a variety of positions to ensure that the exposed surface of the film is irradiated evenly.

Abstract: Composite constructions of this invention comprise an ordered microstructure made up of multiple structural units that can be the same or different, and that comprise at least a first structural phase and a second structural phase. The first structural phase comprises a hard material that is selected from the group consisting of cermet materials, PCD, PCBN and mixtures thereof. The second structural phase is in contact with the first phase and comprises a material that is different than that selected to form the first structural phase. Additionally, the second structural phase is in contact with at least a portion of the first structural phase. Composite constructions of this invention can also have a multi-layer structures comprising two or more layers, wherein at least one of the layers comprises a composite construction having an ordered microstructure made up of the multiple structural units described above.

Abstract: A hydrocracking catalyst is provided that includes a crystalline molecular sieve material component having a faujasite structure and an alpha acidity of less than 1, preferably 0.3 or less, and a dispersed Group VIII noble metal component. The extremely low acidity allows selective hydrocracking of the aromatic and naphthenic species in a feedstock, while limiting the cracking of paraffins. The catalyst produces improved yields of products, such as diesel fuel, at high conversion rates and with high cetane values.

Abstract: A thermally grown oxide buffer layer is formed on a silicon layer prior to depositing an ARC thereon, thereby preventing damage to the silicon layer during ARC removal. Embodiments include thermally growing a silicon oxide buffer layer on an amorphous or polycrystalline silicon layer by thermal oxidation at a temperature of about 800° C. to about 900° C. in an atmosphere comprising oxygen or steam. A silicon oxynitride or silicon-rich silicon nitride ARC is then formed on the thermally grown protective silicon oxide buffer layer and a photoresist layer is formed on the ARC. The photoresist layer is patterned to form a mask and the underlying silicon layer etched to form a conductive feature, e.g., gate electrode. The photoresist mask is then removed and the ARC is stripped with hot phosphoric acid or by dry etching, while the thermally grown silicon oxide buffer layer protects the underlying silicon layer from damage.