Abstract: A system for monitoring GNSS interference and/or spoofing includes a display device, and a receiver device to receive an incoming radio frequency (RF) satellite signal from a satellite vehicle. The receiver device includes a processor, and computer-readable storage media communicably coupled to the processor. The computer-readable storage media has instructions stored thereon that, when executed by the processor, cause the processor to receive an incoming RF signal, determine that the incoming RF signal is unreliable, generate detection data in response to detecting that the incoming RF signal is unreliable, and broadcast the detection data.

Abstract: A computer implemented method and system for managing power in a 3D chip stack formed of multiple memory layers each having a plurality memory banks and a plurality of Through-Silicon-Vias (TSVs) connecting the memory banks. The TSVs are arranged in a plurality of subsets, each subset of TSVs connecting a corresponding vertical stack of memory banks aligned across a plurality of memory layers. The method includes determining a power delivery budget for each subset of TSVs connecting the corresponding vertical stack of memory banks based on memory requests, keeping track of memory requests to the memory banks of each vertical stack of memory banks and scheduling the memory requests to the memory banks of each vertical stack of memory banks based on the power budget. The memory controller is configured with a scorecard scheduler to manage the memory requests based on the power budget.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to photodetectors with buried airgap mirror reflectors. The structure includes a photodetector and at least one airgap in a substrate under the photodetector.

Abstract: Methods of forming structures with electrical isolation. A dielectric layer is formed over a semiconductor substrate, openings are patterned in the dielectric layer that extend to the semiconductor substrate, and a semiconductor material is epitaxially grown from portions of the semiconductor substrate that are respectively exposed inside the openings. The semiconductor material, during growth, defines a semiconductor layer that includes first portions respectively coincident with the openings and second portions that laterally grow from the first portions to merge over a top surface of the dielectric layer. A modified layer containing a trap-rich semiconductor material is formed in the semiconductor substrate.

Abstract: Disclosed are semiconductor structure embodiments of a semiconductor-on-insulator region on a bulk substrate. The semiconductor-on-insulator region includes an upper semiconductor layer above and physically separated from the substrate by insulator-containing cavities (e.g., by dielectric layer and/or a pocket of trapped air, of trapped gas, or under vacuum) and, optionally, by a lower semiconductor layer. Disclosed method embodiments include forming openings that extend vertically through the upper semiconductor layer, through a sacrificial semiconductor layer and, optionally, through a lower semiconductor layer to the substrate. Then, a selective isotropic etch process is performed to form cavities, which extend laterally off the sides of the openings into the sacrificial semiconductor layer.

Abstract: A system for time synchronization over redundant switch-based avionics networks is disclosed. The system includes a master or source clock for determining precise UTC timing information from received satellite signals and generating time marks based on the timing information. The source clock generates network-compatible timing messages and forwards the timing messages to network switches within the switch-based avionics networks. The network switches modify the timing information to account for switch-based delays and forward the modified timing messages to destination clocks in aircraft end systems. The end systems relay timing messages back to the source clock via the network switches, the timing information again modified by the network switches according to switch-based delays, and based on the precise timing information exchanged destination clocks in end systems throughout the switched network can precisely synchronize to the source clock.

Abstract: A light modulated electron source utilizes a photon-beam source to modulate the emission current of an electron beam emitted from a silicon-based field emitter. The field emitter's cathode includes a protrusion fabricated on a silicon substrate and having an emission tip covered by a coating layer. An extractor generates an electric field that attracts free electrons toward the emission tip for emission as part of the electron beam. The photon-beam source generates a photon beam including photons having an energy greater than the bandgap of silicon, and includes optics that direct the photon beam onto the emission tip, whereby each absorbed photon creates a photo-electron that combines with the free electrons to enhance the electron beam's emission current. A controller modulates the emission current by controlling the intensity of the photon beam applied to the emission tip. A monitor measures the electron beam and provides feedback to the controller.

Abstract: A leaf screen for an air intake of an HVAC system of a vehicle having a hood covering an engine compartment. The leaf screen includes a leaf screen body defining an air inlet opening covered by an integrally molded screen. A seal is integrally molded on a top surface of the leaf screen body in front of the air inlet opening. Bump-stops are integrally molded on the top surface that are engaged by an inner panel of the hood when closed. A method of making the leaf screen includes injecting a polymeric material into a mold to form a body portion. At least one elastomeric material is injected into the mold on one side of the body portion to form a seal and a plurality of bump-stops.

Abstract: A computer implemented method and system for managing power in a 3D chip stack formed of multiple memory layers each having a plurality memory banks and a plurality of Through-Silicon-Vias (TSVs) connecting the memory banks. The TSVs are arranged in a plurality of subsets, each subset of TSVs connecting a corresponding vertical stack of memory banks aligned across a plurality of memory layers. The method includes determining a power delivery budget for each subset of TSVs connecting the corresponding vertical stack of memory banks based on memory requests, keeping track of memory requests to the memory banks of each vertical stack of memory banks and scheduling the memory requests to the memory banks of each vertical stack of memory banks based on the power budget. The memory controller is configured with a scorecard scheduler to manage the memory requests based on the power budget.

Abstract: A method for performing enhanced pattern scanning includes the steps of: providing a three-dimensional memory structure including multiple physical memory elements; compiling multiple programmable finite state machines, each of the programmable finite state machines representing at least one deterministic finite automation data structure, the data structure being distributed over at least a subset of the physical memory elements; configuring a subset of the programmable finite state machines to operate in parallel on a same input data stream, while each of the subset of programmable finite state machines processes a different pattern subset; and providing a local result processor, the local result processor transferring at least a part of a match state from the deterministic finite automation data structures to corresponding registers within the local result processor, the part of the match state being manipulated being based on instructions embedded within the deterministic finite automation data structures.

Abstract: An embodiment of the present technique may in a method for generating a report related to the transferability of an application to a cloud computing environment. The method may include receiving data related to characteristics of the application. The method may include comparing, via a processor, the data received to predetermined dimensions related to the transferability of an application to a cloud computing environment to determine a comparison value indicating how close the data is to each dimension. The method may include generating, via the processor, a report based on the comparison.

Abstract: A field effect transistor (FET) with an underlying airgap and methods of manufacture are disclosed. The method includes forming an amorphous layer at a predetermined depth of a substrate. The method further includes forming an airgap in the substrate under the amorphous layer. The method further includes forming a completely isolated transistor in an active region of the substrate, above the amorphous layer and the airgap.

Abstract: Structures for a cascode integrated circuit and methods of forming such structures. A field-effect transistor of the structure includes a gate electrode finger, a first source/drain region, and a second source/drain region. A bipolar junction transistor of the structure includes a first terminal, a base layer with an intrinsic base portion arranged on the first terminal, and a second terminal that includes one or more fingers arranged on the intrinsic base portion of the base layer. The intrinsic base portion of the base layer is arranged in a vertical direction between the first terminal and the second terminal. The first source/drain region is coupled with the first terminal, and the first source/drain region at least partially surrounds the bipolar junction transistor.

Abstract: A computer implemented method and system for managing power in a 3D chip stack formed of multiple memory layers each having a plurality memory banks and a plurality of Through-Silicon-Vias (TSVs) connecting the memory banks. The TSVs are arranged in a plurality of subsets, each subset of TSVs connecting a corresponding vertical stack of memory banks aligned across a plurality of memory layers. The method includes determining a power delivery budget for each subset of TSVs connecting the corresponding vertical stack of memory banks based on memory requests, keeping track of memory requests to the memory banks of each vertical stack of memory banks and scheduling the memory requests to the memory banks of each vertical stack of memory banks based on the power budget. The memory controller is configured with a scorecard scheduler to manage the memory requests based on the power budget.

Abstract: A golf practice aid (10) for establishing a circular pattern about a golf cup (C) includes a disk (12) sized to fit into the mouth of the cup. Radial lines (24) formed on the disk are evenly spaced about the disk and extend from the center to an outer edge thereof. A cord (16) of a predetermined length is tethered to the disk and is extendible outwardly from the disk to be sequentially drawn along each line, with a a marker (M) placed adjacent the outer end of the cord when the cord is fully extended. By extending the cord successively along each radial line, a circular pattern of a defined radius is formed by the markers placed about the cup, the circular pattern assisting golfers in practicing their putting, chipping, pitching, and bunker pay skills in accordance with a method of the invention.

Abstract: This disclosure generally relates to a system, apparatus, and method for achieving an adaptive vehicle state-based hands free noise reduction feature. A noise reduction tool is provided for adaptively applying a noise reduction strategy on a sound input that uses feedback speech quality measures and machine learning to develop future noise reduction strategies, where the noise reduction strategies include analyzing vehicle operational state information and external information that are predicted to contribute to cabin noise and selecting noise reducing pre-filter options based on the analysis.

Abstract: A leaf screen for an air intake of an HVAC system of a vehicle having a hood covering an engine compartment. The leaf screen includes a leaf screen body defining an air inlet opening covered by an integrally molded screen. A seal is integrally molded on a top surface of the leaf screen body in front of the air inlet opening. Bump-stops are integrally molded on the top surface that are engaged by an inner panel of the hood when closed. A method of making the leaf screen includes injecting a polymeric material into a mold to form a body portion. At least one elastomeric material is injected into the mold on one side of the body portion to form a seal and a plurality of bump-stops.

Abstract: Fabrication methods and device structures for heterojunction bipolar transistors. A first emitter of a first heterojunction bipolar transistor and a second collector of a second heterojunction bipolar transistor are formed in a device layer of a silicon-on-insulator substrate. A first base layer of a first heterojunction bipolar transistor is epitaxially grown on the device layer with an intrinsic base portion arranged on the first emitter. A first collector of the first heterojunction bipolar transistor is epitaxially grown on the intrinsic base portion of the first base layer. A second base layer of the second heterojunction bipolar transistor is epitaxially grown on the device layer with an intrinsic base portion arranged on the second collector. A second emitter of the second heterojunction bipolar transistor is epitaxially grown on the intrinsic base portion of the second base layer. A connection is formed between the first emitter and the second collector.

Abstract: An optical inspection system that utilizes sub-200 nm incident light beam to inspect a surface of an object for defects is described. The sub-200 nm incident light beam is generated by combining first light having a wavelength of about 1109 nm with second light having a wavelength of approximately 234 nm. An optical system includes optical components configured to direct the incident light beam to a surface of the object, and image relay optics are configured to collect and relay at least two channels of light to a sensor, where at least one channel includes light reflected from the object, and at least one channel includes light transmitted through the object. The sensor is configured to simultaneously detect both the reflected and transmitted light. A laser for generating the sub-200 nm incident light beam includes a fundamental laser, two or more harmonic generators, a frequency doubler and a two frequency mixing stages.

Abstract: Chip packages and methods of forming a chip package. The chip package includes a power amplifier and a thermal pathway structure configured to influence transport of heat energy. The power amplifier includes a first emitter finger and a second emitter finger having at least one parameter that is selected based upon proximity to the thermal pathway structure.