Abstract: A memory device includes a plurality of gate electrode layers stacked on a substrate, a plurality of channel layers penetrating the plurality of gate electrode layers, a gate insulating layer between the plurality of gate electrode layers and the plurality of channel layers, and a common source line on the substrate adjacent to the gate electrode layers. The common source line includes a first part and a second part that are alternately arranged in a first direction and have different heights in a direction vertical to a top surface of the substrate. The gate insulating layer includes a plurality of vertical parts and a horizontal part. The plurality of vertical parts surrounds corresponding ones of the plurality of channel layers. The horizontal part extends parallel to a top surface of the substrate.

Abstract: A memory device includes a gate structure including a plurality of gate electrode layers stacked on an upper surface of a substrate, a plurality of channel areas passing through the gate structure and extending in a direction perpendicular to the upper surface of the substrate, a source area disposed on the substrate to extend in a first direction and including impurities, and a common source line extending in the direction perpendicular to the upper surface of the substrate to be connected to the source area, and including a plurality of layers containing different materials.

Abstract: A vertical non-volatile memory device includes a substrate including a cell region; a lower insulating layer on the substrate; a lower wiring pattern in the cell region having a predetermined pattern and connected to the substrate through the lower insulating layer; and a plurality of vertical channel layers extending in a vertical direction with respect to a top surface of the substrate in the cell region, spaced apart from one another in a horizontal direction with respect to the top surface of the substrate, and electrically connected to the lower wiring pattern. The memory device also includes a plurality of gate electrodes stacked alternately with interlayer insulating layers in the cell region in the vertical direction along a side wall of a vertical channel layer and formed to extend in a first direction along the horizontal direction.

Abstract: In one embodiment, the semiconductor device includes a stack of alternating interlayer insulating layers and conductive layers on a substrate. Each of the conductive layers extends in a first direction less than a previous one of the conductive layers to define a landing portion of the previous one of the conductive layers. An insulating plug is in one of the conductive layers under one of the landing portions, and a contact plug extends from an upper surface of the one of the landing portions.

Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.

Abstract: A memory device includes a gate structure including a plurality of gate electrode layers stacked on an upper surface of a substrate, a plurality of channel areas passing through the gate structure and extending in a direction perpendicular to the upper surface of the substrate, a source area disposed on the substrate to extend in a first direction and including impurities, and a common source line extending in the direction perpendicular to the upper surface of the substrate to be connected to the source area, and including a plurality of layers containing different materials.

Abstract: An active roll control apparatus is provided. To adjust a stiffness value of the stabilizer bar by moving a stabilizer bar installed between left and right wheels of a vehicle and extending in a first direction and a stabilizer link connected to the stabilizer bar, the active roll control apparatus includes a sliding part having one side connected to the stabilizer bar and the other side connected to the stabilizer link to slide the stabilizer link in a second direction perpendicular to the first direction, and a movement restricting part installed at the sliding part to restrict movement when the sliding part slides.

Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.

Abstract: Provided is a vertical non-volatile memory device having a metal source line. The vertical non-volatile memory device includes cell string units that are formed on first portions of a semiconductor substrate and are vertically arranged with respect to a surface of the semiconductor substrate, impurity regions formed on second portions of the semiconductor substrate between the cell string units, conductive lines formed on the impurity regions, and spacers that are formed on the sidewalls of the cell string units and insulate the conductive lines from the cells string units.

Abstract: A vertical non-volatile memory device includes a substrate, and a first stack of word lines and a second stack of word lines extending in a first direction on the substrate and separated from each other in a second direction perpendicular to the first direction. The device further includes first array lines extending in the second direction on the first and the second stack, and connected to word lines of the first and the second stack through at least two of first via contacts in a same level. The device further include first word select lines being in a same level and extending in the first direction, and connected to each of the first array lines through at least one of second via contacts. Ends of each of the first and the second stack have a form of stairs on the substrate.

Abstract: A vertical non-volatile memory device includes a substrate, and a first stack of word lines and a second stack of word lines extending in a first direction on the substrate and separated from each other in a second direction perpendicular to the first direction. The device further includes first array lines extending in the second direction on the first and the second stack, and connected to word lines of the first and the second stack through at least two of first via contacts in a same level. The device further include first word select lines being in a same level and extending in the first direction, and connected to each of the first array lines through at least one of second via contacts. Ends of each of the first and the second stack have a form of stairs on the substrate.

Abstract: Provided is a method for controlling rear wheel steering provided for a vehicle. The method includes: recognizing an abnormal condition of a sensor; calculating a speed of a vehicle; calculating a steering angular velocity of the vehicle; calculating torque of a steering column of the vehicle; determining a curvature of a lane along which the vehicle is traveling; and determining a rear wheel steering angle of the vehicle based on the speed of the vehicle, the steering angular velocity, the torque of the steering column, and the curvature of the lane.

Abstract: An inverter-charger integrated device for an electric vehicle is provided. The inverter-charger integrated device for the electric vehicle includes a motor; a power input unit; a rectifying unit; an inverter; and a control unit, wherein the inverter comprises a first group of switches including first and second switches, a second group of switches including third and fourth switches, and a third group of switches including fifth and sixth switches, the rectifying unit is directly connected to the first of the first to third groups of switches, and phases of the motor are respectively connected to the first to third group of switches.

Abstract: A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

Abstract: Disclosed are a quenched steel sheet and a method for manufacturing the same. The quenched steel sheet according to an aspect of the present invention contains, in terms of wt %, C: 0.05˜0.25%, Si: 0.5% or less (excluding 0), Mn: 0.1˜2.0%, P: 0.05% or less, S: 0.03% or less, the remainder Fe, and other unavoidable impurities, wherein a refined structure of the steel sheet comprises 90 volume % or more of martensite with a first hardness and martensite with a second hardness.

Abstract: Provided is a method of controlling an engine of an idle-stop and go (ISG) vehicle. The method includes allowing, when an engine stop condition is satisfied, the engine to idle-stop and maintaining, when an engine stop signal is transmitted from an outside, an idle-stop state of the engine although an engine restarting condition is satisfied.

Abstract: A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

Abstract: Nonvolatile memory devices, operating methods thereof, and memory systems including the same. A nonvolatile memory device may include a memory cell array and a word line driver. The memory cell array may include a plurality of memory cells. The word line driver may be configured to apply word line voltages to a plurality of word lines connected to the plurality of memory cells, respectively. Magnitudes of the word line voltages may be determined according to locations of the plurality of word lines.

Abstract: A non-volatile memory device having a vertical structure includes a NAND string having a vertical structure. The NAND string includes a plurality of memory cells, and at least one pair of first selection transistors arranged to be adjacent to a first end of the plurality of memory cells. A plurality of word lines are coupled to the plurality of memory cells of the NAND string. A first selection line is commonly connected to the at least one pair of first selection transistors of the NAND string.

Abstract: A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines.