Patents by Inventor Jae Suk Lee

Jae Suk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7402500
    Abstract: Methods of forming a shallow trench isolation structures in semiconductor devices are disclosed. A disclosed method comprises forming a first oxide layer, a nitride layer, and a second oxide layer on a substrate; forming a trench defining first and second active areas by etching the second oxide layer, the nitride layer, the first oxide layer, and the substrate in a predetermined area; forming a third oxide layer along an inside of the trench; forming a fourth oxide layer to fill up the trench; forming a sacrificial oxide layer on the fourth oxide layer; and removing the sacrificial oxide layer, the fourth oxide layer, the third oxide layer, the second oxide layer, and the nitride layer so as to form the shallow trench isolation. Thus, it is possible to minimize the damage of a narrow active area when forming an element isolation area through an STI process.
    Type: Grant
    Filed: July 13, 2005
    Date of Patent: July 22, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Suk Lee
  • Publication number: 20080160719
    Abstract: Methods of forming a shallow trench isolation structures in semiconductor devices are disclosed. A disclosed method comprises forming a first oxide layer, a nitride layer, and a second oxide layer on a substrate; forming a trench defining first and second active areas by etching the second oxide layer, the nitride layer, the first oxide layer, and the substrate in a predetermined area; forming a third oxide layer along an inside of the trench; forming a fourth oxide layer to fill up the trench; forming a sacrificial oxide layer on the fourth oxide layer; and removing the sacrificial oxide layer, the fourth oxide layer, the third oxide layer, the second oxide layer, and the nitride layer so as to form the shallow trench isolation. Thus, it is possible to minimize the damage of a narrow active area when forming an element isolation area through an STI process.
    Type: Application
    Filed: March 6, 2008
    Publication date: July 3, 2008
    Inventor: Jae Suk Lee
  • Publication number: 20080150079
    Abstract: The capacitor in a semiconductor device includes a substrate, a lower electrode formed over the substrate, a diffusion barrier formed over the lower electrode, a plurality of agglomerates formed over the diffusion barrier, a dielectric layer formed over the surface of the agglomerates to form an uneven surface, and an upper electrode formed over the dielectric layer.
    Type: Application
    Filed: March 7, 2008
    Publication date: June 26, 2008
    Inventor: Jae Suk Lee
  • Publication number: 20080151420
    Abstract: A disk damper apparatus and a hard disk drive apparatus (HDD) with the disk damper, and a method of fabricating the disk damper. The disk damper includes a plate interposed between stacked disks and formed of metal and a spacer having a thickness greater than and fabricated separately from the plate to be combined with an outer perimeter of the plate.
    Type: Application
    Filed: October 9, 2007
    Publication date: June 26, 2008
    Applicant: Samsung Electronics Co., Ltd
    Inventors: Jae-suk LEE, Sung-wook Kim
  • Patent number: 7391588
    Abstract: A connector, and a hard disk drive having the connector, the connector including connecting pins arranges so as to be spaced apart from one another; and a connecting member to contact the connecting pins and cause an electrical short in response to no external force being applied to the connecting pins; wherein the electrical short is removed in response to an external force being applied to the connecting pins. The connecting pins are moved so as not to contact the connecting member in response to an external force being applied to the connecting pins.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: June 24, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-man Cho, Jae-suk Lee
  • Patent number: 7368514
    Abstract: The present invention relates to a siloxane monomer containing a trifluorovinylether group and a sol-gel hybrid polymer prepared using the monomer, more particularly to siloxane monomer with novel structure prepared by reacting alkoxychlorosilane with a Grignard reagent containing a trifluorovinylether (—OC2F3) group, a method of preparing the same and a sol-gel hybrid polymer containing a perfluorocyclobutane (PFCB) group prepared from sol-gel reaction using said siloxane monomer containing a trifluorovinylether group.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: May 6, 2008
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Jae-Suk Lee, Kwan-Soo Lee, Ho-Suk Song, Jae-Pil Kim
  • Patent number: 7364968
    Abstract: The capacitor in a semiconductor device includes a substrate, a lower electrode formed over the substrate, a diffusion barrier formed over the lower electrode, a plurality of agglomerates formed over the diffusion barrier, a dielectric layer formed over the surface of the agglomerates to form an uneven surface, and an upper electrode formed over the dielectric layer.
    Type: Grant
    Filed: December 15, 2006
    Date of Patent: April 29, 2008
    Assignee: Dongbu Hitek Co. Ltd.
    Inventor: Jae Suk Lee
  • Patent number: 7341942
    Abstract: A method for forming a metal line of a semiconductor device forms an aluminum line having an excellent orientation. A specific resistance of a metal line is reduced, thereby enabling sufficient supply of a desired electric current. The method includes steps of forming a lower reflection preventing layer on a silicon wafer, forming a first aluminum layer on the lower reflection preventing layer, forming a second aluminum layer on the first aluminum layer, lowering a surface roughness of the second aluminum layer, forming an upper reflection preventing layer on the second aluminum layer, and forming an aluminum line.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: March 11, 2008
    Assignee: Dongbu Electronics Co., Ltd
    Inventor: Jae Suk Lee
  • Patent number: 7338855
    Abstract: A method for fabricating a semiconductor device is provided, wherein a large MIM capacitor including an uneven surface if formed to increase capacitance. The method includes forming a polysilicon layer on a lower metal layer by plasma-enhanced chemical vapor deposition; forming an uneven surface in the polysilicon layer by etching the polysilicon layer with an isotropic etchant; forming an upper metal layer on the polysilicon layer; sequentially etching the upper metal layer and the polysilicon layer; and performing chemical-mechanical polishing after completing a gap-fill process on the upper metal layer.
    Type: Grant
    Filed: December 21, 2005
    Date of Patent: March 4, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Suk Lee
  • Patent number: 7327530
    Abstract: A hard disk drive (HDD) having a disk damper and a disk protector. The HDD includes a base member, a spindle motor installed on the base member, a plurality of data storage disks mounted on the spindle motor, an actuator pivotably installed on the base member and moving a read/write head to specified positions over the disks, a disk damper disposed between adjacent disks of the plurality of disks and reducing vibrations of the disks, and a disk protector projecting by a specified height toward the disks form positions of top and bottom surfaces of the disk damper to correspond to outer edges of the disks where data is not recorded. Accordingly, if the disks are deflected due to an external shock, only the outer edges of the disks contact the disk protector, thereby preventing data recording surfaces of the disks from being damaged.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: February 5, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Suk Lee, Young-rok Oh
  • Publication number: 20080027204
    Abstract: Disclosed herein is a metal carbonate initiator for polymerizing isocyanates and a method for polymerizing isocyanates by anionic polymerization using the same, in which the initiator forms a cluster upon the initiation and protects stability of terminal anions at the end of the chain to cause controlled polymerization, thus preventing depolymerizaton and improving reaction time and efficiency without the use of a separate additive.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 31, 2008
    Inventors: Jae-Suk Lee, Hee-Soo Yoo, Shahinur Rahman
  • Publication number: 20080013217
    Abstract: A hard disk drive includes a voice coil motor yoke, a base to support the voice coil motor yoke, and formed of a material different from that of the voice coil motor yoke, and a thermal deformation prevention unit which is formed of a material that is substantially the same as that of the voice coil motor yoke, provided between the voice coil motor yoke and the base, and thereby preventing mechanical deformation due to different thermal expansion coefficients between the voice coil motor yoke and the base.
    Type: Application
    Filed: June 26, 2007
    Publication date: January 17, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Jae-Suk LEE
  • Patent number: 7314814
    Abstract: Semiconductor devices and methods of fabricating the same are disclosed. A disclosed method comprises: partially forming a first gate stack; partially forming a second gate stack adjacent the first gate stack; forming a first interlayer dielectric; and completing the formation of the first and second gate stacks after the first interlayer dielectric has filled a distance between the first and second gate electrodes.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: January 1, 2008
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae-Suk Lee
  • Patent number: 7300862
    Abstract: High quality dielectric layers may be achieved without introducing excessive impurities when a semiconductor device is manufactured by a method that includes forming a lower wire layer on a structure above a semiconductor substrate, forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on the lower wire layer and the structure, implanting carbon and oxygen (e.g., CO2) into the silicon rich oxide (SRO) layer, and forming an organosilicate glass layer by heat-treating the implanted SRO layer.
    Type: Grant
    Filed: May 9, 2005
    Date of Patent: November 27, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae-Suk Lee
  • Patent number: 7283323
    Abstract: A damping structure of a hard disk drive. The damping structure includes: a damping plate arranged spaced apart from an upper surface of the cover member, such that an air gap is formed between the cover member and the damping plate; and a damping member arranged between an edge of the cover member and an edge of the damping plate. The damping plate includes a stepped portion which is inwardly formed at a portion spaced apart from the edge of the damping plate by a predetermined distance, and a bent portion which is formed at an edge of the damping plate and smoothly bent toward the cover member. In such a damping structure, an impact that is applied to the cover member from an outside can be reduced much more through the damping plate and the damping member.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: October 16, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-suk Lee
  • Publication number: 20070152296
    Abstract: The capacitor in a semiconductor device includes a substrate, a lower electrode formed over the substrate, a diffusion barrier formed over the lower electrode, a plurality of agglomerates formed over the diffusion barrier, a dielectric layer formed over the surface of the agglomerates to form an uneven surface, and an upper electrode formed over the dielectric layer.
    Type: Application
    Filed: December 15, 2006
    Publication date: July 5, 2007
    Inventor: Jae Suk Lee
  • Patent number: 7223675
    Abstract: A method of forming a pre-metal dielectric (PMD) layer is disclosed. In the method, after a nitride liner layer is formed on a substrate having a transistor, a USG layer is deposited thereon and then planarized. Next, ion implantation and annealing are performed for gettering, first in a gate region and then in a non-gate region of the USG layer. The USG layer is generally free from plasma damage and has a good gap-fill capability. Further, ion implantation and annealing after deposition of the USG layer may enhance a gap-fill capability, a gettering capability, and electrical properties of a transistor.
    Type: Grant
    Filed: May 10, 2005
    Date of Patent: May 29, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae Suk Lee
  • Publication number: 20070111524
    Abstract: Embodiments of a semiconductor device and a method of fabricating the same may include an insulating layer formed on a substrate and having a predetermined hole, a metal interconnection formed in the hole and protruding relative to the insulating layer, a first barrier extending in a lateral direction of the metal interconnection, a second barrier formed on the metal interconnection, and a metal pad formed on the second barrier.
    Type: Application
    Filed: November 14, 2006
    Publication date: May 17, 2007
    Inventor: Jae Suk Lee
  • Patent number: 7202184
    Abstract: The present invention relates to a semiconductor device fabrication method, which includes forming an inter metal dielectric on a semiconductor substrate having wirings and planarizing the inter metal dielectric through a chemical mechanical polishing, wherein the inter metal dielectric is formed by carrying out at least one cycle of depositing polycrystalline silicon, plasma-processing the polycrystalline silicon, and oxidizing the polycrystalline silicon.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: April 10, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae-Suk Lee
  • Publication number: 20070075429
    Abstract: Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to electro-migration (EM) and stress-migration (SM). An illustrated metal interconnection line includes: a semiconductor substrate; a metal pattern on the substrate; a glue pattern under the metal pattern; an anti-reflection pattern on the metal pattern; and dummy patterns surrounding side walls of the metal pattern.
    Type: Application
    Filed: December 4, 2006
    Publication date: April 5, 2007
    Inventor: Jae-Suk Lee