Patents by Inventor Jae Suk Lee

Jae Suk Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070060705
    Abstract: The present invention relates to an amphiphilic triblock copolymer comprising a poly(2-vinylpyridine) block and a poly(alkylisocyanate) block and the preparation method thereof, and particularly relates to an amphiphilic triblock copolymer comprising a coil-shaped hydrophilic poly(2-vinylpyridine) block and a rod-shaped lipophilic poly(alkylisocyanate) block, having a controlled structure of coil-rod-coil or rod-coil-rod, and the preparation method thereof.
    Type: Application
    Filed: July 13, 2006
    Publication date: March 15, 2007
    Inventors: Jae-Suk Lee, Shahinur Rahman, Shashadhar Samal, Hee-Soo Yoo
  • Patent number: 7186639
    Abstract: Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to electro-migration (EM) and stress-migration (SM). An illustrated metal interconnection line includes: a semiconductor substrate; a metal pattern on the substrate; a glue pattern under the metal pattern; an anti-reflection pattern on the metal pattern; and dummy patterns surrounding side walls of the metal pattern.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: March 6, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae-Suk Lee
  • Patent number: 7173155
    Abstract: The present invention relates to a terphenyl dihalide monomer having sulfonate groups and a process for preparing the same. More particularly, the present invention relates to a terphenyl dihalide monomer having sulfonate groups prepared by a process comprising obtaining a terphenyl dihalide derivative by Suzuki cross-coupling of a tetrahalobenzene and phenylboronic acid and introducing sulfonate groups into the phenyl rings at each end of the terphenyl dihalide derivative, the resultant monomer capable of being prepared into a polymer electrolyte having superior ion conductivity through nucleophilic aromatic substitution (SNAr) polymerization due to the presence of two halogen atoms and two conducting sulfonate groups in the monomer molecule, and a process for preparing the same.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: February 6, 2007
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Jae-Suk Lee, Sun-Young Chang, Kwan-Soo Lee, Myung-Hwan Jeong, Jung-Eun Yang
  • Publication number: 20060292899
    Abstract: A connector, and a hard disk drive having the connector, the connector including connecting pins arranges so as to be spaced apart from one another; and a connecting member to contact the connecting pins and cause an electrical short in response to no external force being applied to the connecting pins; wherein the electrical short is removed in response to an external force being applied to the connecting pins. The connecting pins are moved so as not to contact the connecting member in response to an external force being applied to the connecting pins.
    Type: Application
    Filed: May 30, 2006
    Publication date: December 28, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Kyoung-man Cho, Jae-suk Lee
  • Patent number: 7135536
    Abstract: The present invention relates to a polymerization method of polyisocyanates endcapped with acyl chlorides, and more particularly to a process for preparing polyisocyanate with higher stability comprising endcapping a living polymer chain amidate anion with an acyl chloride derivative in the presence of an amine catalyst, thereby enabling to maximize endcapping ratios.
    Type: Grant
    Filed: November 11, 2004
    Date of Patent: November 14, 2006
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Jae-Suk Lee, Chan Hee Jung, Sang-Yoon Park, Guttikonda Yogendra Nath, Shashahar Samal
  • Publication number: 20060183878
    Abstract: The present invention relates to terphenyl dihydroxy monomers containing fluorine and fluorinated poly(arylene ether sulfide)s prepared by using the monomers, more particularly, terphenyl dihydroxy monomers containing both two hydroxy functional groups and fluorine and fluorinated poly(arylene ether sulfide)s prepared by an aromatic nucleophilic substitution polymerization (SNAr) using the monomers, which are thus useful as optical materials in the field of information telecommunications.
    Type: Application
    Filed: December 12, 2005
    Publication date: August 17, 2006
    Inventors: Jae-Suk Lee, Kwan-Soo Lee
  • Patent number: 7087520
    Abstract: A semiconductor device includes a semiconductor substrate and metal wiring formed by alternately depositing aluminum layers and copper layers on the semiconductor substrate so that a top layer of the metal wiring is an aluminum layer. The metal wiring is fabricated by alternately depositing an aluminum layer and a copper layer on a semiconductor substrate a predetermined number of times to form a metal wiring layer having an aluminum top layer. A photoresist film pattern is formed on the metal wiring layer and metal wiring is formed by performing an etching process on the metal wiring layer using the photoresist film pattern as a mask.
    Type: Grant
    Filed: July 30, 2004
    Date of Patent: August 8, 2006
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jae-Suk Lee
  • Patent number: 7074716
    Abstract: The present invention relates to a method of manufacturing a semiconductor device which may stably transfer an electrical signal by forming a plurality of via holes and contact holes to an underlying conductive layer. According to the present invention, even though a contact or via is electrically shorted, it is possible to stably transfer the electrical signal through the other contact hole(s) or via hole(s). The present method includes: forming a first conductive line on a semiconductor substrate; forming an insulating layer on the semiconductor substrate and the first conductive line; forming a plurality of via holes by selectively etching the insulating layer in order to expose the first conductive line; forming a metal barrier on top of the insulating layer and in the via holes; and forming a plug by depositing a conductive layer sufficiently to fill the via holes, and then planarizing the conductive layer to coplanarity with the insulating layer.
    Type: Grant
    Filed: August 2, 2005
    Date of Patent: July 11, 2006
    Assignee: Dongbu Electronics Co., Ltd.
    Inventors: Jae Suk Lee, Ji A Kim
  • Publication number: 20060138669
    Abstract: Semiconductor devices having a copper line layer and methods for manufacturing the same are disclosed. An illustrated semiconductor device comprises a damascene insulating layer having a contact hole, a barrier metal layer including a first ruthenium layer, a ruthenium oxide layer and a second ruthenium layer, a seed copper layer formed on the barrier metal layer, and a copper line layer made of a Cu—Ag—Au solid solution. A disclosed example method of manufacturing a semiconductor device reduces and/or prevents contact characteristic degradation of the barrier metal layer with the silicon substrate or the damascene insulating layer. In addition, by forming the copper line layer made of the Cu—Ag—Au solid solution, long term device reliability may be improved.
    Type: Application
    Filed: October 20, 2005
    Publication date: June 29, 2006
    Inventor: Jae-Suk Lee
  • Publication number: 20060141779
    Abstract: A method of forming an aluminum contact including forming a barrier metal layer on an interlayer insulation layer pattern defining a contact hole, and forming an aluminum layer on the barrier metal layer so as to fill the contact hole. The method further includes forming a photoresist pattern for ion implantation, implanting ions into the aluminum layer, and annealing by using a rapid thermal process.
    Type: Application
    Filed: December 29, 2005
    Publication date: June 29, 2006
    Applicant: DongbuAnam Semiconductor Inc.
    Inventor: Jae-Suk Lee
  • Publication number: 20060141752
    Abstract: A P-type polysilicon layer having a stable and desired resistivity is formed by alternately depositing a plurality of silicon atom layers and a plurality of group IIIA element atom layers on a semiconductor substrate by atomic layer deposition, and thereafter forming a P-type polysilicon layer by thermally diffusing the plurality of group IIIA element atom layers into the plurality of silicon atom layers. The plurality of group IIIA element atom layers may comprise Al, Ga, In, and/or Tl.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 29, 2006
    Inventor: Jae-Suk Lee
  • Patent number: 7030005
    Abstract: Method for forming intermetal dielectric layer is disclosed including steps of: preparing a substrate with wiring on a lower insulating layer, the wiring having a plurality of separating portions; forming first and second water marks on the lower insulating layer located in the separating portions and on upper surfaces of the wiring; transforming the first and second water marks into first and second air bubbles, respectively; depositing a first insulating layer of lower dielectric constant on the whole surface of the substrate, and at the same time, forming first and second air gaps by growing said first and second air bubbles on and between the wirings, respectively; removing the upper portion of the first insulating layer to make open the second air gap; and depositing a second insulating layer of lower dielectric constant on the first insulating layer to fill the opened second air gap.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: April 18, 2006
    Assignee: DongbuAnam Semiconductor Inc.
    Inventor: Jae Suk Lee
  • Patent number: 7018907
    Abstract: Methods for forming shallow trench isolation structures are disclosed. In a disclosed example, after a trench is formed in a substrate, an oxide layer is formed on sidewalls and a bottom of the trench. Then, a metal or poly-silicon layer is formed on the oxide layer. Next, a portion of the metal or poly-silicon layer is etched such that the oxide layer on the bottom of the trench is exposed, while leaving the metal or poly-silicon layer on the sidewalls of the trench. Finally, a dielectric material layer is deposited to fully fill the trench.
    Type: Grant
    Filed: December 30, 2003
    Date of Patent: March 28, 2006
    Assignee: DongbuAnam Semiconductor, Inc.
    Inventor: Jae Suk Lee
  • Publication number: 20060002007
    Abstract: A hard disk drive (HDD) having a disk damper and a disk protector. The HDD includes a base member, a spindle motor installed on the base member, a plurality of data storage disks mounted on the spindle motor, an actuator pivotably installed on the base member and moving a read/write head to specified positions over the disks, a disk damper disposed between adjacent disks of the plurality of disks and reducing vibrations of the disks, and a disk protector projecting by a specified height toward the disks form positions of top and bottom surfaces of the disk damper to correspond to outer edges of the disks where data is not recorded. Accordingly, if the disks are deflected due to an external shock, only the outer edges of the disks contact the disk protector, thereby preventing data recording surfaces of the disks from being damaged.
    Type: Application
    Filed: June 10, 2005
    Publication date: January 5, 2006
    Applicant: Samsung Electronics Co., LTD.
    Inventors: Jae-suk Lee, Young-rok Oh
  • Publication number: 20060002006
    Abstract: A hard disk drive having a housing including a base member, a cover member, a damping plate, and a buffer member. The base member supports a spindle motor for rotating a data storage disk and an actuator having a read/write head, with the cover member being attached to the base member to enclose the disk, the spindle motor, and the actuator. The damping plate is spaced a predetermined distance from a top surface of the cover member to form an air-gap. The buffer member is disposed between the cover member and the damping plate and along the circumference of the air-gap, with the buffer member being made of a material pervious to air but impervious/sealed to water, for example, polyurethane foam having a plurality of open-cells and closed-cells. Accordingly, even though air pressure varies, air pressures inside and outside the air-gap can be equalized.
    Type: Application
    Filed: June 14, 2005
    Publication date: January 5, 2006
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Jae-suk Lee
  • Publication number: 20050280123
    Abstract: Semiconductor devices and methods of manufacturing the same are disclosed. In a disclosed method, a dangling bond in the active region(s) is removed by providing an enough H2 in the PMD liner layer and the interlayer insulating layer directly contacting the active regions, and then gradually diffusing the H2 in a subsequent heat treatment. The method includes forming a gate electrode having a side wall spacer, forming source and drain regions, forming a PMD liner layer by sequentially forming a SiO2:H layer, a SiON:H layer and a SiN:H layer above the gate electrode and the source and drain regions, forming an interlayer insulating layer above the PMD liner layer, and diffusing hydrogen in the PMD liner layer and the interlayer insulating layer to the source and drain region by N2 annealing or Ar annealing.
    Type: Application
    Filed: June 22, 2005
    Publication date: December 22, 2005
    Inventor: Jae-Suk Lee
  • Publication number: 20050255709
    Abstract: High quality dielectric layers may be achieved without introducing excessive impurities when a semiconductor device is manufactured by a method that includes forming a lower wire layer on a structure above a semiconductor substrate, forming a silicon rich oxide layer having a refractive index of 0.45-1.55 on the lower wire layer and the structure, implanting carbon and oxygen (e.g., CO2) into the silicon rich oxide (SRO) layer, and forming an organosilicate glass layer by heat-treating the implanted SRO layer.
    Type: Application
    Filed: May 9, 2005
    Publication date: November 17, 2005
    Inventor: Jae-Suk Lee
  • Publication number: 20050215755
    Abstract: The present invention relates to a poly(2-vinylpyridine)-b-poly(n-hexylisocyanate) amphiphilic coil-rod block copolymer and a polymerization method thereof, more particularly to a poly(2-vinylpyridine)-b-poly(n-hexylisocyanate) amphiphilic coil-rod block copolymer polymerized by a process comprising synthesizing poly(2-vinylpyridine) having a narrow molecular weight distribution by living polymerization using potassium diphenylmethane (K-DPM) as initiator, adding sodium tetraphenylborate (NaBPh4) to replace the counter cation with a sodium ion (Na+) and adding n-hexylisocyanate and performing polymerization and a polymerization method thereof. According to the present invention, it is possible to control the molecular weight and the structure of each block of the copolymer. Therefore, coil-rod type amphiphilic block copolymers having a variety of structures can be obtained. The resultant block copolymer is a useful optical polymer material.
    Type: Application
    Filed: November 19, 2004
    Publication date: September 29, 2005
    Inventors: Jae-Suk Lee, Sang-Ho Han, Hyeong-Jin Kim, Yeong-Deuk Shin, Shashahar Samal
  • Patent number: 6949475
    Abstract: Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device comprises: a semiconductor substrate; an uppermost metal interconnect formed on the semiconductor substrate; an oxide layer formed on the substrate and the uppermost metal interconnect; an aluminum layer formed on the oxide layer; and a stress-relief layer formed on the aluminum layer to thereby prevent cracking of the passivation layer during a subsequent packaging process, to increase reliability of the passivation layer, and to prevent degradation of properties of the semiconductor device.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: September 27, 2005
    Assignee: DongbuAnam Semiconductor, Inc.
    Inventor: Jae Suk Lee
  • Publication number: 20050209426
    Abstract: The present invention relates to a polymerization method of polyisocyanates endcapped with acyl chlorides, and more particularly to a process for preparing polyisocyanate with higher stability comprising endcapping a living polymer chain amidate anion with an acyl chloride derivative in the presence of an amine catalyst, thereby enabling to maximize endcapping ratios.
    Type: Application
    Filed: November 11, 2004
    Publication date: September 22, 2005
    Inventors: Jae-Suk Lee, Chan Hee Jung, Sang-Yoon Park, Guttikonda Yogendra Nath, Shashahar Samal