Abstract: A damping structure of a hard disk drive. The damping structure includes: a damping plate arranged spaced apart from an upper surface of the cover member, such that an air gap is formed between the cover member and the damping plate; and a damping member arranged between an edge of the cover member and an edge of the damping plate. The damping plate includes a stepped portion which is inwardly formed at a portion spaced apart from the edge of the damping plate by a predetermined distance, and a bent portion which is formed at an edge of the damping plate and smoothly bent toward the cover member. In such a damping structure, an impact that is applied to the cover member from an outside can be reduced much more through the damping plate and the damping member.

Abstract: A method for fabricating an image sensor comprises forming an over coat layer on an upper face of a semiconductor substrate on which a color filter layer is formed, forming a microlens on the over coat layer; covering the microlens with a protection layer, back grinding a lower face of the semiconductor substrate, and removing the protection layer of the microlens. In this method, the protection layer is formed on the microlens of an image sensor and is subsequently removed after back grinding.

Abstract: Metal interconnection lines of semiconductor devices and methods of forming the same are disclosed. Improved reliability is achieved in a disclosed metal line of a semiconductor device by preventing metal layers from eroding and preventing metal lines from being destroyed due to electro-migration (EM) and stress-migration (SM). An illustrated metal interconnection line includes: a semiconductor substrate; a metal pattern on the substrate; a glue pattern under the metal pattern; an anti-reflection pattern on the metal pattern; and dummy patterns surrounding side walls of the metal pattern.

Abstract: The present invention relates to a semiconductor device fabrication method, which includes forming an inter metal dielectric on a semiconductor substrate having wirings and planarizing the inter metal dielectric through a chemical mechanical polishing, wherein the inter metal dielectric is formed by carrying out at least one cycle of depositing polycrystalline silicon, plasma-processing the polycrystalline silicon, and oxidizing the polycrystalline silicon.

Abstract: The present invention relates to a siloxane monomer containing a trifluorovinylether group and a sol-gel hybrid polymer prepared using the monomer, more particularly to siloxane monomer with novel structure prepared by reacting alkoxychlorosilane with a Grignard reagent containing a trifluorovinylether (—OC2F3) group, a method of preparing the same and a sol-gel hybrid polymer containing a perfluorocyclobutane (PFCB) group prepared from sol-gel reaction using said siloxane monomer containing a trifluorovinylether group.

Abstract: Semiconductor devices and methods of fabricating the same are disclosed. A disclosed method comprises: partially forming a first gate stack; partially forming a second gate stack adjacent the first gate stack; forming a first interlayer dielectric; and completing the formation of the first and second gate stacks after the first interlayer dielectric has filled a distance between the first and second gate electrodes.

Abstract: A semiconductor device includes a semiconductor substrate and metal wiring formed by alternately depositing aluminum layers and copper layers on the semiconductor substrate so that a top layer of the metal wiring is an aluminum layer. The metal wiring is fabricated by alternately depositing an aluminum layer and a copper layer on a semiconductor substrate a predetermined number of times to form a metal wiring layer having an aluminum top layer. A photoresist film pattern is formed on the metal wiring layer and metal wiring is formed by performing an etching process on the metal wiring layer using the photoresist film pattern as a mask.

Abstract: A method for formation of a copper diffusion barrier film using aluminum is disclosed. In the method, thin aluminum (Al) film is deposited on a dielectric, and a surface of the deposited aluminum film is plasma treated with NH3, thereby transforming the surface of the plasma treated aluminum film into a nitride film basically composed of aluminum nitride (AlxNy), and an aluminum film is deposited on the surface of the transformed aluminum nitride film, and copper is deposited on the surface of the deposited aluminum film. Therefore, because the diffusion of copper is suppressed, the problem that leakages between metal lines increase as pitches between the metals decrease due to high integration of parts of semiconductor can be settled.

Abstract: A method for fabricating an image sensor comprises forming an over coat layer on an upper face of a semiconductor substrate on which a color filter layer is formed, forming a microlens on the over coat layer; covering the microlens with a protection layer, back grinding a lower face of the semiconductor substrate, and removing the protection layer of the microlens. In this method, the protection layer is formed on the microlens of an image sensor and is subsequently removed after back grinding.

Abstract: A copper metallization structure includes a dielectric pattern formed on a surface of a substrate. Sequentially formed on the dielectric pattern are a first Ru layer and an oxide film. The copper metallization structure further includes a second Ru layer formed on the oxide film and a Cu layer formed on the second Ru layer.

Abstract: Methods for forming shallow trench isolation structures are disclosed. In a disclosed example, after a trench is formed in a substrate, an oxide layer is formed on sidewalls and a bottom of the trench. Then, a metal or poly-silicon layer is formed on the oxide layer. Next, a portion of the metal or poly-silicon layer is etched such that the oxide layer on the bottom of the trench is exposed, while leaving the metal or poly-silicon layer on the sidewalls of the trench. Finally, a dielectric material layer is deposited to fully fill the trench.

Abstract: Semiconductor devices and methods of fabricating semiconductor devices are disclosed. A disclosed semiconductor device comprises: a semiconductor substrate; an uppermost metal interconnect formed on the semiconductor substrate; an oxide layer formed on the substrate and the uppermost metal interconnect; an aluminum layer formed on the oxide layer; and a stress-relief layer formed on the aluminum layer to thereby prevent cracking of the passivation layer during a subsequent packaging process, to increase reliability of the passivation layer, and to prevent degradation of properties of the semiconductor device.

Abstract: Metal line structures in semiconductor devices and methods of forming the same are disclosed.

Abstract: After first metal lines and a first inter-metal dielectric are formed on a semiconductor substrate, top surfaces thereof are planarized to construct a flat plane. Then, second metal lines each being vertically aligned with a corresponding first metal line are formed on the flat plane, so that integral metal lines of a high aspect ratio are constructed. Gaps formed by the second metal lines are filled with a second inter-metal dielectric, which is joined with the first inter-metal dielectric to construct an integral inter-metal dielectric.

Abstract: The present invention relates to a novel initiator for polymerizing polyisocyanate, more particularly to a metal amidate represented by the following Formula 1, which is useful for polymerizing polyisocyanate having a variety of functional groups, including alkyl and aryl, by anionic living polymerization.

Abstract: The present invention relates to vinyl-phenyl monomers and polymers prepared therefrom. More particularly, the present invention is to provide the vinyl-phenyl monomers expressed by formula (1) which are capable of various polymerization such as radical polymerization, cation polymerization, anion polymerization and metallocene catalyzed polymerization due to resonance effect of phenyl group and changing characteristics variously and thus, suitable in the synthesis of general-purpose polymers which can be used in photo-functional materials by forming a complex with a metal component having an optical characteristic.

Abstract: A surface of a metal wiring formed over a portion of a substrate is oxidized and annealed to generate a stress reduction layer. Then a passsivation layer is deposited over the stress reduction layer and the remaining portions of the substrate so that a semiconductor with the stress reduction layer may be formed.

Abstract: After a trench is formed into a substrate, a polysilicon layer is formed on sidewalls and a bottom of the trench. A thermal oxidation is performed on the polysilicon layer such that a polysilicon oxide layer is formed thereon. Then, a portion of the polysilicon oxide layer is removed such that the polysilicon layer is exposed on the bottom of the trench while the sidewalls of the trench are still covered by the polysilicon oxide layer. A TEOS-ozone oxide layer is deposited on the substrate to fill the trench. Since the bottom of the trench has a better condition for the deposition of TEOS-ozone oxide layer than that of the sidewalls, a gap fill quality can be enhanced.

Abstract: The present invention relates to vinyl-phenyl monomers and polymers prepared therefrom. More particularly, the present invention is to provide the vinyl-phenyl monomers expressed by formula (1) which are capable of various polymerization such as radical polymerization, cation polymerization, anion polymerization and metallocene catalyzed polymerization due to resonance effect of phenyl group and changing characteristics variously and thus, suitable in the synthesis of general-purpose polymers which can be used in photo-functional materials by forming a complex with a metal component having an optical characteristic.

Abstract: After first metal lines and a first inter-metal dielectric are formed on a semiconductor substrate, top surfaces thereof are planarized to construct a flat plane. Then, second metal lines each being vertically aligned with a corresponding first metal line are formed on the flat plane, so that integral metal lines of a high aspect ratio are constructed. Gaps formed by the second metal lines are filled with a second inter-metal dielectric, which is joined with the first inter-metal dielectric to construct an integral inter-metal dielectric.