Patents by Inventor Jason Zhang

Jason Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150008445
    Abstract: One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (PET), such as a silicon PET, stacked atop a III-nitride transistor, such that a drain of the PET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
    Type: Application
    Filed: September 25, 2014
    Publication date: January 8, 2015
    Inventors: Heny Lin, Jason Zhang, Alberto Guerra
  • Publication number: 20140312429
    Abstract: There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000.
    Type: Application
    Filed: June 27, 2014
    Publication date: October 23, 2014
    Inventors: Tony Bramian, Jason Zhang
  • Patent number: 8847408
    Abstract: One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (FET), such as a silicon FET, stacked atop a III-nitride transistor, such that a drain of the FET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
    Type: Grant
    Filed: March 22, 2011
    Date of Patent: September 30, 2014
    Assignee: International Rectifier Corporation
    Inventors: Heny Lin, Jason Zhang, Alberto Guerra
  • Patent number: 8834376
    Abstract: Described herein is the use of ultrasound pulses at different frequencies to track the dispersion properties of intracranial tissues which may have been altered due to traumatic or other neurological brain injury. Dispersive ultrasound does not provide imaging, but it can provide data of significant diagnostic value by using decision support systems that can be trained as a medical diagnostic system for traumatic brain injuries applications to detect specific patterns of dispersion that are associated with specific intracranial injuries.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: September 16, 2014
    Assignee: Her Majesty The Queen in right of Canada as Represented by The Minister of Health
    Inventors: Stergios Stergiopoulos, Andreas Freibert, Jason Zhang
  • Publication number: 20140192441
    Abstract: Disclosed is a buck converter for converting a high voltage at the input of the buck converter to a low voltage at the output of the buck converter. The buck converter includes a control circuitry configured to control a duty cycle of a control switch, the control switch being interposed between the input and the output of the buck converter. A synchronous switch is interposed between the output and ground. The control switch and the synchronous switch comprise depletion-mode III-nitride transistors. In one embodiment, at least one of the control switch and the synchronous switches comprises a depletion-mode GaN HEMT. The buck converter further includes protection circuitry configured to disable current conduction through the control switch while the control circuitry is not powered up.
    Type: Application
    Filed: March 13, 2014
    Publication date: July 10, 2014
    Applicant: International Rectifier Corporation
    Inventors: Michael A. Briere, Jason Zhang, Bo Yang
  • Patent number: 8766375
    Abstract: There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: July 1, 2014
    Assignee: International Rectifier Corporation
    Inventors: Tony Bramian, Jason Zhang
  • Patent number: 8674670
    Abstract: Disclosed is a buck converter for converting a high voltage at the input of the buck converter to a low voltage at the output of the buck converter. The buck converter includes a control circuitry configured to control a duty cycle of a control switch, the control switch being interposed between the input and the output of the buck converter. A synchronous switch is interposed between the output and ground. The control switch and the synchronous switch comprise depletion-mode III-nitride transistors. In one embodiment, at least one of the control switch and the synchronous switches comprises a depletion-mode GaN HEMT. The buck converter further includes protection circuitry configured to disable current conduction through the control switch while the control circuitry is not powered up.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: March 18, 2014
    Assignee: International Rectifier Corporation
    Inventors: Michael A. Briere, Jason Zhang, Bo Yang
  • Patent number: 8610413
    Abstract: An integrated circuit that includes a power stage and a driver stage, all stages using III-nitride power devices.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: December 17, 2013
    Assignee: International Rectifier Corporation
    Inventors: Hamid Tony Bahramian, Jason Zhang, Michael A. Briere
  • Publication number: 20130234208
    Abstract: There are disclosed herein various implementations of composite semiconductor devices with active oscillation control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device may be configured to include one or both of a reduced output resistance due to, for example, a modified body implant and a reduced transconductance due to, for example, a modified oxide thickness to cause a gain of the composite semiconductor device to be less than approximately 10,000.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 12, 2013
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Tony Bramian, Jason Zhang
  • Publication number: 20130225998
    Abstract: Described herein is the use of ultrasound pulses at different frequencies to track the dispersion properties of intracranial tissues which may have been altered due to traumatic or other neurological brain injury. Dispersive ultrasound does not provide imaging, but it can provide data of significant diagnostic value by using decision support systems that can be trained as a medical diagnostic system for traumatic brain injuries applications to detect specific patterns of dispersion that are associated with specific intracranial injuries.
    Type: Application
    Filed: February 28, 2012
    Publication date: August 29, 2013
    Inventors: Stergios Stergiopoulos, Andreas Freibert, Jason Zhang
  • Patent number: 8450014
    Abstract: Lithium ion batteries having an anode comprising at least one graphene layer in electrical communication with titania to form a nanocomposite material, a cathode comprising a lithium olivine structure, and an electrolyte. The graphene layer has a carbon to oxygen ratio of between 15 to 1 and 500 to 1 and a surface area of between 400 and 2630 m2/g. The nanocomposite material has a specific capacity at least twice that of a titania material without graphene material at a charge/discharge rate greater than about 10 C. The olivine structure of the cathode of the lithium ion battery of the present invention is LiMPO4 where M is selected from the group consisting of Fe, Mn, Co, Ni and combinations thereof.
    Type: Grant
    Filed: October 9, 2010
    Date of Patent: May 28, 2013
    Assignee: Battelle Memorial Institute
    Inventors: Jun Liu, Daiwon Choi, Zhenguo Yang, Donghai Wang, Gordon L Graff, Zimin Nie, Vilayanur V Viswanathan, Jason Zhang, Wu Xu, Jin Yong Kim
  • Publication number: 20120241819
    Abstract: There are disclosed herein various implementations of composite III-nitride semiconductor devices having turn-on prevention control. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device. The LV device is configured to have a noise-resistant threshold voltage to provide the turn-on prevention control for the normally OFF composite semiconductor device by preventing noise current from flowing through a channel of the normally ON III-nitride power transistor in a noisy system.
    Type: Application
    Filed: March 8, 2012
    Publication date: September 27, 2012
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventor: Jason Zhang
  • Publication number: 20120241756
    Abstract: There are disclosed herein various implementations of composite semiconductor devices including a voltage protected device. In one exemplary implementation, a normally OFF composite semiconductor device comprises a normally ON III-nitride power transistor having a first output capacitance, and a low voltage (LV) device cascoded with the normally ON III-nitride power transistor to form the normally OFF composite semiconductor device, the LV device having a second output capacitance. A ratio of the first output capacitance to the second output capacitance is set based on a ratio of a drain voltage of the normally ON III-nitride power transistor to a breakdown voltage of the LV device so as to provide voltage protection for the LV device.
    Type: Application
    Filed: March 9, 2012
    Publication date: September 27, 2012
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Jason Zhang, Tony Bramian
  • Patent number: 8270137
    Abstract: An interposer electrical interface for placing a DC-DC converter in close proximity with an IC powered by the converter, the DC-DC converter including at least one switching node power supply stage, the at least one switching node power supply stage providing regulated power to the IC, the close proximity of the DC-DC converter and IC allowing for high efficiency in provision of the regulated power from the DC-DC converter to the IC, the interposer electrical interface comprising at least one electrical energy storage element.
    Type: Grant
    Filed: October 14, 2008
    Date of Patent: September 18, 2012
    Assignee: International Rectifier Corporation
    Inventors: Michael A. Briere, Hamid Tony Bahramian, Jason Zhang
  • Publication number: 20120223321
    Abstract: One exemplary disclosed embodiment comprises a three-terminal stacked-die package including a field effect transistor (FET), such as a silicon FET, stacked atop a III-nitride transistor, such that a drain of the FET resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a gate of the FET, a second terminal of the package is coupled to a drain of the III-nitride transistor. A third terminal of the package is coupled to a source of the FET. In this manner, devices such as cascoded switches may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 6, 2012
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Heny Lin, Jason Zhang, Alberto Guerra
  • Publication number: 20120223322
    Abstract: One exemplary disclosed embodiment comprises a two-terminal stacked-die package including a diode, such as a silicon diode, stacked atop a III-nitride transistor, such that a cathode of the diode resides on and is electrically coupled to a source of the III-nitride transistor. A first terminal of the package is coupled to a drain of the III-nitride transistor, and a second terminal of the package is coupled to an anode of the diode. In this manner, devices such as cascoded rectifiers may be packaged in a stacked-die form, resulting in reduced parasitic inductance and resistance, improved thermal dissipation, smaller form factor, and lower manufacturing cost compared to conventional packages.
    Type: Application
    Filed: March 22, 2011
    Publication date: September 6, 2012
    Applicant: INTERNATIONAL RECTIFIER CORPORATION
    Inventors: Heny Lin, Jason Zhang, Alberto Guerra
  • Patent number: 8148957
    Abstract: The high side or low side FET of a buck converter, or both, are replaced by plural parallel devices of different threshold voltage and are turned on and off in a sequence which offers the best turn on and turn off characteristics related to high and low threshold voltages. The parallel devices can have the same or different active areas.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: April 3, 2012
    Assignee: International Rectifier Corporation
    Inventor: Jason Zhang
  • Publication number: 20120062199
    Abstract: An integrated circuit that includes a power stage and a driver stage, all stages using III-nitride power devices.
    Type: Application
    Filed: November 18, 2011
    Publication date: March 15, 2012
    Inventors: Hamid Tony Bahramian, Jason Zhang, Michael A. Briere
  • Publication number: 20120062281
    Abstract: A power converter driver that is supplied with two different voltages.
    Type: Application
    Filed: November 17, 2011
    Publication date: March 15, 2012
    Inventors: Michael A. Briere, Jason Zhang, HamidTony Bahramian
  • Patent number: 8119667
    Abstract: Novel fenicol compounds having useful properties as antibiotic prodrugs, are provided, together with methods of making and using these new compounds.
    Type: Grant
    Filed: December 18, 2006
    Date of Patent: February 21, 2012
    Assignee: Schering-Plough Animal Health Corporation
    Inventors: Tomasz W. Glinka, Dale Edward Shuster, Chander Shekher Celly, Robert D. Simmons, Jason Zhang