Abstract: The present invention relates to a thyristor having a vertical structure and a cross-point memory array including the same. The thyristor having a vertical structure according to one embodiment may include a semiconductor core with an insulating film formed on the outer peripheral surface thereof, and a plurality of metal layers formed on the insulating film. In the semiconductor core, at least one layer of a base layer and an emitter layer may be formed on a region corresponding to each of the metal layers based on the charge plasma phenomenon due to the difference in work function with the metal layers.

Abstract: The present invention relates to a transistor based on a compact drain and hetero-material structure. The transistor according to one embodiment includes substrates including a buried oxide (BOX) layer and active layers formed on the buried oxide layer; an insulating layer formed on the substrates; and electrode layers formed on the insulating layer and including a drain electrode, a gate electrode, and a source electrode. The active layers include a first semiconductor layer corresponding to a drain region, a second semiconductor layer corresponding to a channel region, and a third semiconductor layer corresponding to a source region. The first semiconductor layer is formed to be thinner than the second semiconductor layer, and the third semiconductor layer is formed of a material having a band gap lower than that of the second semiconductor layer.

Abstract: Disclosed is a memory device including a lower electrode, a seed layer, a synthetic antiferromagnetic layer, a magnetic tunnel junction, and an upper electrode laminated on a substrate, wherein the magnetic tunnel junction includes a pinned layer, a tunnel barrier layer, and free layers, wherein the free layers include a first free layer, a spacer layer, a coupling layer, a buffer layer, and a second free layer laminated in sequential order.

Abstract: Disclosed is an artificial synapse device including an amorphous carbon oxide-based resistance change memory device and a method of fabricating the same, and more particularly to a technology for providing an artificial synapse device capable of implementing the characteristics of biological synapses responsible for memory and information transfer in the human brain using a resistance change memory device. More particularly, the artificial synapse device according to an embodiment of the provided includes a first electrode; a second electrode disposed to face the first electrode; and a switching layer formed of an amorphous carbon oxide deposited by injecting oxygen when sputtering carbon into a target between the first electrode and the second electrode, wherein the artificial synapse device has synaptic characteristics wherein a value of an output current changes gradually when a same voltage of either set voltage or reset voltage is repeatedly applied to the first electrode.

Abstract: An organic light-emitting display device includes quantum dots and an RGB color filter layer having quantum dots and thus is capable of removing 100% of interference among red, green, and blue color filters.

Abstract: A selector according to an embodiment of the present disclosure includes a first electrode; a second electrode disposed opposite to the first electrode; an ion supply layer disposed between the first electrode and the second electrode to be on the side of the first electrode and doped with a metal, wherein the doped metal diffuses toward the second electrode; a switching layer disposed between the first electrode and the second electrode to be on the side of the second electrode, wherein the doped metal diffuses from the ion supply layer into the switching layer so that metal concentration distribution inside the switching layer is changed to generate metal filaments; and a diffusion control layer inserted between the ion supply layer and the switching layer, wherein the diffusion control layer serves to adjust electrical characteristics related to the generated metal filaments as the amount of the diffusing metal is adjusted in proportion to a thickness of the diffusion control layer.

Abstract: Disclosed are quantum dots based on a graded multishell structure and a method of manufacturing the same. More particularly, each of the quantum dots according to an embodiment of the present invention includes a core, inter shells surrounding the core, and an outer shell surrounding the inter shells, wherein the concentrations of compounds composing the inter shells are changed stepwise from the core to the outer shell.

Abstract: Disclosed are quantum dots including a luminescent dopant. More particularly, each of the quantum dots according to an embodiment of the present invention includes a core and a shell surrounding the core, wherein at least one of an interior of the core and an interface between the core and the shell is doped with a luminescent group I dopant.

Abstract: Embodiments provide a slurry for polishing copper, a manufacturing method of a display device which uses the slurry, and the display device. The slurry for polishing copper includes an abrasive, a catalyst including a single molecule having an iron ion, a polishing suppressant, and an oxidizing agent.

Abstract: Disclosed are quantum dots based on a graded multishell structure and a method of manufacturing the same. More particularly, each of the quantum dots according to an embodiment of the present invention includes a core, inter shells surrounding the core, and an outer shell surrounding the inter shells, wherein the concentrations of compounds composing the inter shells are changed stepwise from the core to the outer shell.

Abstract: Disclosed are quantum dots including a luminescent dopant. More particularly, each of the quantum dots according to an embodiment of the present invention includes a core and a shell surrounding the core, wherein at least one of an interior of the core and an interface between the core and the shell is doped with a luminescent group I dopant.

Abstract: A selector according to an embodiment of the present disclosure includes a first electrode; a second electrode disposed opposite to the first electrode; an ion supply layer disposed between the first electrode and the second electrode to be on the side of the first electrode and doped with a metal, wherein the doped metal diffuses toward the second electrode; a switching layer disposed between the first electrode and the second electrode to be on the side of the second electrode, wherein the doped metal diffuses from the ion supply layer into the switching layer so that metal concentration distribution inside the switching layer is changed to generate metal filaments; and a diffusion control layer inserted between the ion supply layer and the switching layer, wherein the diffusion control layer serves to adjust electrical characteristics related to the generated metal filaments as the amount of the diffusing metal is adjusted in proportion to a thickness of the diffusion control layer.

Abstract: The present invention discloses an image sensor including a quantum dot layer. The image sensor including a quantum dot layer according to the present invention includes photoelectric conversion elements formed on a substrate to correspond to a plurality of pixel regions; a wiring layer formed on the substrate on which the photoelectric conversion elements are formed; color filters formed on the wiring layer to correspond to the photoelectric conversion elements; and a quantum dot layer formed on the color filters and absorbing light and emitting visible light having a specific range of wavelengths converted from the absorbed light.

Abstract: Disclosed are a neuron and a neuromorphic system including the same. More particularly, a neuron according to an embodiment of the present invention includes a completely depleted Silicon-On-Insulator (SOI) device whose a depletion region is controlled according to an inputted electrical signal to perform integration and leakage.

Abstract: The present invention relates to technology for fabricating a gallium nitride substrate using an ion implantation process to which a self-separation technique is applied. According to the present invention, a method of fabricating a gallium nitride substrate may include a step of forming a first gallium nitride layer on a substrate, a step of implanting hydrogen ions into the first gallium nitride layer to form a separation layer, a step of grinding the edges of the substrate, the first gallium nitride layer, and the separation layer, a step of forming a second gallium nitride layer on the first gallium nitride layer having a ground edge, and a step of self-separating the second gallium nitride layer from the first gallium nitride layer having a ground edge.

Abstract: Disclosed is a memory device including a multi-bit perpendicular magnetic tunnel junction, wherein the multi-bit perpendicular magnetic tunnel junction includes an upper synthetic antiferromagnetic layer, pinned layer, lower dual free layer, and upper free layer formed in a laminated manner between a top electrode and a bottom electrode.

Abstract: The present invention discloses a selection device and a memory device including the same. The selection device according to an embodiment of the present invention has high reliability and a high selection ratio. Accordingly, when the selection device is used, a highly integrated memory cell capable of selecting a desired cell without leakage current may be provided.

Abstract: The present invention discloses a neuron and a neuromorphic system including the same. The neuron according to an embodiment of the present invention includes a two-terminal spin device for performing integration and fire, and the two-terminal spin device is formed to have a negative differential resistance (NDR) region in which current decreases as voltage increases.

Abstract: The present invention discloses a neuron and a neuromorphic system including the same. The neuron according to an embodiment of the present invention includes a metal insulator metal (MIM) device including a metal ion-doped insulating layer and configured to perform integration and fire, and the MIM device is formed to have a negative differential resistance (NDR) region in which current decreases as voltage increases.

Abstract: The present invention discloses a dual image sensor. The dual image sensor according to one embodiment of the present invention includes first and second image sensor modules mounted on a printed circuit board, wherein the first image sensor module includes a first housing mounted on the printed circuit board; a first image sensor mounted on the printed circuit board and formed on a first surface of the first housing; and a first lens formed on a second surface of the first housing, and the second image sensor module includes a second housing mounted on the printed circuit board; a second image sensor mounted on the printed circuit board and formed on a first surface of the second housing; a second lens formed on a second surface of the second housing; and a quantum dot layer formed between the second image sensor and the second lens and absorbing ultraviolet light and emitting visible light converted from the absorbed ultraviolet light.