Patents by Inventor Jea-gun Park

Jea-gun Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190371604
    Abstract: Disclosed is a method of fabricating a gallium nitride substrate using a plurality of ion implantation processes.
    Type: Application
    Filed: May 29, 2018
    Publication date: December 5, 2019
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Jae Hyoung SHIM, Tae Hun SHIM
  • Publication number: 20190371597
    Abstract: Disclosed a method of fabricating a gallium nitride substrate using hydride vapor phase epitaxy (HVPE), including a step of injecting ammonia (NH3) gas to perform first surface treatment on a sapphire substrate; a step of injecting ammonia gas and hydrogen chloride (HCl) gas to form a buffer layer on the sapphire substrate; a step of injecting ammonia gas to perform second surface treatment on the sapphire substrate; and a step of allowing gallium nitride (GaN) to grow on the sapphire substrate while lowering the flow rate ratio of ammonia gas to hydrogen chloride gas stepwise.
    Type: Application
    Filed: May 29, 2018
    Publication date: December 5, 2019
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Jae Hyoung SHIM, Tae Hun SHIM
  • Patent number: 10497562
    Abstract: Disclosed a method of fabricating a gallium nitride substrate using hydride vapor phase epitaxy (HVPE), including a step of injecting ammonia (NH3) gas to perform first surface treatment on a sapphire substrate; a step of injecting ammonia gas and hydrogen chloride (HCl) gas to form a buffer layer on the sapphire substrate; a step of injecting ammonia gas to perform second surface treatment on the sapphire substrate; and a step of allowing gallium nitride (GaN) to grow on the sapphire substrate while lowering the flow rate ratio of ammonia gas to hydrogen chloride gas stepwise.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: December 3, 2019
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun Park, Jae Hyoung Shim, Tae Hun Shim
  • Patent number: 10453510
    Abstract: The present invention provides a memory device in which a lower electrode, a seed layer, synthetic antiferromagnetic (SyAF) layers, a separation layer, a magnetic tunnel junction, a capping layer, and an upper electrode are formed on a substrate in a laminated manner, wherein a diffusion barrier is formed between the magnetic tunnel junction and the capping layer. In addition, the present invention provides a memory device in which a lower electrode, a seed layer, SyAF layers, a separation layer, a magnetic tunnel junction, a capping layer, and an upper electrode are formed on a substrate in a laminated manner, wherein the seed layer is formed of a material that allows the SyAF layers to grow in the FCC (111) direction.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: October 22, 2019
    Assignee: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Jea Gun Park, Du Yeong Lee, Seung Eun Lee
  • Publication number: 20190251427
    Abstract: The present disclosure provides a neuromorphic device and a method of driving the same. The neuromorphic device of the present disclosure includes a channel, the magnetization direction of which is changed as a plurality of data is integrated, first and second magnetization regulators formed on both ends of the channel and responsible for changing the magnetization direction of the channel according to a plurality of input data, and a controller formed on the channel between the first and second magnetization regulators and responsible for firing data equal to or greater than a critical value integrated in the channel.
    Type: Application
    Filed: September 1, 2017
    Publication date: August 15, 2019
    Inventors: Jea Gun PARK, Du Yeong LEE, Seung Eun LEE
  • Publication number: 20190244649
    Abstract: The present invention provides a memory device in which a lower electrode, a seed layer, synthetic exchange diamagnetic layers, a separation layer, a magnetic tunnel junction, a capping layer, and an upper electrode are formed on a substrate in a laminated manner, wherein a diffusion barrier is formed between the magnetic tunnel junction and the capping layer. In addition, the present invention provides a memory device in which a lower electrode, a seed layer, synthetic exchange diamagnetic layers, a separation layer, a magnetic tunnel junction, a capping layer, and an upper electrode are formed on a substrate in a laminated manner, wherein the seed layer is formed of a material that allows the synthetic exchange diamagnetic layers to grow in the FCC (111) direction.
    Type: Application
    Filed: April 19, 2019
    Publication date: August 8, 2019
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Du Yeong LEE, Seung Eun LEE
  • Patent number: 10373825
    Abstract: Disclosed is a method of fabricating a gallium nitride substrate using nanoparticles with a core-shell structure. A method of fabricating a gallium nitride substrate using nanoparticles with a core-shell structure according to an embodiment of the present disclosure includes a step of coating nanoparticles with a core-shell structure on a temporary substrate to form at least one nanoparticle layer; a step of allowing a pit gallium nitride (pit GaN) layer to grow on the temporary substrate; a step of allowing a mirror GaN layer (mirror GaN) to grow on the pit GaN layer; and a step of separating the temporary substrate, wherein each of the nanoparticles with a core-shell structure includes a core and an ionic polymer shell coated on a surface of the core surface.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: August 6, 2019
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun Park, Tae Hun Shim, Jae Hyoung Shim, Il Hwan Kim
  • Publication number: 20190229259
    Abstract: The present invention provides a memory device in which lower electrodes, a buffer layer, a seed layer, a magnetic tunnel junction, a capping layer, synthetic exchange diamagnetic layers, and an upper electrode are formed on a substrate in a laminated manner. According to the present invention, the lower electrodes and the seed layer are formed of a polycrystalline conductive material, and the perpendicular magnetic anisotropy of the magnetic tunnel junction is maintained upon heat treatment at a high temperature of 400° C. or more.
    Type: Application
    Filed: March 18, 2015
    Publication date: July 25, 2019
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Du Yeong LEE, Seung Eun LEE, Min Su JEON, Jong Ung BAEK, Tae Hun SHIM
  • Publication number: 20190172997
    Abstract: The present invention provides a memory device in which lower electrodes, a buffer layer, a seed layer, a magnetic tunnel junction, a capping layer, synthetic exchange diamagnetic layers, and an upper electrode are formed on a substrate in a laminated manner. According to the present invention, the lower electrodes and the seed layer are formed of a polycrystalline conductive material, and the perpendicular magnetic anisotropy of the magnetic tunnel junction is maintained upon heat treatment at a high temperature of 400° C. or more.
    Type: Application
    Filed: March 18, 2015
    Publication date: June 6, 2019
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Du Yeong LEE, Seung Eun LEE, Min Su JEON, Jong Ung BAEK, Tae Hun SHIM
  • Publication number: 20190043548
    Abstract: The present invention provides a memory device in which a lower electrode, a seed layer, synthetic exchange diamagnetic layers, a separation layer, a magnetic tunnel junction, a capping layer, and an upper electrode are formed on a substrate in a laminated manner, wherein a diffusion barrier is formed between the magnetic tunnel junction and the capping layer. In addition, the present invention provides a memory device in which a lower electrode, a seed layer, synthetic exchange diamagnetic layers, a separation layer, a magnetic tunnel junction, a capping layer, and an upper electrode are formed on a substrate in a laminated manner, wherein the seed layer is formed of a material that allows the synthetic exchange diamagnetic layers to grow in the FCC (111) direction.
    Type: Application
    Filed: February 3, 2017
    Publication date: February 7, 2019
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Du Yeong LEE, Seung Eun LEE
  • Publication number: 20180006213
    Abstract: The present invention relates to a memory device including a substrate and a lower electrode, buffer layer, seed layer, Magnetic Tunnel Junction (MTJ), capping layer, synthetic exchange diamagnetic layer, and upper electrode formed on the substrate.
    Type: Application
    Filed: September 18, 2017
    Publication date: January 4, 2018
    Applicant: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea Gun PARK, Du Yeong LEE, Song Hwa HONG, Jin Young CHOI, Seung Eun LEE, Junli LI
  • Patent number: 9831426
    Abstract: Provided are a conductive bridging random access memory (CBRAM) device and a manufacturing method thereof. The CBRAM device includes a first electrode, a semiconductor oxide electrolyte layer formed on the first electrode and including a plurality of metal vacancies, a second electrode formed on the semiconductor oxide electrolyte layer, wherein when a positive voltage is applied to the second electrode, cations are reduced to the metal vacancies in the semiconductor oxide electrolyte layer to form a metal bridge.
    Type: Grant
    Filed: May 12, 2015
    Date of Patent: November 28, 2017
    Assignee: IUCF-HYU
    Inventor: Jea Gun Park
  • Patent number: 9825151
    Abstract: The present invention suggests a substrate manufacturing method and a manufacturing method of a semiconductor device comprising: providing a SOI structure having an insulation layer and a silicon layer laminated on a substrate; laminating to form a silicon germanium layer and a capping silicon layer on the SOI structure; implementing oxidation process at two or more temperatures and heat treatment process at least once during the oxidation process to form a germanium cohesion layer and a silicon dioxide layer; and removing the silicon dioxide layer.
    Type: Grant
    Filed: January 27, 2015
    Date of Patent: November 21, 2017
    Assignee: IUCF-HYU
    Inventors: Jea Gun Park, Tea Hun Shim, Seung Hyun Song, Du Yeong Lee
  • Patent number: 9755169
    Abstract: Provided is a nonvolatile memory device. The nonvolatile memory device includes: first and second electrodes spaced from each other; at least one nano crystal layer disposed between the first and second electrodes; and first and second material layers respectively disposed between the first and second electrodes and the nano crystal layer and having a bistable conductive property, wherein the first and second material layers are formed asymmetrical to each other.
    Type: Grant
    Filed: July 27, 2012
    Date of Patent: September 5, 2017
    Assignee: IUCF-HYU
    Inventors: Jea Gun Park, Sung Ho Seo, Woo Sik Nam, Jong Sun Lee
  • Patent number: 9711569
    Abstract: An image sensor and an operating method thereof are disclosed. The image sensor includes a first photoelectric conversion portion configured to receive plural lights, except for a light of first wavelength, to generate an electric charge; and a second photoelectric conversion portion configured to receive the light of the first wavelength to generate an electric charge, wherein at least a portion of the first photoelectric conversion portion and the second photoelectric conversion portion is spaced apart from each other in a vertical direction.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: July 18, 2017
    Assignee: IUCF-HYU
    Inventors: Jea-Gun Park, Seung-Hyun Song, Ji-Heon Kim, Dal-Ho Kim
  • Publication number: 20170012113
    Abstract: The present invention suggests a substrate manufacturing method and a manufacturing method of a semiconductor device comprising: providing a SOI structure having an insulation layer and a silicon layer laminated on a substrate; laminating to form a silicon germanium layer and a capping silicon layer on the SOI structure; implementing oxidation process at two or more temperatures and heat treatment process at least once during the oxidation process to form a germanium cohesion layer and a silicon dioxide layer; and removing the silicon dioxide layer.
    Type: Application
    Filed: January 27, 2015
    Publication date: January 12, 2017
    Inventors: Jea Gun PARK, Tea Hun SHIM, Seung Hyun SONG, Du Yeong LEE
  • Publication number: 20160336510
    Abstract: Provided are a conductive bridging random access memory (CBRAM) device and a manufacturing method thereof. The CBRAM device includes a first electrode, a semiconductor oxide electrolyte layer formed on the first electrode and including a plurality of metal vacancies, a second electrode formed on the semiconductor oxide electrolyte layer, wherein when a positive voltage is applied to the second electrode, cations are reduced to the metal vacancies in the semiconductor oxide electrolyte layer to form a metal bridge.
    Type: Application
    Filed: May 12, 2015
    Publication date: November 17, 2016
    Inventor: Jea Gun PARK
  • Publication number: 20160322592
    Abstract: The present invention provides a solar cell and a method for manufacturing the same, the solar cell including a first electrode formed on a substrate, a nanocrystal layer including a plurality of nanocrystals formed on the first electrode so as to contact the first electrode, a hole transport layer formed on the first electrode so as to cover the plurality of nanocrystals, a photoactive layer formed on the hole transport layer, and a second electrode formed on the photoactive layer.
    Type: Application
    Filed: October 10, 2014
    Publication date: November 3, 2016
    Inventors: Jea Gun PARK, Tea Hun SHIM, Dal Ho KIM, Ji Heon KIM, Jae Woo SHIN, Joo Hyoung PARK
  • Patent number: 9287132
    Abstract: Provided are a multi-selective polishing slurry composition and a semiconductor element production method using the same. A silicon film provided with element patterns is formed on the uppermost part of a substrate having a first region and a second region. The element pattern density on the first region is higher than the element pattern density on the second region. Formed in sequence on top of the element patterns are a first silicon oxide film, a silicon nitride film and a second silicon oxide film. The substrate is subjected to chemical-mechanical polishing until the silicon film is exposed, by using a polishing slurry composition containing a polishing agent, a silicon nitride film passivation agent and a silicon film passivation agent.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: March 15, 2016
    Assignee: Industry-University Cooperation Foundation Hanyang University
    Inventors: Jea-Gun Park, Un-Gyu Paik, Jin-Hyung Park, Hao Cui, Jong-Young Cho, Hee-Sub Hwang, Jae-Hyung Lim, Ye-Hwan Kim
  • Publication number: 20150337173
    Abstract: The present invention relates to slurry for polishing crystalline phase-change materials and to a method for producing a phase-change device using the same. The slurry for polishing crystalline phase-change materials according to one embodiment of the present invention comprises an abrasive, an alkaline abrasive enhancer, an oxidizing agent having a standard reduction potential higher than that of perchlorates, and ultrapure water. In addition, the method for producing a phase-change device according to one embodiment of the present invention comprises the following steps: preparing a substrate; forming a crystalline phase-change material film on the substrate; and removing the phase-change material film through a chemical-mechanical polishing process using slurry for polishing phase-change materials, which comprises an abrasive, an alkaline abrasive enhancer, an oxidizing agent having a standard reduction potential higher than that of perchlorates, and ultrapure water.
    Type: Application
    Filed: August 4, 2015
    Publication date: November 26, 2015
    Inventors: Jea Gun PARK, Un Gyu PARK, Jin Hyung PARK, Hao CUI, Jong Young CHO, Hee Sub HWANG, Jae Hyung LIM, Ye Hwan KIM