Abstract: Exemplary embodiments relate to a skin-adherable electronic device including a semiconductor circuit unit including a circuit element including an electrode and an interconnect, and a semiconductor device including an insulating layer and an active layer; and a flexible patch that can adhere to skin and including a plurality of through-holes, wherein the insulating layer includes a plurality of through-holes corresponding to the plurality of through-holes of the flexible patch, and a method of manufacturing the same. When the active layer is made of a piezoelectric material, the electronic device may be used as a skin sensor that can acquire skin deformation and/or elasticity information.

Abstract: A semiconductor device that includes a fin structure of a type III-V semiconductor material that is substantially free of defects, and has sidewalls that are substantially free of roughness caused by epitaxially growing the type III-V semiconductor material abutting a dielectric material. The semiconductor device further includes a gate structure present on a channel portion of the fin structure; and a source region and a drain region present on opposing sides of the gate structure.

Abstract: Magnetoelectric heterostructures, and related articles, systems, and methods, are generally described.

Abstract: A strain sensor unit and a skin sensor module comprising the same are provided. The strain sensor unit according to an embodiment of the present disclosure includes a substrate having a through-hole, and including a first electrode and a second electrode formed at one side and the other side of the through-hole on one surface of the substrate, a piezoelectric device drawn from the first electrode and extending inward the through-hole, and a piezoresistor drawn from the second electrode and extending inward the through-hole, wherein the piezoresistor overlaps with a whole or part of the piezoelectric device.

Abstract: Memristors, including memristors comprising a Schottky barrier, and related systems and methods are generally described.

Abstract: An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.

Abstract: An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.

Abstract: A method of fabricating a curved focal plane array (FPA) includes forming an epitaxial layer including a semiconductor on a release layer. The release layer includes a two-dimensional (2D) material and is disposed on a first substrate. The method also includes forming a metal layer on the epitaxial layer and transferring the epitaxial layer and the metal layer to a second substrate including an elastomer. The method also includes fabricating a plurality of photodetectors from the epitaxial layer and bending the second substrate to form the curved FPA.

Abstract: A semiconductor device that includes a fin structure of a type III-V semiconductor material that is substantially free of defects, and has sidewalls that are substantially free of roughness caused by epitaxially growing the type III-V semiconductor material abutting a dielectric material. The semiconductor device further includes a gate structure present on a channel portion of the fin structure; and a source region and a drain region present on opposing sides of the gate structure.

Abstract: A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween. A device channel is formed in the thin semiconductor layer. Source and drain regions are formed at opposing positions relative to the device channel. The source and drain regions include an n-type material deposited on the buried dielectric within a thickness of the thin semiconductor layer. A gate structure is formed over the device channel.

Abstract: A photovoltaic device and method include forming a plurality of pillar structures in a substrate, forming a first electrode layer on the pillar structures and forming a continuous photovoltaic stack including an N-type layer, a P-type layer and an intrinsic layer on the first electrode. A second electrode layer is deposited over the photovoltaic stack such that gaps or fissures occur in the second electrode layer between the pillar structures. The second electrode layer is wet etched to open up the gaps or fissures and reduce the second electrode layer to form a three-dimensional electrode of substantially uniform thickness over the photovoltaic stack.

Abstract: Systems and methods for growth of silicon carbide over a layer comprising graphene and/or hexagonal boron nitride, and related articles, are generally described. In some embodiments, a SiC film is fabricated over a layer comprising graphene and/or hexagonal boron nitride, which in turn is disposed over a substrate. The layer and/or the substrate may be lattice-matched with the SiC film to reduce defect density in the SiC film. The fabricated SiC film may then be removed from the substrate via, for example, a stressor attached to the SiC film. In certain cases, the layer serves as a reusable platform for growing SiC films and also serves a release layer that allows fast, precise, and repeatable release at the layer surface.

Abstract: A method for fabricating a photovoltaic device includes forming a polycrystalline absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) over a substrate. The absorber layer is rapid thermal annealed in a sealed chamber having elemental sulfur within the chamber. A sulfur content profile is graded in the absorber layer in accordance with a size of the elemental sulfur and an anneal temperature to provide a graduated bandgap profile for the absorber layer. Additional layers are formed on the absorber layer to complete the photovoltaic device.

Abstract: A strain sensor unit and a skin sensor module comprising the same are provided. The strain sensor unit according to an embodiment of the present disclosure includes a substrate having a through-hole, and including a first electrode and a second electrode formed at one side and the other side of the through-hole on one surface of the substrate, a piezoelectric device drawn from the first electrode and extending inward the through-hole, and a piezoresistor drawn from the second electrode and extending inward the through-hole, wherein the piezoresistor overlaps with a whole or part of the piezoelectric device.

Abstract: An electronic device includes a spreading layer and a first contact layer formed over and contacting the spreading layer. The first contact layer is formed from a thermally conductive crystalline material having a thermal conductivity greater than or equal to that of an active layer material. An active layer includes one or more III-nitride layers. A second contact layer is formed over the active layer, wherein the active layer is disposed vertically between the first and second contact layers to form a vertical thin film stack.

Abstract: A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween. A device channel is formed in the thin semiconductor layer. Source and drain regions are formed at opposing positions relative to the device channel. The source and drain regions include an n-type material deposited on the buried dielectric within a thickness of the thin semiconductor layer. A gate structure is formed over the device channel.

Abstract: Exemplary embodiments relate to a skin-adherable flexible patch including a flexible patch layer having one surface that can adhere to skin and configured to support a micro scale semiconductor device; and a plurality of holes passing through from one surface of the flexible patch to the other surface of the flexible patch, and a method for manufacturing the flexible patch.

Abstract: A method of manufacturing a semiconductor device includes forming a first epitaxial layer on a first substrate. The first substrate includes a first semiconductor material having a first lattice constant and the first epitaxial layer includes a second semiconductor material having a second lattice constant different from the first lattice constant. The method also includes disposing a graphene layer on the first epitaxial layer and forming a second epitaxial layer comprising the second semiconductor material on the graphene layer. This method can increase the substrate reusability, increase the release rate of functional layers, and realize precise control of release thickness.

Abstract: Electrical switching technologies employ the otherwise undesirable line defect in crystalline materials to form conductive filaments. A switching cell includes a crystalline layer disposed between an active electrode and another electrode. The crystalline layer has at least one channel, such as a line defect, extending from one surface of the crystalline layer to the other surface. Upon application of a voltage on the two electrodes, the active electrode provides metal ions that can migrate from the active electrode to the other electrode along the line defect, thereby forming a conductive filament. The switching cell can precisely locate the conductive filament within the line defect and increase the device-to-device switching uniformity.

Abstract: A semiconductor device that includes a fin structure having a porous core, and a relaxed semiconductor layer present on the porous core. The semiconductor device may further include a strained semiconductor layer that is substantially free of defects that is present on the strained semiconductor layer. A gate structure may be present on a channel region of the fin structure, and source and drain regions may be present on opposing sides of the gate structure.