Patents by Inventor Jeehwan Kim

Jeehwan Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • RESONANT CAVITY STRAINED III-V PHOTODETECTOR AND LED ON SILICON SUBSTRATE
    Publication number: 20200075804
    Abstract: An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.
    Type: Application
    Filed: November 8, 2019
    Publication date: March 5, 2020
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana
  • Substrate-free thin-film flexible photovoltaic device and fabrication method
    Patent number: 10580928
    Abstract: A method for thermal exfoliation includes providing a target layer on a substrate to form a structure. A stressor layer is deposited on the target layer. The structure is placed in a temperature controlled environment to induce differential thermal expansion between the target layer and the substrate. The target layer is exfoliated from the substrate when a critical temperature is achieved such that the target layer is separated from the substrate to produce a standalone, thin film device.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: March 3, 2020
    Assignees: International Business Machines Corporation, Solar Frontier K.K.
    Inventors: Oki Gunawan, Homare Hiroi, Jeehwan Kim, David B. Mitzi, Hiroki Sugimoto
  • Resonant cavity strained III-V photodetector and LED on silicon substrate
    Patent number: 10559714
    Abstract: An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: February 11, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana
  • SYSTEMS AND METHODS FOR FABRICATING SEMICONDUCTOR DEVICES VIA REMOTE EPITAXY
    Publication number: 20200043790
    Abstract: A method of manufacturing a semiconductor device includes forming a release layer on a first substrate and the release layer includes a planar organic molecule. The method also includes forming a single-crystalline film on the release layer and transferring the single-crystalline film from the release layer to a second substrate.
    Type: Application
    Filed: April 18, 2018
    Publication date: February 6, 2020
    Applicant: Massachusetts Institute of Technology
    Inventors: Kyusang Lee, Jeehwan Kim
  • POROUS SILICON RELAXATION MEDIUM FOR DISLOCATION FREE CMOS DEVICES
    Publication number: 20200043811
    Abstract: A method for forming CMOS devices includes masking a first portion of a tensile-strained silicon layer of a SOI substrate, doping a second portion of the layer outside the first portion and growing an undoped silicon layer on the doped portion and the first portion. The undoped silicon layer becomes tensile-strained. Strain in the undoped silicon layer over the doped portion is relaxed by converting the doped portion to a porous silicon to form a relaxed silicon layer. The porous silicon is converted to an oxide. A SiGe layer is grown and oxidized to convert the relaxed silicon layer to a compressed SiGe layer. Fins are etched in the first portion from the tensile-strained silicon layer and the undoped silicon layer and in the second portion from the compressed SiGe layer.
    Type: Application
    Filed: October 10, 2019
    Publication date: February 6, 2020
    Inventors: Kangguo Cheng, Ramachandra Divakaruni, Jeehwan Kim, Juntao Li, Devendra K. Sadana
  • HYBRID CZTSSe PHOTOVOLTAIC DEVICE
    Publication number: 20200044107
    Abstract: A photovoltaic device includes a first contact and a hybrid absorber layer. The hybrid absorber layer includes a chalcogenide layer and a semiconductor layer in contact with the chalcogenide layer. A buffer layer is formed on the absorber layer, and a transparent conductive contact layer is formed on the buffer layer.
    Type: Application
    Filed: October 8, 2019
    Publication date: February 6, 2020
    Inventors: Tayfun Gokmen, Oki Gunawan, Richard A. Haight, Jeehwan Kim, David B. Mitzi, Mark T. Winkler
  • Porous silicon relaxation medium for dislocation free CMOS devices
    Patent number: 10541177
    Abstract: A method for forming CMOS devices includes masking a first portion of a tensile-strained silicon layer of a SOI substrate, doping a second portion of the layer outside the first portion and growing an undoped silicon layer on the doped portion and the first portion. The undoped silicon layer becomes tensile-strained. Strain in the undoped silicon layer over the doped portion is relaxed by converting the doped portion to a porous silicon to form a relaxed silicon layer. The porous silicon is converted to an oxide. A SiGe layer is grown and oxidized to convert the relaxed silicon layer to a compressed SiGe layer. Fins are etched in the first portion from the tensile-strained silicon layer and the undoped silicon layer and in the second portion from the compressed SiGe layer.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: January 21, 2020
    Assignee: International Business Machines Corporation
    Inventors: Kangguo Cheng, Ramachandra Divakaruni, Jeehwan Kim, Juntao Li, Devendra K. Sadana
  • Resonant cavity strained III-V photodetector and LED on silicon substrate
    Patent number: 10529891
    Abstract: An optoelectronic device that includes a germanium containing buffer layer atop a silicon containing substrate, and a first distributed Bragg reflector stack of III-V semiconductor material layers on the buffer layer. The optoelectronic device further includes an active layer of III-V semiconductor material present on the first distributed Bragg reflector stack, wherein a difference in lattice dimension between the active layer and the first distributed brag reflector stack induces a strain in the active layer. A second distributed Bragg reflector stack of III-V semiconductor material layers having a may be present on the active layer.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: January 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana
  • Methods and apparatus for vertically stacked multicolor light-emitting diode (LED) display
    Patent number: 10517155
    Abstract: A method of fabricating a multicolor light-emitting diode (LED) display includes forming a first LED layer on a first release layer comprising a first two-dimensional (2D) material disposed on a first substrate. The first LED layer is configured to emit light at a first wavelength. The method also includes transferring the first LED layer from the first release layer to a host substrate and forming a second LED layer on a second release layer comprising a second 2D material disposed on a second substrate. The second LED layer is configured to emit light at a second wavelength. The method also includes removing the second LED layer from the second release layer and disposing the second LED layer on the first LED layer.
    Type: Grant
    Filed: October 10, 2018
    Date of Patent: December 24, 2019
    Assignee: Massachusetts Institute of Technology
    Inventors: Kyusang Lee, Wei Kong, Jeehwan Kim
  • APPARATUS AND METHODS FOR CURVED FOCAL PLANE ARRAY
    Publication number: 20190386044
    Abstract: A method of fabricating a curved focal plane array (FPA) includes forming an epitaxial layer including a semiconductor on a release layer. The release layer includes a two-dimensional (2D) material and is disposed on a first substrate. The method also includes forming a metal layer on the epitaxial layer and transferring the epitaxial layer and the metal layer to a second substrate including an elastomer. The method also includes fabricating a plurality of photodetectors from the epitaxial layer and bending the second substrate to form the curved FPA.
    Type: Application
    Filed: February 23, 2018
    Publication date: December 19, 2019
    Applicant: Massachusetts Institute of Technology
    Inventors: Kyusang Lee, Jeehwan Kim
  • Hybrid CZTSSe photovoltaic device
    Patent number: 10505066
    Abstract: A photovoltaic device includes a first contact and a hybrid absorber layer. The hybrid absorber layer includes a chalcogenide layer and a semiconductor layer in contact with the chalcogenide layer. A buffer layer is formed on the absorber layer, and a transparent conductive contact layer is formed on the buffer layer.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: December 10, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tayfun Gokmen, Oki Gunawan, Richard A. Haight, Jeehwan Kim, David B. Mitzi, Mark T. Winkler
  • MONOLITHICALLY INTEGRATED LASER WITH LED PUMP
    Publication number: 20190363514
    Abstract: A method for forming a pumped laser structure includes forming a III-V buffer layer on a substrate including one of Si or Ge; forming a light emitting diode (LED) on the buffer layer configured to produce a threshold pump power; forming a photonic crystal layer on the LED and depositing a monolayer semiconductor nanocavity laser on the photonic crystal layer for receiving light through the photonic crystal layer from the LED with an optical pump power greater than the threshold pump power, wherein the LED and the laser are formed monolithically and the LED functions as an optical pump for the laser.
    Type: Application
    Filed: July 26, 2019
    Publication date: November 28, 2019
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana, Brent A. Wacaser
  • MONOLITHICALLY INTEGRATED LASER WITH LED PUMP
    Publication number: 20190363513
    Abstract: A laser structure including a Si or Ge substrate, a III-V buffer layer formed on the substrate, a light emitting diode (LED) formed on the buffer layer configured to produce visible light, a lens disposed on the LED to focus light from the LED, a photonic crystal layer formed on the LED to receive the light focused by the lens, and a monolayer semiconductor nanocavity laser formed on the photonic crystal layer for receiving light through the photonic crystal layer from the LED. The LED and the laser are formed monolithically and the LED acts as an optical pump for the laser.
    Type: Application
    Filed: July 26, 2019
    Publication date: November 28, 2019
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana, Brent A. Wacaser
  • LIGHT EMITTING DIODE WITH ZnO EMITTER
    Publication number: 20190341528
    Abstract: A light emitting diode (LED) includes a p-type ohmic contact and a p-type substrate in contact with the p-type ohmic contact. A p-type confinement layer is provided on the p-type substrate. An emission layer is provided on the p-type confinement layer. An n-type confinement layer is provided on the emission layer. A transparent II-VI n-type contact layer is formed on the n-type confinement layer as a replacement for a current spreading layer, a III-V contact layer and an n-type ohmic contact.
    Type: Application
    Filed: July 22, 2019
    Publication date: November 7, 2019
    Inventors: Keith E. Fogel, Jeehwan Kim, Ning Li, Devendra K. Sadana
  • COST-EFFICIENT HIGH POWER PECVD DEPOSITION FOR SOLAR CELLS
    Publication number: 20190326463
    Abstract: A method for forming a photovoltaic device includes providing a substrate. A layer is deposited to form one or more layers of a photovoltaic stack on the substrate. The depositing of the amorphous layer includes performing a high power flash deposition for depositing a first portion of the layer. A low power deposition is performed for depositing a second portion of the layer.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 24, 2019
    Inventors: TZE-CHIANG CHEN, AUGUSTIN J. HONG, JEEHWAN KIM, DEVENDRA K. SADANA
  • Single crystalline CZTSSe photovoltaic device
    Patent number: 10453978
    Abstract: A method for fabricating a photovoltaic device includes forming a two dimensional material on a first monocrystalline substrate. A single crystal absorber layer including Cu—Zn—Sn—S(Se) (CZTSSe) is grown over the first monocrystalline substrate. The single crystal absorber layer is exfoliated from the two dimensional material. The single crystal absorber layer is transferred to a second substrate, and the single crystal absorber layer is placed on a conductive layer formed on the second substrate. Additional layers are formed on the single crystal absorber layer to complete the photovoltaic device.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: October 22, 2019
    Assignee: International Business Machines Corporation
    Inventors: Jeehwan Kim, Yun Seog Lee, Talia S. Gershon
  • Light emitting diode with ZnO emitter
    Patent number: 10439106
    Abstract: A light emitting diode (LED) includes a p-type ohmic contact and a p-type substrate in contact with the p-type ohmic contact. A p-type confinement layer is provided on the p-type substrate. An emission layer is provided on the p-type confinement layer. An n-type confinement layer is provided on the emission layer. A transparent II-VI n-type contact layer is formed on the n-type confinement layer as a replacement for a current spreading layer, a III-V contact layer and an n-type ohmic contact.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: October 8, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Keith E. Fogel, Jeehwan Kim, Ning Li, Devendra K. Sadana
  • Nanocavity monolayer laser monolithically integrated with LED pump
    Patent number: 10431956
    Abstract: A laser structure includes a substrate, a buffer layer formed on the substrate and a light emitting diode (LED) formed on the buffer layer. A photonic crystal layer is formed on the LED. A monolayer semiconductor nanocavity laser is formed on the photonic crystal layer for receiving light through the photonic crystal layer from the LED, wherein the LED and the laser are formed monolithically and the LED acts as an optical pump for the laser.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: October 1, 2019
    Assignee: International Business Machines Corporation
    Inventors: Jeehwan Kim, Ning Li, Devendra K. Sadana, Brent A. Wacaser
  • SOLAR CELL WITH BORDERLESS INTERDIGITATED CONTACTS AND METHOD OF MAKING
    Publication number: 20190288146
    Abstract: A solar cell having n-type and p-type interdigitated back contacts (IBCs), which cover the entire back surface of the absorber layer. The spatial separation of the IBCs is in a direction perpendicular to the back surface, thus providing borderless contacts having a zero-footprint separation. As the contacts are on the back, photons incident on the cell's front surface can be absorbed without any shadowing.
    Type: Application
    Filed: June 3, 2019
    Publication date: September 19, 2019
    Applicant: International Business Machines Corporation
    Inventors: Joel P. De Souza, Harold John Hovel, Daniel Inns, Jeehwan Kim, Christian Lavoie, Devendra K. Sadana, Katherine L. Saenger, Davood Shahrjerdi, Zhen Zhang
  • SYSTEMS AND METHODS OF FACIAL TREATMENT AND STRAIN SENSING
    Publication number: 20190275320
    Abstract: A method of facial treatment of a user while wearing a treatment system is disclosed. The treatment system includes a flexible film and circuitry disposed on or within the flexible film. The method includes conformally disposing the flexible film over a face of the user and applying a radio frequency (RF) wave, generated by the circuitry, on skin of the face. The method eliminates the need for a user (or a third-party operator) to hold the device by hand. In addition, the thin film can be configured as a face mask allowing treatment over a large area of skin at any given time.
    Type: Application
    Filed: November 8, 2017
    Publication date: September 12, 2019
    Applicant: Massachusetts Institute of Technology
    Inventors: Jeehwan Kim, Kyusang Lee, Yunjo Kim, Kwangyong Jung