Abstract: A method for forming a semiconductor apparatus includes forming a plurality of repetitive initial structures over a substrate of the semiconductor apparatus. An initial structure in the plurality of repetitive initial structures is formed by forming a first stack of transistors along a Z direction substantially perpendicular to a substrate plane, and forming local interconnect structures. Each of the transistors in the first stack of transistors is sandwiched between two of the local interconnect structures. Vertical conductive structures are formed substantially parallel to the Z direction, a height of one of the vertical conductive structures along the Z direction being at least a height of the initial structure. The initial structure is functionalized into a final structure by forming one or more connections each electrically coupling one of the local interconnect structures to one of the vertical conductive structures.

Abstract: A method for providing a persistent feature in an electronic game includes: (A) simulates spinning of a plurality of reels; (B) generating a first spin result; (C) triggering a value feature based on the occurrence of at least one feature symbol appearing on the first reel and at least one feature symbol appearing on the second reel in first spin result, causing the electronic game to award value feature symbols that appear on the other reels; (D) during a second spin, displaying an animation of moving the first and second feature symbols one or more positions of the reel upon; (E) overlaying the moved feature symbols during the second spin of the plurality of reels; and (F) triggering the value feature for the second spin when at least one feature symbol appears on both the first reel and on the second reel.

Abstract: Aspects of the present disclosure provide a method of manufacturing a three-dimensional (3D) semiconductor device. For example, the method can include forming a target structure, the target structure including a lower gate region, an upper gate region, and a separation layer disposed between and separating the lower gate region and the upper gate region. The method can also include forming a sacrificial contact structure extending vertically from the bottom gate region through the separation layer and the upper gate region to a position above the upper gate region, removing at least a portion of the sacrificial contact structure resulting in a lower gate contact opening extending from the position above the upper gate region to the bottom gate region, insulating a side wall surface of the lower gate contact opening, and filling the lower gate contact opening with a conductor to form a lower gate contact.

Abstract: Methods for detecting one or more analytes in a sample utilizing Electrochemical Impedance Spectroscopy (EIS) measurement. In one method, analyte detection includes comparing an imaginary impedance measurement to a calibration curve of concentrations for each target analyte. The calibration curve of concentrations for each target analyte is established at an optimal frequency. In another method, a signal decoupling algorithm is utilized for detection of more than one analyte on an electrode.

Abstract: The present disclosure provides engineered proline hydroxylase polypeptides for the production of hydroxylated compounds, polynucleotides encoding the engineered proline hydroxylases, host cells capable of expressing the engineered proline hydroxylases, and methods of using the engineered proline hydroxylases to prepare compounds useful in the production of active pharmaceutical agents.

Abstract: A static random access memory (SRAM) structure is provided. The structure includes a plurality of SRAM bit cells on a substrate. Each SRAM bit cell includes at least six transistors including at least two NMOS transistors and at least two PMOS transistors. Each of the six transistors is being lateral gate-all-around transistors in that gates wraps all around a cross section of channels of the at least six transistors. The at least six transistors positioned in three decks in which a third deck is positioned vertically above a second deck, and the second deck is positioned vertically above a first deck relative to a working surface of the substrate. A first inverter is formed using a first transistor positioned in the first deck and a second transistor positioned in the second deck. A second inverter is formed using a third transistor positioned in the first deck and a fourth transistor positioned in the second deck. A pass gate is located in the third deck.

Abstract: Aspects of the present disclosure provide a method, which includes providing a semiconductor structure including a first lower semiconductor device and a first upper semiconductor device stacked vertically over the first lower semiconductor device. The first lower semiconductor device has one or more first lower channels. The first upper semiconductor device has one or more first upper channels. First work function metal (WFM) can cover the first lower channels and the first upper channels. The method can also include recessing the first WFM to uncover the first upper channels of the first upper semiconductor device, depositing a monolayer on uncovered dielectric surfaces of the semiconductor structure, depositing isolation dielectric on the first WFM of the first lower semiconductor device, and depositing second WFM to cover the first upper channels of the first upper semiconductor device. The isolation dielectric isolates the first lower semiconductor device from the first upper semiconductor device.

Abstract: A semiconductor device includes a first field-effect transistor positioned over a substrate, a second field-effect transistor stacked over the first field-effect transistor, a third field-effect transistor stacked over the second field-effect transistor, and a fourth field-effect transistor stacked over the third field-effect transistor. A bottom gate structure is disposed around a first channel structure of the first field-effect transistor and positioned over the substrate. An intermediate gate structure is disposed over the bottom gate structure and around a second channel structure of the second field-effect transistor and a third channel structure of the third field-effect transistor. A top gate structure is disposed over the intermediate gate structure and around a fourth channel structure of the fourth field-effect transistor.

Abstract: A series of natural soaps, both liquid and solid, and methods of making thereof, which have a synergistic effect when formulated with anti-redeposition ingredients in laundry applications both in synthetic and natural textiles and fabrics. The fatty acids and/or natural oils based series of natural soaps include both sodium and potassium soap products that interact synergistically with, preferably, known, natural anti-redeposition agents and alkaline builders creating highly effective, natural solid (bar or powdered) and liquid laundry cleaning products. Solid forms soaps are dried to an acceptable amount of moisture content for milling. Further blending is then performed with various natural anti-redeposition agents or natural products which exhibit said characteristics and/or alkaline builders. The solid forms may be formed into single dose tablets. Effervescent additives may further be included.

Abstract: Some embodiments provide systems and methods to monitor network communications, comprising: a computing device comprising a control circuit and memory with instructions executed by the control circuit to implement: a tunneled monitoring service (TMS) operated local on the mobile computing device; and a tunnel protocol within the mobile computing device that is configured to establish a tunnel interface between software applications and the TMS, wherein the tunnel interface is configured to collect output data transactions, communicated by the software applications, and direct the output data transactions to the TMS; wherein the TMS is configured to initiate a monitoring of each output data transaction relative to predefined criteria to identify relevant parameter information, obtained from one or more of the output data transactions, that have a predefined relationship with one or more of the criteria, and cause results of the monitoring relative to the criteria to be recorded.

Abstract: A window regulator including a panel and a guide rail. The panel may define a speaker aperture that may be configured to receive at least a portion of the speaker. The guide rail may be integrally formed to the panel and configured to carry a slider. The slider may be configured to move along the guide rail to move the window between a first position and a second position. The guide rail may include an aperture-region portion that may extend across the speaker aperture in a first direction. The aperture-region portion may include a first sidewall and a second sidewall that may each extend in a second direction that may be substantially orthogonal to the first direction.

Abstract: In one embodiment, a method includes using one or more cameras of a mobile computing device to capture one or more images of a first user wearing a VR display device in a real-world environment. The mobile computing device transmits a pose of the mobile computing device with respect to the VR display device to a VR system. The mobile computing device receives from the VR system a VR rendering of a VR environment. The VR rendering is from the perspective of the mobile computing device with respect to the VR display device. The method includes segmenting the first user from the one or more images and generating, in real-time responsive to capturing the one or more images, a MR rendering of the first user in the VR environment. The MR rendering of the first user is based on a compositing of the segmented one or more images of the first user and the VR rendering.

Abstract: System for mechanically assisting rehabilitation of a patient. The system includes: a manipulator having at least five degrees of freedom and defining a free end; a limb support for supporting a limb of the patient, and secured relative to the free end of the manipulator; a force sensor operatively connected to the limb support to allow measuring input forces applied by the patient; and a processor communicatively connected to the force sensor, the manipulator, and a memory store which defines a scale factor. The processor is configured to control operation of the manipulator to move the limb support, and further configured so that responsive to receiving an input force measurement from the force sensor, the processor determines an applied force as a function of the input force and the scale factor.

Abstract: An arrow golf system has a bow having a bowstring, an arrow having a shaft with a ball on one end with a fletching and a string nock on an opposite end, a starting location, a finishing location, and a capturing apparatus at the finishing location. A player shoots the arrow from the starting location with the bow, to a second location closer to the finishing location, retrieves the arrow at the second location, and shoots the arrow toward the capturing apparatus from the second location.

Abstract: Implementations of a delivery device and method are disclosed. One implementation is a delivery device comprising a flow chamber with an inlet port for receiving a fluid flow in the flow chamber, and an outlet port for exiting a material from the flow chamber. The flow chamber may include a formation portion in which a suspension of the material is formed, and a collection portion that directs the suspension toward and/or into the outlet port. An amount of the material may collect in the collection portion adjacent the outlet port. The device may further comprise an insertion port for permitting insertion of the material in the flow chamber, and/or a pusher operable to move the amount of material through the outlet port. Related devices and methods also are disclosed.

Abstract: Reversibly attachable pressure-resistant cap for an endoscope sleeve, configured to seal a distal tip of the endoscope sleeve during pressurized inflation of the sleeve to assist insertion of the endoscope into the sleeve. The cap is operable to latch onto the distal tip. The cap is also configured to be easily removed from the distal tip after inflation is no longer needed.

Abstract: An integrated circuit includes an array of unit cells, each unit cell of which including field effect transistors arranged in a stack. Local interconnect structures form select conductive paths between select terminals of the field effect transistors to define cell circuitry that is confined within each unit cell. An array of contacts is disposed on an accessible surface of the unit cell, where each contact is electrically coupled to a corresponding electrical node of the cell circuitry.

Abstract: A vegetable oil-based alkoxylate composition comprising a mixture of mono-, di-, and/or triacyl alkoxylated glycerides and alkoxylated glycerin. A method of reacting a vegetable oil and an alkoxylated glycerin via a transesterification reaction to produce a vegetable oil-based alkoxylate composition.

Abstract: The present invention relates to methods, devices and systems for associating consumable data with an assay consumable used in a biological assay. Provided are assay systems and associated consumables, wherein the assay system adjusts one or more steps of an assay protocol based on consumable data specific for that consumable. Various types of consumable data are described, as well as methods of using such data in the conduct of an assay by an assay system. The present invention also relates to consumables (e.g., kits and reagent containers), software, data deployable bundles, computer-readable media, loading carts, instruments, systems, and methods, for performing automated biological assays.

Abstract: Aspects of the present disclosure provide a multi-tier semiconductor structure. For example, the semiconductor structure can include a lower semiconductor device tier including lower semiconductor devices, an upper semiconductor device tier disposed over the lower semiconductor device tier and including upper semiconductor devices, a separation layer disposed between and separating the lower and upper semiconductor device tiers, a wiring tier disposed below the lower semiconductor device tier, a lower gate contact extending from a lower gate region of the lower semiconductor device tier downward to the wiring tier, an upper gate contact extending from an upper gate region of the upper semiconductor device tier downward through the separation layer to the wiring tier, and an isolator covering a lateral surface of the upper gate contact and electrically isolating the upper and lower gate contacts. The lower gate contact and the upper gate contact can be independent from each other.