Abstract: A display substrate includes thin film transistors, first common voltage lines, and second common voltage lines. Each thin film transistor includes a gate electrode, a source electrode, and an annulus-shaped drain electrode. The first common voltage lines are disposed adjacent to first sides of the gate electrodes. The second common voltage lines are disposed adjacent to second sides of the gate electrodes.

Abstract: A gate driver, including multiple stages of gate driving circuits, wherein each stage of the gate driving circuits includes an input part configured to generate a Q node signal in response to a carry signal of one of previous stages and a clock signal, the Q node signal being applied to Q node, an output part configured to output a gate output signal to a gate output terminal in response to the Q node signal, and a charge sharing part connected to the gate output terminal of a present stage and a gate output terminal of one of next stages, the charge sharing part configured to operate charge-sharing between the gate output signal of the present stage and a gate output signal of one of the next stages in response to a select signal.

Abstract: A gate driving circuit and a display apparatus having the gate driving circuit, in which the gate driving circuit includes a voltage adjusting part using a low clock signal to increase the reliability of the gate driving circuit, thereby extending the lifetime of the gate driving circuit.

Abstract: A stage circuit includes a first driver, a second driver, a first output unit and a second output unit. The first driver controls voltages of first and second nodes, according to a first power source, a start signal or a carry signal of a previous stage supplied to a first input terminal, a first clock signal supplied to a second input terminal, and a second clock signal supplied to a third input terminal. The second driver controls a voltage of a third node, according to the first power source, a start signal or a carry signal of a previous stage supplied to a first input terminal, a carry signal of a next stage supplied to a fourth input terminal, and the voltage of the second node.

Abstract: A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part.

Abstract: A stage circuit includes a first driver, a second driver, a first output unit, a second output unit and a controller. The first driver controls voltages of first and second nodes, according to a first power source, a third power source, a start signal or a carry signal of a previous stage input to a first input terminal, and a clock signal supplied to a second input terminal. The second driver controls voltages of third and fourth nodes, according to voltages of the first power source, the third power source, the first input terminal and the first and second nodes. The first output unit outputs a carry signal to a first output terminal, according to voltages of the first power source, the second input terminal and the third and fourth nodes. The second output unit outputs a scan signal to a second output terminal, according to voltages of the second power source, the second input terminal and the third and fourth nodes. The controller is electrically coupled to the first output terminal and the second driver.

Abstract: A novel alpha-1 antitrypsin variant, a method of preparing the same, and use thereof are provided. The alpha-1 antitrypsin variant has excellent stability in the body and maintains an inhibitory effect on elastase activities because the blood half-life (t1/2) and the area under blood drug concentration vs. time curve (AUC) are remarkably increased by adding an N-glycosylation site in animal cells through amino acid mutation between 1st and 25th positions of the N-terminus of alpha-1 antitrypsin. Therefore, the alpha-1 antitrypsin variant can be useful in preventing or treating alpha-1 antitrypsin deficiency.

Abstract: A lithium secondary battery of the present invention may simultaneously improve high output and high capacity characteristics by including a first active material layer having high output characteristics and a second active material layer having high capacity characteristics respectively on a cathode collector and an anode collector.

Abstract: Disclosed is a pouch-type secondary battery having a sealing margin for improved durability, including a sealing area formed by melting sealing layers of an upper pouch film and a lower pouch film along edges of a pouch casing, characterized in that a sealing margin is greater than a movement distance of a sealing residue flowing out of the sealing area, the sealing margin being a distance measured from an intersection point of a first straight line and a second straight line to a boundary line of the sealing area, the first straight line extending horizontally from a surface of the sealing area, when viewed in cross section of the secondary battery, and the second straight line corresponding to a tangent line having an average gradient among possible tangent lines at each point on a cross-sectional slope line of the pouch casing adjacent to the sealing area.

Abstract: Disclosed is the synthesis of [18F]flumazenil that is useful in imaging epileptic lesions by PET (positron emission tomography). A method for preparing [18F]flumazenil by reacting a diaryliodonium salt precursor with the positron-emitting radionuclide fluorine-18. [18F]flumazenil can be prepared from the diaryliodonium salt precursor in the presence of kryptofix2.2.2./potassium carbonate(K2.2.2./K2CO3) and TEMPO in dimethylformamide (DMF) at a high yield.

Abstract: A display panel includes a first substrate, a second substrate, an electrophoretic layer, and a shielding electrode. The first substrate includes a first base substrate and pixel electrodes disposed on the first base substrate. The second substrate includes a second base substrate and a common electrode disposed on the second base substrate to face the pixel electrodes. The electrophoretic layer is disposed between the first substrate and the second substrate to display a gray-scale image. The shielding electrode is disposed between the pixel electrodes and faces the common electrode with the electrophoretic layer interposed between the shielding electrode and the common electrode to receive a voltage corresponding to a black gray-scale.

Abstract: A display device includes a pixel group having first to fourth pixels in a 2×2 matrix, wherein the areas of the first and second pixels is greater than the areas of the third and fourth pixels, so that, when a storage bridge which connects storage electrodes is formed between the first and second pixels, an opening area through which light is transmitted in each of the first and second pixels has the same area as the opening areas in each of the third and fourth pixels.

Abstract: A gate driving circuit includes a pull-up control part, a pull-up part, a carry part, a first pull-down part and a second pull-down part. The pull-up control part applies a carry signal from a previous stage to a first node. The pull-up part outputs an N-th gate output signal based on a clock signal. The carry part outputs an N-th carry signal based on the clock signal in response to the signal applied to the first node. The first pull-down part includes a plurality of transistors connected to each other in series. The first pull-down part pulls down a signal at the first node to a second off voltage in response to a carry signal of a next stage. The second pull-down part pulls down the N-th gate output signal to a first off voltage in response to the carry signal of the next stage.

Abstract: In a display apparatus, a plurality of pixels are arranged in first and second directions, and each pixel includes at least one dot. A plurality of data lines are provided between two adjacent dots while extending in the first direction. A plurality of gate lines are provided between two adjacent dots while extending in the second direction. Among dots arranged in the first direction between an mth data line and an (m+1)th data line, at least one first dot is connected to one of the mth data line and the (m+1)th data line, and at least one second dot is connected to one of an (m?1)th data line and an (m+2)th data line. Accordingly, the display quality of the display apparatus including four dots or an even number of dots is improved.

Abstract: A solar cell and a method of manufacturing the same are disclosed. The solar cell includes a semiconductor substrate doped with a first conductive type impurity through which a via hole passing from a first surface of the semiconductor substrate to a second surface thereof facing the first surface is formed, wherein the first surface is a light receiving surface, upper and lower emitter layers respectively formed on upper and lower surfaces of the semiconductor substrate and doped with a second conductive type impurity that is different from the first conductive type impurity, current collecting layers formed on sidewalls of the via hole and doped with a higher concentration of the first conductive type impurity than that of the semiconductor substrate, a contact electrode extending from the first surface of the semiconductor substrate to the second surface thereof so as to fill the via hole, and upper and lower electrodes respectively contacting the upper and lower emitter layers.

Abstract: A method of manufacturing a solar cell is disclosed. The method includes forming a dielectric film on a semiconductor substrate doped with a first conductive type impurity, exposing a high concentration doping region of a predetermined selective emitter by partially removing the dielectric film, and ion-implanting a second conductive type impurity into a front surface of the semiconductor substrate with the dielectric film formed thereon to form a high concentration doping layer in the semiconductor substrate to correspond to the high concentration doping region and to form a low concentration doping layer in the semiconductor substrate to correspond to a region in which the dielectric film is formed.

Abstract: Disclosed is a DC voltage conversion circuit of a liquid crystal display apparatus, including: a main pumping circuit including a plurality of thin film transistors and configured to output voltage for driving a liquid crystal display apparatus when the plurality of thin film transistors are alternately turned on or off; and a switch control signal generator configured to control voltages applied to gates of the plurality of thin film transistors by inversion of a clock signal, in which each thin film transistor is turned on when positive gate-source voltage is applied thereto, and turned off when negative gate-source voltage is applied thereto.

Abstract: A gate driving circuit includes a plurality of stages outputting gate signals to a plurality of gate lines. Each of the stages includes a circuit transistor, a capacitor part, a first connecting electrode and a second connecting electrode. The circuit transistor outputs the gate signal to an output electrode in response to a control signal inputted to a control electrode. The capacitor part is disposed adjacent to the circuit transistor, and includes a first electrode, a second electrode disposed over the first electrode, a third electrode disposed over the second electrode and a fourth electrode disposed over the third electrode. The first connecting electrode electrically connects the control electrode to the first and third electrodes. The second connecting electrode electrically connects the output electrode to the second and fourth electrodes.

Abstract: A liquid crystal display includes: a first substrate having pixels, each pixel including a display area and a non-display area; a second substrate facing the first substrate and including a common electrode; and a liquid crystal layer disposed between the first substrate and the second substrate. Each pixel includes a first transistor, a second transistor, a main pixel electrode having a first connection part electrically connected to the first transistor, and a sub-pixel electrode having a second connection part electrically connected to the second transistor. The first and second connection parts are disposed in the non-display area. A protective layer is disposed between the first connection parts the first transistors and between second connection parts and the second transistors.

Abstract: Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.