Patents by Inventor Jianhua Yang

Jianhua Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8890106
    Abstract: A hybrid circuit comprises a nitride-based transistor portion and a memristor portion. The transistor includes a source and a drain and a gate for controlling conductance of a channel region between the source and the drain. The memristor includes a first electrode and a second electrode separated by an active switching region. The source or drain of the transistor forms one of the electrodes of the memristor.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: November 18, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Gilberto Medeiros Ribeiro, Byung-Joon Choi, Stanley Williams
  • Patent number: 8882217
    Abstract: A printhead assembly for a printing device is provided that includes a printhead comprising non-volatile memory elements. The memory elements include memristive elements. Each memristive element includes an active region disposed between two electrodes. The active region includes a switching layer formed of a switching material capable of carrying a species of dopants and a conductive layer in electrical contact with the switching layer, the conductive layer being formed of a dopant source material that includes the species of dopants that are capable of drifting into the switching layer under an applied potential.
    Type: Grant
    Filed: October 27, 2011
    Date of Patent: November 11, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Perry V. Lea, Gilberto M. Ribeiro, Matthew D. Pickett, Jianhua Yang
  • Patent number: 8878342
    Abstract: Various embodiments of the present invention are direct to nanoscale, reconfigurable, memristor devices. In one aspect, a memristor device comprises an electrode (301,303) and an alloy electrode (502,602). The device also includes an active region (510,610) sandwiched between the electrode and the alloy electrode. The alloy electrode forms dopants in a sub-region of the active region adjacent to the alloy electrode. The active region can be operated by selectively positioning the dopants within the active region to control the flow of charge carriers between the electrode and the alloy electrode.
    Type: Grant
    Filed: January 26, 2009
    Date of Patent: November 4, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Nathaniel J. Quitoriano, Douglas Ohlberg, Philip J. Kuekes, Jianhua Yang
  • Patent number: 8879300
    Abstract: Various embodiments of the present invention are directed to nanoscale electronic devices that provide nonvolatile memristive switching. In one aspect, a two-terminal device (600) comprises a first electrode (602), a second electrode (604), and an active region (606) disposed between the first electrode and the second electrode. The active region includes a mobile dopant (608), and a fast drift ionic species (610). The fast drift ionic species drifts into a diode-like electrode/active region interface temporarily increasing conductance across the interface when a write voltage is applied to the two-terminal device to switch the device conductance.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: November 4, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Wei Wu, Qiangfei Xia
  • Patent number: 8872153
    Abstract: A memristor includes a first electrode formed of a first metal, a second electrode formed of a second material, wherein the second material comprises a different material from the first metal, and a switching layer positioned between the first electrode and the second electrode. The switching layer is formed of a composition of a first material comprising the first metal and a second nonmetal material, in which the switching layer is in direct contact with the first electrode and in which at least one conduction channel is configured to be formed in the switching layer from an interaction between the first metal and the second nonmetal material.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: October 28, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Minxian Max Zhang, R. Stanley Williams
  • Publication number: 20140311790
    Abstract: Memristive elements are provided that include an active region disposed between a first electrode and a second electrode. The active region includes an switching layer of a first metal oxide and a conductive layer of a second metal oxide, where a metal on of the first metal oxide differs from a metal ion of the second metal oxide. The memristive element exhibits a nonlinear current-voltage characteristic in the low resistance state based on the oxide hetero-junction between the first metal oxide and the second metal oxide. Multilayer structures that include the memristive elements also are provided.
    Type: Application
    Filed: October 21, 2011
    Publication date: October 23, 2014
    Inventor: Jianhua Yang
  • Publication number: 20140256123
    Abstract: In an example of a method for controlling the formation of dopants in an electrically actuated device, a predetermined concentration of a dopant initiator is selected. The predetermined amount of the dopant is localized, via diffusion, at an interface between an electrode and an active region adjacent to the electrode. The dopant initiator reacts with a portion of the active region to form the dopants.
    Type: Application
    Filed: May 23, 2014
    Publication date: September 11, 2014
    Applicant: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Duncan Stewart, Philip J. Kuekes, William Tong
  • Patent number: 8830727
    Abstract: The present disclosure provides a data storage device that includes multi-level memory cells. The data storage device may include circuitry configured to write data to the multi-level memory cell. The write circuitry may include compliance circuitry configured to implement continuously tunable switching. The write circuitry may be configured to select a compliance mode for the switching, the compliance mode being selected from the group comprising current compliance and voltage compliance.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: September 9, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Yi, Feng Miao, Jianhua Yang
  • Patent number: 8829581
    Abstract: A resistive memory device includes a stack comprising conductor layers and insulator layers, with the edges of the conductor layers and insulating layers exposed on the sides of the stack. An insulator is disposed on a first side of the stack to cover exposed edges of the conductor layers on the first side of the stack. A memory layer disposed over the stack and insulator, such that the memory layer is in electrical contact with edges of the conductor layers on a second side of the stack but is insulated from edges on the first side of the stack by the insulator. A conductive ribbon is disposed over the memory layer to form programmable memory elements where the conductive ribbon crosses edges of the conductor layers on the second side of the stack.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: September 9, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shih-Yuan Wang, Jianhua Yang, Alexandre M. Bratkovski, R. Stanley Williams
  • Patent number: 8809158
    Abstract: A device (10) may include a semiconductor layer section (25) and a memory layer section (45) disposed above the semiconductor layer section (25). The semiconductor layer section (25) may include a processor (12; 412) and input/output block (16; 416), and the memory layer section (45) may include memristive memory (14; 300). A method of forming such device (10), and an apparatus (600) including such device (10) are also disclosed. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: August 19, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Matthew D. Pickett, Jianhua Yang, Gilberto Medeiros Ribeiro
  • Patent number: 8779409
    Abstract: Low energy memristors with engineered switching channel materials include: a first electrode; a second electrode; and a switching layer positioned between the first electrode and the second electrode, wherein the switching layer includes a first phase comprising an insulating matrix in which is dispersed a second phase comprising an electrically conducting compound material for forming a switching channel.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: July 15, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Minxian Max Zhang, Gilberto Medeiros Riberio, R. Stanley Williams
  • Patent number: 8779848
    Abstract: A memcapacitor device includes a memcapacitive matrix interposed between a first electrode and a second electrode. The memcapacitive matrix includes deep level dopants having a first decay time constant and shallow level dopants having a second decay time constant. The second decay time constant is substantially shorter than the first decay time constant. The capacitance of the memcapacitor device depends upon an initial voltage applied across the memcapacitive matrix and a time dependent change in capacitance of the memcapacitor device depends upon the first decay time constant. A method for forming a memcapacitive device is also provided.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: July 15, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Matthew D. Pickett, Julien Borghetti, Jianhua Yang
  • Patent number: 8766231
    Abstract: On example of the present invention is a nanoscale electronic device comprising a first conductive electrode, a second conductive electrode, and a device layer. The device layer comprises a first dielectric material, between the first and second conductive electrodes, that includes an effective device layer, a first barrier layer near a first interface between the first conductive electrode and the device layer, and a second barrier layer near a second interface between the second conductive electrode and the device layer. A second example of the present invention is an integrated circuit that incorporates nanoscale electronic devices of the first example.
    Type: Grant
    Filed: March 7, 2011
    Date of Patent: July 1, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Wei Yi, Jianhua Yang, Gilberto Medeiros Ribeiro
  • Patent number: 8767438
    Abstract: A memelectronic device may have a first and a second electrode spaced apart by a plurality of materials. A first material may have a memory characteristic exhibited by the first material maintaining a magnitude of an electrically controlled physical property after discontinuing an electrical stimulus on the first material. A second material may have an auxiliary characteristic.
    Type: Grant
    Filed: March 19, 2012
    Date of Patent: July 1, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Byungjoon Choi, Minxian Max Zhang, Gilberto Medeiros Ribeiro, R. Stanley Williams
  • Patent number: 8766228
    Abstract: An electrically actuated device includes a first electrode, a second electrode, and an active region disposed between the first and second electrodes. The device further includes at least one of dopant initiators or dopants localized at an interface between i) the first electrode and the active region, or ii) the second electrode and the active region, or iii) the active region and each of the first and second electrodes.
    Type: Grant
    Filed: October 29, 2008
    Date of Patent: July 1, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Duncan Stewart, Philip J. Kuekes, William M. Tong
  • Publication number: 20140167042
    Abstract: A memristor includes a first electrode; a second electrode; and a switching layer interposed between the first electrode and the second electrode, wherein the switching layer includes an electrically semiconducting or nominally insulating and weak ionic switching mixed metal oxide phase for forming at least one switching channel in the switching layer. A method of forming the memristor is also provided.
    Type: Application
    Filed: July 14, 2011
    Publication date: June 19, 2014
    Inventors: Jianhua Yang, Minxian Max Zhang, Feng Miao
  • Publication number: 20140166957
    Abstract: A hybrid circuit comprises a nitride-based transistor portion and a memristor portion. The transistor includes a source and a drain and a gate for controlling conductance of a channel region between the source and the drain. The memristor includes a first electrode and a second electrode separated by an active switching region. The source or drain of the transistor forms one of the electrodes of the memristor.
    Type: Application
    Filed: December 18, 2012
    Publication date: June 19, 2014
    Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
    Inventors: Jianhua Yang, Gilberto Medeiros Ribeiro, Byung-Joon Choi, Stanley Williams
  • Publication number: 20140158973
    Abstract: A nitride-based memristor memristor includes: a first electrode comprising a first nitride material; a second electrode comprising a second nitride material; and active region positioned between the first electrode and the second electrode. The active region includes an electrically semiconducting or nominally insulating and weak ionic switching nitride phase. A method for fabricating the nitride-based memristor is also provided.
    Type: Application
    Filed: August 3, 2011
    Publication date: June 12, 2014
    Inventors: Jianhua Yang, Gilberto Medeiros Ribeiro, R. Stanley Williams
  • Publication number: 20140145142
    Abstract: A memristor including a dopant source is disclosed. The structure includes an electrode, a conductive alloy including a conducting material, a dopant source material, and a dopant, and a switching layer positioned between the electrode and the conductive alloy, wherein the switching layer includes an electronically semiconducting or nominally insulating and weak ionic switching material. A method for fabricating the memristor including a dopant source is also disclosed.
    Type: Application
    Filed: July 20, 2011
    Publication date: May 29, 2014
    Inventors: Minxian Max Zhang, Jianhua Yang, R. Stanley Williams
  • Patent number: 8737113
    Abstract: Methods and means related to memory resistors are provided. A memristor includes two multi-layer electrodes and an active material layer. One multi-layer electrode forms an Ohmic contact region with the active material layer. The other multi-layer electrode forms a Schottky barrier layer with the active material layer. The active material layer is subject to oxygen vacancy profile reconfiguration under the influence of an applied electric field. An electrical resistance of the memristor is thus adjustable by way of applied programming voltages and is non-volatile between programming events.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: May 27, 2014
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jianhua Yang, Wei Wu, Gilberto Ribeiro