Abstract: The disclosure relates to a display device including: an organic light-emitting diode display panel, a fingerprint recognition layer located below the organic light-emitting diode display panel, and a light filtering layer located between the organic light-emitting diode display panel and the fingerprint recognition layer, where the light filtering layer is configured to filter out light rays with an incidence angle greater than a filter angle among light rays carrying fingerprint line information, and to transmit light rays with an incidence angle smaller than or equal to the filter angle, where the incidence angle is the angle between the light rays carrying fingerprint line information, and the direction perpendicular to the fingerprint recognition layer.

Abstract: Embodiments of this application disclose provides a low density parity check (LDPC) channel encoding method for use in a wireless communications system. A communication device encodes an input bit sequence by using a LDPC matrix, to obtain an encoded bit sequence for transmission. The LDPC matrix is obtained based on a lifting factor Z and a base matrix. Embodiments of the application provide eight particular designs of the base matrix. The encoding method provided in the embodiments of the application can be used in various communications systems including the fifth generation (5G) telecommunication systems, and can support various encoding requirements for information bit sequences with different code lengths.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for delivering event content. One of the methods includes initiating, for one or more client devices, a subscription to a topic; receiving an event relevant to a topic; determining a number of channel servers that correspond to the topic, wherein each channel server is associated with one or more client devices; determining that the number of channel servers that correspond to the topic is greater than a threshold number of channel servers; writing the received event from the event processor to an event fan-out queue, in response to the determination that the number of channel servers that correspond to the topic is greater than the threshold number of channel servers; reading the received event from the event fan-out queue; and sending the received event to the one or more client devices associated with each respective channel server.

Abstract: Methods and apparatuses for additive manufacturing using stereolithography (“SLA”) materials. The apparatus includes a platform for holding an assembly of SLA resin layers. The apparatus also includes a platform for holding an assembly of SLA resin layers. The apparatus also includes a first movable stage for depositing and curing a portion of the liquid SLA resin on the platform, forming a pattern of cured SLA resin. The apparatus also includes a second movable stage for depositing a low-viscosity non-SLA material in voids in the pattern of cured SLA resin. The apparatus also includes a cooler for cooling the low-viscosity non-SLA material below its freezing point until solidified.

Abstract: A decoding method, an encoding method, a decoder and an encoder are disclosed. In an embodiment the decoding method includes receiving, at a receiver of a receiving side, signals from a transmitting side, the signals including a code word and decoding, at a decoder of the receiving side, the code word using a low density parity check (LDPC) code in which each n adjacent rows, n>1, in an extension part of a base parity check matrix (PCM) are orthogonal except for punctured information columns.

Abstract: A ring bus and a credit allocation method are provided. The ring bus includes a slave module and multiple master modules. The slave module includes an injection table and a state table, and is configured to generate a credit signal including a node identity and an active code. The master modules are coupled to the slave module to form a ring path. The slave module determines whether the credit signal is a newly injected credit signal, and determines the node identity of the credit signal according to the injection table or the state table. The slave module transmits the credit signal to the master module corresponding to the node identity through the ring path according to the node identity. The slave module uses a corresponding idle entry to receive a credit request signal provided by the master device consuming a credit of the credit signal.

Abstract: The device and method disclosed herein are configured for generating a polar code of length N and dimension K on the basis of an original polar code being defined by a code sequence S having Nmax bit indices sorted from least reliable to most reliable sub-channels. The device comprises a processing unit configured to: (a) generate an auxiliary code sequence having Nmax/2 bit indices by removing bit indices greater than or equal to Nmax/2 from the code sequence S; (b) remove from the auxiliary code sequence the last NR bit indices to generate a modified auxiliary code sequence; and (c) generate the polar code of length N and dimension K by puncturing the original polar code on the basis of a puncturing set defined by the last p=Nmax?N bit indices of the modified auxiliary code sequence.

Abstract: A low density parity check (LDPC) channel encoding method is used in a wireless communications system. A communication device encodes an input bit sequence by using an LDPC matrix, to obtain an encoded bit sequence for transmission. The LDPC matrix is obtained based on a lifting factor Z and a base matrix. The base matrix may be one of eight exemplary designs. The encoding method can be used in various communications systems including fifth generation (5G) telecommunication systems, and can support various encoding requirements for information bit sequences with different code lengths.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for delivering event content. One of the methods includes initiating, for one or more client devices, a subscription to a topic; receiving an event relevant to a topic; determining a number of channel servers that correspond to the topic, wherein each channel server is associated with one or more client devices; determining that the number of channel servers that correspond to the topic is greater than a threshold number of channel servers; writing the received event from the event processor to an event fan-out queue, in response to the determination that the number of channel servers that correspond to the topic is greater than the threshold number of channel servers; reading the received event from the event fan-out queue; and sending the received event to the one or more client devices associated with each respective channel server.

Abstract: Embodiments of this application disclose provides a low density parity check (LDPC) channel encoding method for use in a wireless communications system. A communication device encodes an input bit sequence by using a LDPC matrix, to obtain an encoded bit sequence for transmission. The LDPC matrix is obtained based on a lifting factor Z and a base matrix. Embodiments of the application provide eight particular designs of the base matrix. The encoding method provided in the embodiments of the application can be used in various communications systems including the fifth generation (5G) telecommunication systems, and can support various encoding requirements for information bit sequences with different code lengths.

Abstract: A performance evaluation apparatus and a performance evaluation method are provided. The performance evaluation method includes: detecting multiple access commands of a memory controller for page miss so as to identify at least one page-missed command from the access commands; calculating an interval between the at least one page-missed command and a last conflict command to serve as a conflict command interval, wherein the last conflict command conflicts with the at least one page-missed command; and evaluating performance of the memory controller according to the conflict command interval.

Abstract: A low density parity check (LDPC) channel encoding method is used in a wireless communications system. A communication device encodes an input bit sequence by using an LDPC matrix, to obtain an encoded bit sequence for transmission. The LDPC matrix is obtained based on a lifting factor Z and a base matrix. The base matrix may be one of eight exemplary designs. The encoding method can be used in various communications systems including fifth generation (5G) telecommunication systems, and can support various encoding requirements for information bit sequences with different code lengths.

Abstract: A ring bus and a credit allocation method are provided. The ring bus includes a slave module and multiple master modules. The slave module includes an injection table and a state table, and is configured to generate a credit signal including a node identity and an active code. The master modules are coupled to the slave module to form a ring path. The slave module determines whether the credit signal is a newly injected credit signal, and determines the node identity of the credit signal according to the injection table or the state table. The slave module transmits the credit signal to the master module corresponding to the node identity through the ring path according to the node identity. The slave module uses a corresponding idle entry to receive a credit request signal provided by the master device consuming a credit of the credit signal.

Abstract: A communication transmitter for transmitting a control message over a physical downlink control channel (PDCCH) towards a communication entity in a mobile communication network, wherein the communication transmitter comprises a processor configured to process a control block to obtain the control message, wherein the control block includes a first portion and a second portion, wherein the first portion includes downlink control information bits indicating information relating to data transmission over the mobile communication network, and insert prefix error detection code bits into the second portion of the control block to obtain the control message, and a communication interface configured to transmit the control message over the mobile communication network and a communication receiver for receiving the control message from the communication transmitter over the communication network.

Abstract: The disclosure relates to a display device including: an organic light-emitting diode display panel, a fingerprint recognition layer located below the organic light-emitting diode display panel, and a light filtering layer located between the organic light-emitting diode display panel and the fingerprint recognition layer, where the light filtering layer is configured to filter out light rays with an incidence angle greater than a filter angle among light rays carrying fingerprint line information, and to transmit light rays with an incidence angle smaller than or equal to the filter angle, where the incidence angle is the angle between the light rays carrying fingerprint line information, and the direction perpendicular to the fingerprint recognition layer.

Abstract: A start-up circuit for a ring current-controlled oscillator (CCO) includes a replica CCO current generator, a replica ring CCO, and a buffer. The ring CCO is connected to a CCO driver and the buffer. The CCO driver generates a CCO current based on a reference current. The ring CCO generates a CCO output voltage at a first oscillating frequency based on the CCO current. The replica CCO current generator generates a replica CCO current based on a reference voltage. The replica ring CCO generates a replica CCO output voltage at a second oscillating frequency based on the replica CCO current. The buffer provides a first current to the ring CCO when the first oscillating frequency is lower than a desired oscillating frequency, and drains a second current from the ring CCO when the first oscillating frequency is greater than the desired oscillating frequency.

Abstract: This application discloses an encoding method, an apparatus, a communications device, and a communications system. The method includes: encoding an input bit sequence by using a low density parity check LDPC matrix, where the LDPC matrix is obtained based on a lifting factor Z and a base matrix, and the base matrix includes a row 0 to a row 4 and a column 0 to a column 26 in one of matrices shown in FIG. 3b-1A to FIG. 3b-8B, or the base matrix includes a row 0 to a row 4 and some of a column 0 to a column 26 in one of matrices shown in FIG. 3b-1A to FIG. 3b-8B. According to the encoding method, the apparatus, the communications device, and the communications system, channel coding requirements can be met.

Abstract: A memory integrated circuit and a pre-fetch method thereof are provided. The memory integrated circuit includes an interface circuit, a memory, a memory controller, and a pre-fetch accelerator circuit. The interface circuit receives a normal read request from an external device. After the pre-fetch accelerator circuit sends a pre-fetch request to the memory controller, the pre-fetch accelerator circuit pre-fetches at least one pre-fetch data from the memory through the memory controller. When the pre-fetch data in the pre-fetch accelerator circuit has a target data of the normal read request, the pre-fetch accelerator circuit takes the target data from the pre-fetch data and returns the target data to the interface circuit. When the pre-fetch data in the pre-fetch accelerator circuit has no target data, the pre-fetch accelerator circuit sends the normal read request with higher priority than the pre-fetch request to the memory controller.

Abstract: A data processing method and a data processing apparatus are provided to reduce a bit error rate of a wireless communications system and improve transmission performance of the wireless communications system. The method includes: mapping L to-be-sent bits to L bit locations included in at least one modulation symbol, where the L to-be-sent bits include at least one bit field, a bit in a bit field having a high priority is preferentially mapped to a bit location that is of the at least one modulation symbol and that has a high reliability level, the at least one bit field is at least one of an information bit field, a first parity bit field, and a second parity bit field; and outputting the at least one modulation symbol.

Abstract: A memory integrated circuit and a pre-fetch address determining method thereof are provided. The memory integrated circuit includes an interface circuit, a memory, a memory controller, and a pre-fetch accelerator circuit. The interface circuit receives a normal read request from an external device. When the pre-fetch accelerator circuit receives the normal read request from the interface circuit, the pre-fetch accelerator circuit adds a current address of the normal read request to a training address group as a new training address. The pre-fetch accelerator circuit reorders a plurality of training addresses of the training address group. The pre-fetch accelerator circuit calculates a pre-fetch stride according to the reordered training addresses of the training address group. The pre-fetch accelerator circuit calculates a pre-fetch address of a pre-fetch request according to the pre-fetch stride and the current address.