Patents by Inventor Jing Yi
Jing Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20110090713Abstract: A flexible backlight module includes a light source module and a flexible light guide panel, wherein the flexible light guide panel has a light incident surface, a light reflecting surface, and a light outgoing surface. The light incident surface of the flexible light guide panel is directly connected and thereby optically coupled to the light source module so that the light emitted by the light source module can be completely coupled to the flexible light guide panel. Consequently, the loss of light is reduced while the luminous efficiency of light is increased. Light entering the flexible light guide panel is reflected by the light reflecting surface to the light outgoing surface and then projected outward. The flexible light guide panel can be curved as needed thanks to its flexibility and thus features a wide application range.Type: ApplicationFiled: July 8, 2008Publication date: April 21, 2011Applicant: Helio Optoelectronics CorporationInventors: Ming-Hung Chen, Jing-Yi Chen
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Patent number: 7919917Abstract: A top-emitting OLED display and fabrication method thereof are provided. The top-emitting OLED display includes providing a handling substrate. A composite layer is formed on the handling substrate. An organic light emitting unit is formed on the composite layer. A top electrode is formed on the organic light emitting unit. A reflective type display and fabrication method thereof are provided. The reflective type display includes providing a handling substrate. A composite layer is formed on the handling substrate, a thin film transistor array is formed on the composite layer.Type: GrantFiled: January 22, 2009Date of Patent: April 5, 2011Assignee: Industrial Technology Research InstituteInventors: Liang-Hsiang Chen, Jing-Yi Yan, Jia-Chong Ho
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Publication number: 20110044035Abstract: A parallel bridge circuit structure and a high-voltage parallel bridge circuit structure are disclosed. The parallel bridge circuit structure includes a first bridge circuit and a second bridge circuit. The first bridge circuit includes a plurality of first diodes, and the second bridge circuit includes a plurality of second diodes. Each of the second diodes is exclusively connected to one of the first diodes in parallel. With the design of the parallel connection between the first bridge circuit and the second bridge circuit, break of the entire circuit caused by a damaged diode is prevented. Moreover, with the aid of the AC signal phase delay circuit structure, the output voltage of the parallel bridge circuit structure can be stable and continuous voltage, while the high-voltage parallel bridge circuit structure includes a plurality of parallel bridge circuit structures so as to endure a high voltage input.Type: ApplicationFiled: April 16, 2008Publication date: February 24, 2011Applicant: Helio Optoelectronics CorporationInventors: Ming-Hung Chen, Shih-Yi Wen, Hsin-Tai Lin, Jing-Yi Chen
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Publication number: 20110014400Abstract: A method of forming a structure useful in all forms of deposited metals, elemental metals, metal alloys, metal compounds, metal systems, including refractory metals such as tungsten and tantalum is provided. The structure generally comprises a substrate, a first layer formed atop the substrate, and a second layer formed atop the first layer. The first layer comprises a metal, which can be chromium, gold, platinum, aluminum, nickel, or copper. The second layer comprises a metal, elemental metal, metal alloy, metal compound, or metal system comprising a refractory metal such as tungsten or tantalum. The substrate can be a silicon, quartz or glass, metal, metal oxide or nitride.Type: ApplicationFiled: January 4, 2010Publication date: January 20, 2011Inventors: Jing-Yi Huang, Laurence P. Sadwick
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Patent number: 7851800Abstract: A TFT and an OLED device are provided. The TFT includes a substrate, a gate, a gate insulator, a source/drain layer, an isolated layer, and a channel layer. The gate is disposed on the substrate. The gate insulator is disposed on the substrate and covers the gate. The source/drain layer is disposed on the gate insulator, and exposes a portion of the gate insulator above the gate. The isolated layer is disposed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. The channel layer is disposed in the opening of the isolated layer. Further, the channel layer is exposed by the opening and is electrically connected to the source/drain layer. On the other hand, the OLED device mainly includes a driving circuit and an organic electro-luminescent unit.Type: GrantFiled: December 30, 2008Date of Patent: December 14, 2010Assignee: Industrial Technology Research InstituteInventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho
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Publication number: 20100308406Abstract: A thin film transistor is provided. The thin film transistor includes a gate, at least an inorganic material layer, at least one dielectric layer, a source, a drain, and an active layer. The active layer is located on the substrate. The source and the drain cover a part of the active layer and a part of the substrate. A channel region exists between the source and the drain. The inorganic material layer is filled into the channel region. The dielectric layer at least including an organic material covers the inorganic material, the source and the drain. The gate is disposed on the dielectric layer.Type: ApplicationFiled: August 19, 2010Publication date: December 9, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jing-Yi Yan, Liang-Hsiang Chen
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Publication number: 20100277932Abstract: A halation-free light-emitting diode holder includes a body and a retaining portion. The body has a die holder, which includes a first surface, a second surface, and an opened end. The retaining portion is provided on the second surface. By using the retaining portion, the optical gel in the die holder is blocked from capillary movement up along the second surface. Furthermore, having nano-material layers further formed on the second surface or having the area of the first surface made greater than the area of the opened-end also prevents the optical gel from climbing along the second surface. Thereby, a light halation circling a light pattern of the resultant light-emitting diode is avoided and the light-emitting diode is improved in luminance uniformity.Type: ApplicationFiled: January 23, 2008Publication date: November 4, 2010Applicant: Helio Optoelectronics CorporationInventors: Ming-Hung Chen, Shih-Yi Wen, Hsin-Tai Lin, Jing-Yi Chen
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Patent number: 7816233Abstract: The invention provides a method of manufacturing a composite wafer structure. In particular, the method, according to the invention, is based on the fracture mechanics theory to actively control fracture induced during the manufacture of the composite wafer structure and to further protect from undesired edge damage. Thereby, the method, according to the invention, can enhance the yield rate of industrial mass production regarding the composite wafer structure.Type: GrantFiled: October 7, 2005Date of Patent: October 19, 2010Assignee: Sino-American Silicon Products Inc.Inventors: Jer-Liang Yeh, Jing-Yi Huang, Wen-Ching Hsu, Ya-Lan Ho, Sung-Lin Hsu, Jung-Tsung Wang
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Publication number: 20100258346Abstract: A package of an environmentally sensitive electronic device including a first substrate, a second substrate, an environmentally sensitive electronic device, a plurality of barrier structures, and a fill is provided. The second substrate is disposed above the first substrate. The environmentally sensitive electronic device is disposed on the first substrate and located between the first substrate and the second substrate. The barrier structures are disposed between the first substrate and the second substrate, wherein the barrier structures surround the environmental sensitive electronic device, and the water vapor transmission rate of the barrier structures is less than 10?1 g/m2/day. The fill is disposed between the first substrate and the second substrate and covers the environmentally sensitive electronic device and the barrier structures.Type: ApplicationFiled: June 19, 2009Publication date: October 14, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Kuang-Jung Chen, Jia-Chong Ho, Jing-Yi Yan, Shu-Tang Yeh
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Patent number: 7812344Abstract: A thin film transistor is provided. The thin film transistor includes a gate, at least one inorganic material layer, at least one dielectric layer, a source, a drain and an active layer. The gate is disposed on the substrate. The inorganic material layer covers the gate. The dielectric layer including at least one organic material covers the substrate and has an opening exposing the inorganic material layer on the gate. The source and the drain are disposed on the dielectric layer and a part of the inorganic layer exposed by the opening respectively. A channel region exists between the source and the drain. The active layer is disposed on the channel region.Type: GrantFiled: February 17, 2009Date of Patent: October 12, 2010Assignee: Industrial Technology Research InstituteInventors: Jing-Yi Yan, Liang-Hsiang Chen
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Patent number: 7786500Abstract: The present invention is an LED lamp lens, on which orderly arranged surface plural protuberances. And with the differences of light perviousness, a particular luminous pattern of the LED lamp is displayed when the LED lamp is turned on.Type: GrantFiled: April 2, 2008Date of Patent: August 31, 2010Assignee: Everlight Electronics Co., Ltd.Inventors: Jing-Yi Tsai, Chun-Chih Liang
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Publication number: 20100216460Abstract: Techniques for efficiently performing public land mobile network (PLMN) list generation or PLMN search on user equipment for use in a mobile communication system are described. The user equipment is operating in a plurality of supported modes and each supported mode includes a plurality of frequency bands. The user equipment includes an antenna, two RF transceivers and a processor. The RF transceivers are coupled to the antenna for operating in the operating frequency bands via the antenna. The processor coupled to the RF transceivers receives a request requesting PLMN list generation or PLMN search, determines whether both or either of the RF transceivers are available for handling the PLMN list generation or PLMN search, respectively directs the RF transceivers to generate a PLMN list or perform a search for at least one selected operating frequency band according to the request and a dispatch rule, and provides a corresponding execution result.Type: ApplicationFiled: February 23, 2009Publication date: August 26, 2010Applicant: MEDIATEK INC.Inventor: Jing-Yi Wu
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Publication number: 20100164369Abstract: A packaging method of an organic light emitting diode (OLED) is described. First, a substrate is provided, and the substrate has the OLED device formed thereon. Thereafter, at least one protection layer is formed on the substrate, so as to cover the peripheral sidewall of the OLED device entirely. The step of forming the protection layer includes forming an organic layer on the substrate, and then forming a metal layer on the organic layer, wherein the metal layer at least covers a sidewall of the OLED device. Afterwards, an oxidation treatment is performed, so as to oxidize a portion of the metal layer.Type: ApplicationFiled: June 19, 2009Publication date: July 1, 2010Applicant: Industrial Technology Research InstituteInventors: Shu-Tang Yeh, Jing-Yi Yan, Kung-Yu Cheng
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Patent number: 7741163Abstract: A method of fabricating a thin film transistor is provided. A gate is formed on a substrate. A gate insulator is formed on the substrate to cover the gate. A source/drain layer is formed on the gate insulator, and a portion of the gate insulator above the gate is exposed by the source/drain layer. An isolated layer is formed on the source/drain layer and has an opening to expose a portion of the gate insulator and a portion of the source/drain layer above the gate. A channel layer is formed in the opening of the isolated layer to be electrically connected to the source/drain layer, and the channel layer is exposed by the opening.Type: GrantFiled: September 19, 2006Date of Patent: June 22, 2010Assignee: Industrial Technology Research InstituteInventors: Tarng-Shiang Hu, Yi-Kai Wang, Jing-Yi Yan, Tsung-Hsien Lin, Jia-Chong Ho
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Publication number: 20100152868Abstract: A motion control servo loop apparatus, comprising: a feed-forward control module, and a proportional-integral-derivative (PID) control loop and a compensation adder. The feed-forward control module is capable of generating a feed-forward compensation. The PID control loop further comprises: a proportional control module, an integral control module and a derivative control module. The proportional control module is capable of generating a proportional compensation. The derivative control module is capable of generating a derivative compensation. The integral control module uses a digital differential analyzer (DDA) algorithm to perform integration for accumulated errors with respect to each sampling clock at each DDA pulse and thus output an accumulated error, which is then processed to generate an integral compensation.Type: ApplicationFiled: May 15, 2009Publication date: June 17, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Ying-Min Chen, Wen-Chuan Chen, Jing-Yi Huang, Cheng-Xue Wu, Chia-Ching Lin, Wan-Kai Shen
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Publication number: 20100148654Abstract: A substrate board, a fabricating method thereof, and a display using the same are provided. The substrate board includes a substrate having at least a rigid area and at least a flexible area, and at least an electronic component disposed on a surface of the substrate, wherein the rigid area is thicker than the flexible area. A patterned high-extensive material may be additionally disposed on the substrate to improve reliability thereof. The rigid area and the flexible area may be formed by molds or cutters. By using an above structure, the electronic component is less affected when the substrate is under stress, so that good characteristics are maintained.Type: ApplicationFiled: April 15, 2009Publication date: June 17, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jing-Yi Yan, Shu-Tang Yeh
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Publication number: 20100127270Abstract: A thin film transistor is provided. The thin film transistor includes a gate, at least one inorganic material layer, at least one dielectric layer, a source, a drain and an active layer. The gate is disposed on the substrate. The inorganic material layer covers the gate. The dielectric layer including at least one organic material covers the substrate and has an opening exposing the inorganic material layer on the gate. The source and the drain are disposed on the dielectric layer and a part of the inorganic layer exposed by the opening respectively. A channel region exists between the source and the drain. The active layer is disposed on the channel region.Type: ApplicationFiled: February 17, 2009Publication date: May 27, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jing-Yi Yan, Liang-Hsiang Chen
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Publication number: 20100084636Abstract: A composition for photosensitive dielectric material is provided. The composition includes 4 to 10 percent by weight of a polymer material, 1.5 to 10 percent by weight of a crosslinking agent, 0.32 to 2 percent by weight of a photoacid generator (PAG) and 78 to 94.18 percent by weight of solvent, based on a total weight of the composition.Type: ApplicationFiled: April 20, 2009Publication date: April 8, 2010Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Mei-Ru Lin, Jing-Yi Yan, Liang-Hsiang Chen, Chin-Lung Liao
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Publication number: 20100027534Abstract: A system for handling packet-switched data transmission is provided. The system includes a first RF module, a second RF module, a first subscriber identity card camping on a cell via the first RF module, a second subscriber identity card camping on the same cell or a different cell via the second RF module and a load balancing unit. The load balancing unit receives an uplink IP packet, determines one subscriber identity card from the first and second subscriber identity cards when the uplink IP packet comprises information regarding an unestablished connection of a recognized application, and transmits the uplink IP packet to a destination via the determined subscriber identity card and the RF module corresponding to the determined subscriber identity card.Type: ApplicationFiled: May 11, 2009Publication date: February 4, 2010Applicant: MEDIATEK INC.Inventors: Jing-Yi Wu, Chen-Hsuan Lee, Li-Chi Huang, Ying-Chieh Liao
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Publication number: 20090271981Abstract: A method for fabricating a device with a flexible substrate includes providing a rigid substrate at first. Next, an interfacing layer can be formed on the rigid substrate, and then a flexible substrate is directly formed on the interfacing layer. The flexible substrate fully contacts the interfacing layer. A device structure is then formed on the flexible substrate.Type: ApplicationFiled: July 2, 2009Publication date: November 5, 2009Applicant: Industrial Technology Research InstituteInventors: TAMG-SHIANG HU, Jing-Yi Yan, Jia-Chong Ho, Cheng-Chung Lee