Patents by Inventor Jing Yi

Jing Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140296451
    Abstract: This invention provides Chelating Complex Micelles as a drug carrier. The Chelating Complex Micelles can load drugs without changing their structure, and therefore extend the half-life of drugs in the human body. The chelating complex micelles contain a metal ion core, at least one polymer, and at least one drug molecule. The metal ion is considered as a Lewis acid while polymer chain and drug molecules are referred to as Lewis bases. The drug molecule is linked to the polymer via forming coordinate bonds with metal ion, and then self-assembled to form chelating complex micelles as a drug carrier.
    Type: Application
    Filed: June 17, 2014
    Publication date: October 2, 2014
    Inventors: Chau-Hui Wang, Chia-Hung Chen, Johnson Lin, Jing-Yi Chen, Wei-Chuan Liao
  • Publication number: 20140231811
    Abstract: A semiconductor device structure is provided. The semiconductor device structure may include a substrate, a semiconductor layer, a first conductive layer, a second conductive layer, a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed on the substrate. The second dielectric layer is disposed on the first dielectric layer. The semiconductor layer is adjacent to the first dielectric layer or the second dielectric layer. The semiconductor layer is disposed on the first dielectric layer or the second dielectric layer. The first conductive layer is adjacent to the first dielectric layer or the second dielectric layer. The second conductive layer is disposed on the first dielectric layer or the second dielectric layer. The effective Young's modulus of the second dielectric layer may be smaller than the Young's modulus of the first dielectric layer.
    Type: Application
    Filed: February 19, 2014
    Publication date: August 21, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Jing-Yi YAN, Chih-Chieh HSU, Liang-Hsiang CHEN, Chen-Wei LIN
  • Patent number: 8806391
    Abstract: A method of optical proximity correction (OPC) includes the following steps. At first, a layout pattern is provided to a computer system. Subsequently, the layout pattern is classified into at least a first region and at least a second region. Then, several iterations of OPC calculations are performed to the layout pattern, and a total number of OPC calculations performed in the first region is substantially larger than a total number of OPC calculations performed in the second region. Afterwards, a corrected layout pattern is outputted through the computer system onto a mask.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 12, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Te-Hsien Hsieh, Ming-Jui Chen, Cheng-Te Wang, Shih-Ming Kuo, Jing-Yi Lee
  • Publication number: 20140217400
    Abstract: A semiconductor element structure and a manufacturing method for the same are provided. The semiconductor element structure may comprise a gate electrode, a dielectric layer, an active layer, a source, a drain and a protective layer. The active layer and the gate electrode are disposed on opposing sides of the dielectric layer. The source is disposed on the active layer. The drain is disposed on the active layer. The protective layer is disposed on the active layer. The protective layer may have a hydrogen content less than or equal to 0.1 at % and a sheet resistance higher than or equal to 10? 10 Ohm/sq.
    Type: Application
    Filed: January 31, 2014
    Publication date: August 7, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Jing-Yi YAN, Chu-Yin HUNG, Liang-Hsiang CHEN, Hsiao-Chiang YAO, Wu-Wei TSAI
  • Publication number: 20140212371
    Abstract: This invention provides the controlled-release method for a pharmaceutical composition comprising of metals in the drug carrier. The specific chelator is used to trigger the release of active pharmaceutical ingredients from chelating complex micelles. The drug release rate and half-life can also be controlled by manipulating the dosing sequence and the concentration of metal and specific chelator.
    Type: Application
    Filed: January 31, 2013
    Publication date: July 31, 2014
    Inventors: Chia-Hung Chen, Chau-Hui Wang, John-Son Lin, Tieh-Hsiung Chiu, Jing-Yi Chen, Pi-Hung Liao, Chia-Chi Su, Wei-Chuan Liao
  • Patent number: 8785569
    Abstract: This invention provides Chelating Complex Micelles as a drug carrier. The Chelating Complex Micelles can load drugs without changing their structure, and therefore extend the half-life of drugs in the human body. The chelating complex micelles contain a metal ion core, at least one polymer, and at least one drug molecule. The metal ion is considered as a Lewis acid while polymer chain and drug molecules are referred to as Lewis bases. The drug molecule is linked to the polymer via forming coordinate bonds with metal ion, and then self-assembled to form chelating complex micelles as a drug carrier.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: July 22, 2014
    Assignee: Original Biomedicals Co., Ltd.
    Inventors: Chau-Hui Wang, Chia-Hung Chen, Johnson Lin, Jing-Yi Chen, Wei-Chuan Liao
  • Patent number: 8763243
    Abstract: A fabricating method of a substrate board is provided. The substrate board includes a substrate having rigid areas and flexible areas, and at least an electronic component disposed on the substrate, wherein each of the rigid areas is thicker than the flexible areas. A patterned high-extensive material may be additionally disposed on the substrate to improve reliability thereof. The rigid areas and the flexible areas may be formed by molds or cutters. By using an above structure, the electronic component is less affected when the substrate is under stress, so that good characteristics are maintained.
    Type: Grant
    Filed: June 18, 2012
    Date of Patent: July 1, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Jing-Yi Yan, Shu-Tang Yeh
  • Publication number: 20140178371
    Abstract: This invention concerns in general treatment of diseases and pathological conditions with anti-VEGF antibodies. More specifically, the invention concerns the treatment of human patients susceptible to or diagnosed with cancer using an anti-VEGF antibody, preferably in combination with one or more additional anti-tumor therapeutic agents for the treatment of ovarian cancer.
    Type: Application
    Filed: January 16, 2014
    Publication date: June 26, 2014
    Applicant: GENENTECH, INC.
    Inventors: Jakob Dupont, Cornelia Irl, Amreen Husain, Mika A. Sovak, Jing Yi, Hoa Nguyen
  • Publication number: 20140160710
    Abstract: An environmental sensitive electronic device package including a first substrate, a second substrate, an environmental sensitive electronic device, a side wall barrier structure, a first adhesive, and a second adhesive is provided. The environmental sensitive electronic device is located on the first substrate. The first adhesive is located on the first substrate. The side wall barrier structure is located on the first adhesive, and the side wall barrier structure is adhered to the first substrate through the first adhesive. The second adhesive is located on the side wall barrier structure. The side wall barrier structure is adhered to the second substrate through the second adhesive, and the side wall barrier structure, the first adhesive, and the second adhesive are located between the first substrate and the second substrate. A manufacturing method of an environmental sensitive electronic device package is also provided.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 12, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Jing-Yi Yan, Shu-Tang Yeh, Sheng-Wei Chen, Kuang-Jung Chen
  • Patent number: 8745547
    Abstract: A method for making a photomask layout is disclosed. A graphic data of a photomask is provided. A first correction step is performed to the graphic data. A first verification step is performed to all of the graphic data which has been subjected to the first correction step, wherein at least one failed pattern not passing the first verification step is found. A second correction step is performed to the at least one failed pattern, so as to obtain at least one modified pattern. A second verification step is performed only to at least one buffer region covering the at least one modified pattern, wherein the buffer region has an area less than a whole area of the photomask. Besides, each of the first correction step, the first verification step, the second correction step and the second verification step is executed by a computer.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: June 3, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Shih-Ming Kuo, Ming-Jui Chen, Te-Hsien Hsieh, Cheng-Te Wang, Jing-Yi Lee
  • Publication number: 20140143468
    Abstract: A real-time sampling device for being coupled to a processing unit includes a first register, a second register, a third register, a trigger output element and a timer for outputting an interrupt signal. The first register externally receives and processes a first input signal to produce processed data. The second register retrieves the processed data from the first register upon receiving the interrupt signal, and the processing unit, upon receiving the interrupt signal, retrieves the processed data from the second register and performs calculation thereon to produce a processed data calculation value and temporarily store the processed data calculation value in the third register. The trigger output element outputs the processed data calculation value in the third register in real time upon receiving the interrupt signal. The real-time sampling device an be applied to digital control systems in order to perform real-time sampling on controlled subjects.
    Type: Application
    Filed: October 24, 2013
    Publication date: May 22, 2014
    Applicant: Industrial Technology Research Institute
    Inventors: Ying-Min CHEN, Wen-Chuan CHEN, Jing-Yi HUANG, Yi-Hsueh YANG, Feng-Chi LEE
  • Patent number: 8678862
    Abstract: A HomePlug having a panel replacement structure includes a HomePlug body and a panel. The HomePlug body has an operation side and a network port. The operation side has an insertion portion and a first coupling portion. The panel has an opening and second coupling portion. The second coupling portion can be coupled to the first coupling portion so as to allow the opening to correspond in position to the insertion portion. Changes in the appearance of the HomePlug are brought about by panel replacement. A heat dissipation vent is disposed at the junction of the operation side and an adjacent side, such that heat dissipation takes place at the adjacent side-neighboring portion of the heat dissipation vent when the panel is coupled to the operation side and covers the operation side.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: March 25, 2014
    Assignee: Askey Computer Corp.
    Inventors: Jing-Yi Peng, Shih-Po Lo
  • Patent number: 8648042
    Abstract: A pharmaceutical polymer and a method for quenching free radicals is described. The pharmaceutical polymer comprises a glycopeptide covalently bound to an aminothiol moiety. The pharmaceutical polymer and method can be applied before or after the occurrence of radiation exposure.
    Type: Grant
    Filed: May 30, 2012
    Date of Patent: February 11, 2014
    Assignee: Taiwan Hopax Chems. Mfg. Co., Ltd.
    Inventors: Chau-Hui Wang, Chia-Hung Chen, Jing-Yi Chen, Chih-Wei Hsu
  • Publication number: 20140040837
    Abstract: A method of optical proximity correction (OPC) includes the following steps. At first, a layout pattern is provided to a computer system. Subsequently, the layout pattern is classified into at least a first region and at least a second region. Then, several iterations of OPC calculations are performed to the layout pattern, and a total number of OPC calculations performed in the first region is substantially larger than a total number of OPC calculations performed in the second region. Afterwards, a corrected layout pattern is outputted through the computer system onto a mask.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 6, 2014
    Inventors: Te-Hsien Hsieh, Ming-Jui Chen, Cheng-Te Wang, Shih-Ming Kuo, Jing-Yi Lee
  • Publication number: 20130330947
    Abstract: A HomePlug with a changeable top case structure includes a casing and a socket assembly. The casing has a first coupling portion therein and has an opening. The socket assembly has a second coupling portion for coupling with the first coupling portion, such that the socket assembly corresponds in position to the opening and thereby is coupled to the casing from inside and exposed from the opening. The HomePlug with a changeable top case structure is effective in dispensing with redesign and the manufacturing of a casing in its entirety, cutting die and material costs, enhancing ease of product design, and increasing assembly universality.
    Type: Application
    Filed: November 9, 2012
    Publication date: December 12, 2013
    Applicant: ASKEY COMPUTER CORP.
    Inventors: JING-YI PENG, SHIH-PO LO
  • Publication number: 20130330961
    Abstract: A HomePlug having a panel replacement structure includes a HomePlug body and a panel. The HomePlug body has an operation side and a network port. The operation side has an insertion portion and a first coupling portion. The panel has an opening and second coupling portion. The second coupling portion can be coupled to the first coupling portion so as to allow the opening to correspond in position to the insertion portion. Changes in the appearance of the HomePlug are brought about by panel replacement. A heat dissipation vent is disposed at the junction of the operation side and an adjacent side, such that heat dissipation takes place at the adjacent side-neighboring portion of the heat dissipation vent when the panel is coupled to the operation side and covers the operation side.
    Type: Application
    Filed: September 12, 2012
    Publication date: December 12, 2013
    Applicant: ASKEY COMPUTER CORP.
    Inventors: JING-YI PENG, SHIH-PO LO
  • Publication number: 20130276464
    Abstract: A measurement method, a measurement apparatus, and a computer program product for measuring a thermoelectric module are provided. A temperature is provided to the thermoelectric module. A current is applied to the thermoelectric module to turn both sides of the thermoelectric module into a hot side and a cold side. The temperature of the hot side is higher than that of the cold side. A terminal voltage of the thermoelectric module, a hot side temperature of the hot side, and a cold side temperature of the cold side are measured at different time points. A thermoelectric relationship between the terminal voltages and differences between the hot side temperatures and the corresponding cold side temperatures is obtained according to the terminal voltages, the hot side temperatures, and the cold side temperatures. At least one first parameter of the thermoelectric module is estimated according to the thermoelectric relationship.
    Type: Application
    Filed: April 1, 2013
    Publication date: October 24, 2013
    Inventors: Heng-Chieh Chien, Ming-Ji Dai, Sheng-Tsai Wu, Huey-Lin Hsieh, Jing-Yi Huang
  • Patent number: 8513670
    Abstract: A pixel structure and a pixel circuit having multi-display mediums are provided. A storage capacitor and a first display medium are disposed in different layers, so as to overlap the storage capacitor with a pixel electrode of the first display medium. Accordingly, an area of the first display medium can be increased for enlarging an aperture ratio of the pixel. Furthermore, because a third pixel electrode is disposed in a conductive layer, the third pixel electrode can control/drive a second display medium under a substrate.
    Type: Grant
    Filed: October 26, 2010
    Date of Patent: August 20, 2013
    Assignee: Industrial Technology Research Institute
    Inventors: Jing-Yi Yan, Yen-Shih Huang, Chen-Wei Lin, Hua-Chi Cheng
  • Patent number: 8487798
    Abstract: A synthesis method of Sigma-Delta modulator capable of relaxing circuit specification and reducing power consumption, comprising the following steps: firstly, set a target bandwidth and a target performance; upon obtaining a Noise Transfer Function (NTF), perform coefficient synthesis a first time, to ascertain a plurality sets of first performance results corresponding to said NTF, and obtain a plurality sets of first circuit specifications fulfilling said target performance, through analyzing circuit non-ideal effect of said first performance results. Next, increase an oversampling ratio of parameters, to obtain a plurality sets of second performance results, and a plurality sets of second circuit specifications. Then, increase quantizer bit number, and increase attenuation quantity, to obtain a plurality sets of third circuit specifications. Finally, compare said first, second and third circuit specifications, to select one of greatest variation to perform calibrations.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: July 16, 2013
    Assignee: National Chung Cheng University
    Inventors: Shuenn-Yuh Lee, Jia-Hua Hong, Jing-Yi Wong
  • Publication number: 20130168666
    Abstract: A semiconductor device is provided. A first semiconductor layer is disposed on a substrate and has a channel region and two doped regions beside the channel region. A first dielectric layer is disposed on the substrate and covers the first semiconductor layer. A gate is disposed on the first dielectric layer and corresponds to the channel region of the first semiconductor layer. A second dielectric layer is disposed on the first dielectric layer and covers the gate. A second semiconductor layer is disposed on the second dielectric layer and corresponds to the gate. The boundary of the second semiconductor layer does not exceed that of the gate. At least one first conductive plug penetrates through the first and second dielectric layers and contacts one doped region of the first semiconductor layer. At least one contact contacts the second semiconductor layer. A method of forming a semiconductor device is also provided.
    Type: Application
    Filed: March 29, 2012
    Publication date: July 4, 2013
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Jing-Yi Yan, Chen-Wei Lin, Chih-Chieh Hsu, King-Yuan Ho