Patents by Inventor Joachim Mahler

Joachim Mahler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for minimizing carrier stress of a semiconductor device
    Patent number: 8531014
    Abstract: A method and a system for minimizing carrier stress of a semiconductor device are provided. In one embodiment, a semiconductor device is provided comprising a carrier comprising a mesh coated with a metallic material, and a semiconductor chip disposed over the carrier.
    Type: Grant
    Filed: September 27, 2010
    Date of Patent: September 10, 2013
    Assignee: Infineon Technologies AG
    Inventors: Manfred Mengel, Oliver Eichinger, Khalil Hosseini, Joachim Mahler
  • Chip arrangement and method for producing a chip arrangement
    Patent number: 8519547
    Abstract: A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: August 27, 2013
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Alfred Haimerl, Angela Kessler, Michael Bauer
  • Method of manufacturing a semiconductor device with a carrier having a cavity and semiconductor device
    Patent number: 8513062
    Abstract: A method includes providing a carrier having a first cavity, providing a dielectric foil with a metal layer attached to the dielectric foil, placing a first semiconductor chip in the first cavity of the carrier, and applying the dielectric foil to the carrier.
    Type: Grant
    Filed: February 16, 2010
    Date of Patent: August 20, 2013
    Assignee: Infineon Technologies AG
    Inventors: Ivan Nikitin, Joachim Mahler
  • Method of Manufacturing a Semiconductor Device
    Publication number: 20130207243
    Abstract: The method includes providing a semiconductor chip having a first main face and a second main face opposite the first main face. The semiconductor chip includes an electrical device adjacent to the first main face. Material of the semiconductor chip is removed at the second main face except for a pre-defined portion so that a non-planar surface remains at the second main face.
    Type: Application
    Filed: February 15, 2012
    Publication date: August 15, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Edward Fuergut, Joachim Mahler
  • Thermoplastic-thermosetting composite and method for bonding a thermoplastic material to a thermosetting material
    Patent number: 8507080
    Abstract: Composite with a first part composed of a thermoset material and with a second part composed of a thermoplastic material, and with an adhesion-promoter layer located between these, where the first part has been bonded by way of the adhesion-promoter layer to the second part, and where the adhesion-promoter layer comprises pyrolytically deposited semiconductor oxides and/or pyrolytically deposited metal oxides.
    Type: Grant
    Filed: April 26, 2006
    Date of Patent: August 13, 2013
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Alfred Haimerl, Wolfgang Schober, Michael Bauer, Angela Kessler
  • Semiconductor Device and Method of Manufacturing Thereof
    Publication number: 20130200502
    Abstract: A method of manufacturing a semiconductor device includes providing a transfer foil. A plurality of semiconductor chips is placed on and adhered to the transfer foil. The plurality of semiconductor chips adhered to the transfer foil is placed over a multi-device carrier. Heat is applied to laminate the transfer foil over the multi-device carrier, thereby accommodating the plurality of semiconductor chips between the laminated transfer foil and the multi-device carrier.
    Type: Application
    Filed: February 8, 2012
    Publication date: August 8, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Ivan Nikitin, Stefan Landau, Joachim Mahler, Alexander Heinrich, Ralf Wombacher
  • Electronic Device and a Method for Fabricating an Electronic Device
    Publication number: 20130187259
    Abstract: An electronic device includes a semiconductor chip. A contact element, an electrical connector, and a dielectric layer are disposed on a first surface of a conductive layer facing the semiconductor chip. A first conductive member is disposed in a first recess of the dielectric layer. The first conductive member electrically connects the contact element of the semiconductor chip with the conductive layer. A second conductive member is disposed in a second recess of the dielectric layer. The second conductive member electrically connects the conductive layer with the electrical connector.
    Type: Application
    Filed: January 19, 2012
    Publication date: July 25, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Ivan Nikitin, Joachim Mahler
  • DEVICE AND METHOD FOR MANUFACTURING AN ELECTRONIC DEVICE
    Publication number: 20130168870
    Abstract: A method for manufacturing an electronic interconnect device is described, the method comprising: providing an electronic members each having one or more electrical contacts on a first member side thereof; providing a carrier having a carrier base and having sets of one or more electrically conductive projections on a surface of the carrier base; attaching the electronic members with the corresponding contacts thereof to the respective set of projections to thereby electrically connect the one or more electrical contacts of the respective chip with the corresponding one or more electrically conductive projections of the respective set; encapsulating exposed portions of the electronic member with an encapsulating material to form an encapsulation.
    Type: Application
    Filed: December 30, 2011
    Publication date: July 4, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Edward Fuergut, Joachim Mahler
  • MICROMECHANICAL SEMICONDUCTOR SENSING DEVICE
    Publication number: 20130152696
    Abstract: Micromechanical semiconductor sensing device comprises a micromechanical sensing structure being configured to yield an electrical sensing signal, and a piezoresistive sensing device provided in the micromechanical sensing structure, said piezoresistive sensing device being arranged to sense a mechanical stress disturbing the electrical sensing signal and being configured to yield an electrical disturbance signal based on the sensed mechanical stress disturbing the electrical sensing signal.
    Type: Application
    Filed: December 19, 2011
    Publication date: June 20, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Franz-Peter Kalz, Horst Theuss, Bernhard Winkler, Khalil Hosseini, Joachim Mahler, Manfred Mengel
  • Device Including Two Power Semiconductor Chips and Manufacturing Thereof
    Publication number: 20130146991
    Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.
    Type: Application
    Filed: December 8, 2011
    Publication date: June 13, 2013
    Applicant: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Joachim Mahler, Johannes Lodermeyer
  • CHIP-PACKAGE AND A METHOD FOR FORMING A CHIP-PACKAGE
    Publication number: 20130134589
    Abstract: A chip-package includes a chip-carrier configured to carry a chip, the chip arranged over a chip-carrier side, wherein the chip-carrier side is configured in electrical connection with a chip back side; an insulation material including: a first insulation portion formed over a first chip lateral side; a second insulation portion formed over a second chip lateral side, wherein the first chip lateral side and the second chip lateral side each abuts opposite edges of the chip back side; and a third insulation portion formed over at least part of a chip front side, the chip front side including one or more electrical contacts formed within the chip front side; wherein at least part of the first insulation portion is arranged over the chip-carrier side and wherein the first insulation portion is configured to extend in a direction perpendicular to the first chip lateral side further than the chip-carrier.
    Type: Application
    Filed: November 28, 2011
    Publication date: May 30, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Manfred Mengel, Thomas Wowra, Joachim Mahler, Khalil Hosseini
  • Molding compound adhesion for map-molded flip-chip
    Patent number: 8450148
    Abstract: A semiconductor device whose semiconductor device components have particularly reliable adhesion to a plastic housing composition surrounding them is intended to be produced by a simplest possible method. An adhesion promoting solution is introduced into the interspace between the front side of the flip-chips and the top side of the substrate and the solvent from the adhesion promoting solution is evaporated with formation of an adhesion promoting coating on the front sides of the semiconductor chips and the top side of the substrate. The semiconductor chip and the top side of the substrate are subsequently embedded into a plastic housing composition.
    Type: Grant
    Filed: December 14, 2006
    Date of Patent: May 28, 2013
    Assignee: Infineon Technologies, AG
    Inventors: Joachim Mahler, Edward Fuergut
  • CHIP-CARRIER, A METHOD FOR FORMING A CHIP-CARRIER AND A METHOD FOR FORMING A CHIP PACKAGE
    Publication number: 20130127031
    Abstract: Various embodiments provide a chip-carrier including, a chip-carrier surface configured to carry a first chip from a first chip bottom side, wherein a first chip top side of the first chip is configured above the chip-carrier surface; and at least one cavity extending into the chip-carrier from the chip-carrier surface; wherein the at least one cavity is configured to carry a second chip from a second chip bottom side, wherein a second chip top side of the second chip is substantially level with the first chip top side. The second chip is electrically insulated from the chip-carrier by an electrical insulation material inside the cavity.
    Type: Application
    Filed: November 22, 2011
    Publication date: May 23, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Khalil Hosseini, Joachim Mahler, Anton Prueckl
  • HOUSING FOR A CHIP ARRANGEMENT AND A METHOD FOR FORMING A HOUSING
    Publication number: 20130120940
    Abstract: A housing for a chip arrangement is provided, the housing including: a carrier including a first carrier side configured to receive a chip arrangement, a second carrier side and one or more through-holes extending from the first carrier side to the second carrier side; at least one electrical connector inserted through a through-hole, the at least one electrical connector arranged to extend from the second carrier side to the first carrier side; wherein the at least one electrical connector may include: a first portion on the first carrier side; a second portion on the first carrier side, wherein the first portion is configured to extend away from the first carrier side at an angle to the second portion; and a third portion on the second carrier side, wherein the third portion is configured to extend away from the second carrier side at an angle to the second portion.
    Type: Application
    Filed: November 14, 2011
    Publication date: May 16, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Stefan Landau, Joachim Mahler
  • Semiconductor component and production method
    Patent number: 8440733
    Abstract: Semiconductor component and method for production of a semiconductor component. The invention relates to a semiconductor component having a semiconductor chip, which is arranged on a substrate, in one embodiment on a chip carrier, and an encapsulation material, which at least partially surrounds the semiconductor chip. The chip carrier is at least partly provided with a layer of polymer foam.
    Type: Grant
    Filed: May 1, 2012
    Date of Patent: May 14, 2013
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Alfred Haimerl, Michael Bauer, Angela Kessler, Wolfgang Schober
  • Device Including Two Power Semiconductor Chips and Manufacturing Thereof
    Publication number: 20130113114
    Abstract: A device includes a first power semiconductor chip having a first face and a second face opposite to the first face with a first contact pad arranged on the first face. The first contact pad is an external contact pad. The device further includes a first contact clip attached to the second face of the first power semiconductor chip. A second power semiconductor chip is attached to the first contact clip, and a second contact clip is attached to the second power semiconductor chip.
    Type: Application
    Filed: November 4, 2011
    Publication date: May 9, 2013
    Applicant: Infineon Technologies AG
    Inventors: Khalil Hosseini, Manfred Mengel, Joachim Mahler, Franz-Peter Kalz
  • Chip carrier
    Patent number: 8399996
    Abstract: Electronic circuit arrangement, includes a chip and a chip carrier having a substrate and a chip contact location. At least the chip contact location is provided with a soldering layer. The chip includes a bonding layer. A silver layer for eutectic bonding with the bonding layer is provided on the soldering layer in the region of the chip contact location.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: March 19, 2013
    Assignee: Infineon Technologies AG
    Inventors: Khalil Hosseini, Joachim Mahler
  • CHIP ARRANGEMENT AND METHOD FOR PRODUCING A CHIP ARRANGEMENT
    Publication number: 20130062781
    Abstract: A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region.
    Type: Application
    Filed: March 6, 2012
    Publication date: March 14, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Joachim Mahler, Alfred Haimerl, Michael Bauer
  • METHOD OF PROCESSING AT LEAST ONE DIE AND DIE ARRANGEMENT
    Publication number: 20130049214
    Abstract: In various embodiments, a method of processing at least one die may include: forming at least one placeholder element over at least one contact pad of at least one die; forming a die embedding layer to at least partially embed the at least one die and the at least one placeholder element; removing the at least one placeholder element to form at least one opening in the at least one die embedding layer and expose the at least one contact pad of the at least one die; filling the at least one opening with electrically conductive material to electrically contact the at least one contact pad of the at least one die.
    Type: Application
    Filed: August 29, 2011
    Publication date: February 28, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Ivan Nikitin, Joachim Mahler
  • Semiconductor device
    Patent number: 8362617
    Abstract: One embodiment provides a semiconductor device including a carrier, a first chip attached to the carrier, a structured dielectric coupled to the chip and to the carrier, and a conducting element electrically connected with the chip and extending over a portion of the structured dielectric. The conducting element includes a sintered region.
    Type: Grant
    Filed: May 1, 2008
    Date of Patent: January 29, 2013
    Assignee: Infineon Technologies AG
    Inventors: Ivan Nikitin, Joachim Mahler