Patents by Inventor Joachim Mahler

Joachim Mahler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120074568
    Abstract: A method and a system for minimizing carrier stress of a semiconductor device are provided. In one embodiment, a semiconductor device is provided comprising a carrier comprising a mesh coated with a metallic material, and a semiconductor chip disposed over the carrier.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 29, 2012
    Inventors: Oliver EICHINGER, Khalil HOSSEINI, Joachim MAHLER, Manfred MENGEL
  • Publication number: 20120074553
    Abstract: A method and a system for improving reliability of a semiconductor device are provided. In one embodiment, a semiconductor device is provided comprising a semiconductor chip, a metallization layer comprising a metallic material disposed over a surface of the semiconductor chip, and an alloy layer comprising the metallic material disposed over the metallization layer.
    Type: Application
    Filed: September 27, 2010
    Publication date: March 29, 2012
    Inventors: Khalil HOSSEINI, Joachim MAHLER, Manfred MENGEL
  • Publication number: 20120068364
    Abstract: A device includes a semiconductor material having a first surface. A first material is applied to the first surface and a fiber material is embedded in the first material.
    Type: Application
    Filed: September 21, 2010
    Publication date: March 22, 2012
    Inventors: Manfred Mengel, Joachim Mahler, Khalil Hosseini
  • Publication number: 20120061845
    Abstract: In various embodiments, a method for filling a contact hole in a chip package arrangement is provided. The method may include introducing electrically conductive discrete particles into a contact hole of a chip package; and forming an electrical contact between the electrically conductive particles and a contact terminal of the front side and/or the back side of the chip.
    Type: Application
    Filed: September 10, 2010
    Publication date: March 15, 2012
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Benjamin Alles, Joachim Mahler, Edward Fuergut, Ivan Nikitin
  • Publication number: 20120061700
    Abstract: A method and a system for a reliable LED semiconductor device are provided. In one embodiment, the device comprises a carrier, a light emitting diode disposed on the carrier, an encapsulating material disposed over the light emitting diode and the carrier, at least one through connection formed in the encapsulating material, and a metallization layer disposed and structured over the at least one through connection.
    Type: Application
    Filed: September 9, 2010
    Publication date: March 15, 2012
    Inventors: Andreas EDER, Henrik EWE, Stefan LANDAU, Joachim MAHLER
  • Patent number: 8129225
    Abstract: A method includes providing an integral array of first carriers, arranging first semiconductor chips on the first carriers, and arranging an integral array of second carriers over the semiconductor chips.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: March 6, 2012
    Assignee: Infineon Technologies AG
    Inventors: Stefan Landau, Alexander Koenigsberger, Joachim Mahler, Klaus Schiess
  • Patent number: 8129831
    Abstract: A chip arrangement includes semiconductor chips coupled to opposing sides of an insulating layer. The arrangement includes a first semiconductor chip having a first chip surface presenting a first chip conductive region. An electrically insulating layer includes a first layer surface presenting a first layer conductive region, and a second, opposing surface presenting a second layer conductive region. The electrically insulating layer is coupled to the first semiconductor chip by applying the first layer conductive region to the first chip conductive region. The electrically insulating layer is then coupled to the second chip conductive region by applying the second layer conductive region to the second chip conductive region.
    Type: Grant
    Filed: February 16, 2007
    Date of Patent: March 6, 2012
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Alfred Haimerl, Michael Bauer
  • Patent number: 8120158
    Abstract: A laminate electronic device comprises a first semiconductor chip, the first semiconductor chip defining a first main face and a second main face opposite to the first main face, and having at least one electrode pad on the first main face. The laminate electronic device further comprises a carrier having a first structured metal layer arranged at a first main surface of the carrier. The first structured metal layer is bonded to the electrode pad via a first bond layer of a conductive material, wherein the first bond layer has a thickness of less than 10 ?m. A first insulating layer overlies the first main surface of the carrier and the first semiconductor chip.
    Type: Grant
    Filed: November 10, 2009
    Date of Patent: February 21, 2012
    Assignee: Infineon Technologies AG
    Inventors: Henrik Ewe, Joachim Mahler, Anton Prueckl, Ivan Nikitin
  • Patent number: 8110912
    Abstract: A method of manufacturing a semiconductor device includes providing a foil formed of an insulating material, where the foil includes at least one electrically conducting element, providing a chip having contact elements on a first face of the chip, and applying the foil over the contact elements of the chip.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: February 7, 2012
    Assignee: Infineon Technologies AG
    Inventors: Manfred Mengel, Joachim Mahler
  • Patent number: 8110906
    Abstract: A semiconductor device includes a carrier, a semiconductor chip including an active area on a first face and a separate isolation layer applied to a second face, and an adhesion material coupling the isolation layer to the carrier with the second face facing the carrier.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: February 7, 2012
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Wae Chet Yong, Stanley Job Doraisamy, Gerhard Deml, Rupert Fischer, Reimund Engl
  • Patent number: 8101463
    Abstract: A method of manufacturing a semiconductor device includes placing a chip on a carrier, and applying an electrically conducting layer to the chip and the carrier. The method additionally includes converting the electrically conducting layer into an electrically insulating layer.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: January 24, 2012
    Assignee: Infineon Technologies AG
    Inventors: Manfred Mengel, Joachim Mahler, Stefan Landau
  • Patent number: 8097959
    Abstract: A semiconductor device and method. One embodiment provides an integral array of first carriers and an integral array of second carries connected to the integral array of first carriers. First semiconductor chips are arranged on the integral array of first carriers. The integral array of second carriers is arranged over the first semiconductor chips.
    Type: Grant
    Filed: October 18, 2010
    Date of Patent: January 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Stefan Landau, Joachim Mahler, Thomas Wowra
  • Patent number: 8097936
    Abstract: A component has a device applied to a device carrier, a first conducting layer grown onto the device and onto the device carrier, and an insulating material applied to the first conducting layer such that only a portion of the first conducting layer is covered.
    Type: Grant
    Filed: March 13, 2007
    Date of Patent: January 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Henrik Ewe, Joachim Mahler
  • Patent number: 8097944
    Abstract: A semiconductor device includes a substrate having a chip island, a chip attached to the chip island, and encapsulation material deposited on the chip and part of the chip island. The chip island includes a first main face to which the chip is attached opposite a second main face, with the second main face of the chip island defining at least one cavity.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: January 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Stefan Landau, Ralf Otremba, Uwe Kirchner, Andreas Schloegl, Christian Fachmann, Joachim Mahler
  • Patent number: 8076003
    Abstract: A coating composition including a compound having a first molecular group or a first combination of atoms, the first molecular group or the first combination of atoms capable of bonding to an oxidizable metal or a metal oxide, and a second molecular group or a second combination of atoms, the second molecular group or the second combination of atoms capable of interacting with a precursor of a polymer so the compound and the polymer are bound together.
    Type: Grant
    Filed: September 26, 2008
    Date of Patent: December 13, 2011
    Assignee: Infineon Technologies AG
    Inventors: Manfred Mengel, Joachim Mahler
  • Publication number: 20110285033
    Abstract: Electronic circuit arrangement, includes a chip and a chip carrier having a substrate and a chip contact location. At least the chip contact location is provided with a soldering layer. The chip includes a bonding layer. A silver layer for eutectic bonding with the bonding layer is provided on the soldering layer in the region of the chip contact location.
    Type: Application
    Filed: August 5, 2011
    Publication date: November 24, 2011
    Applicant: Infineon Technologies AG
    Inventors: Khalil Hosseini, Joachim Mahler
  • Patent number: 8039971
    Abstract: Electronic circuit arrangement, includes a chip and a chip carrier having a substrate and a chip contact location. At least the chip contact location is provided with a soldering layer. The chip includes a bonding layer. A silver layer for eutectic bonding with the bonding layer is provided on the soldering layer in the region of the chip contact location.
    Type: Grant
    Filed: May 22, 2007
    Date of Patent: October 18, 2011
    Assignee: Infineon Technologies AG
    Inventors: Khalil Hosseini, Joachim Mahler
  • Patent number: 8030744
    Abstract: An electrical connection arrangement between a semiconductor circuit arrangement and an external contact device, and to a method for producing the connection arrangement is disclosed. In one embodiment, a metallic layer is deposited onto at least one contact terminal and/or the contacts and the wire, the metallic layer protecting the contact terminal or the electrical connection against ambient influences and ensuring a high reliability.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: October 4, 2011
    Assignee: Infineon Technologies AG
    Inventors: Thomas Laska, Matthias Stecher, Gregory Bellynck, Khalil Hosseini, Joachim Mahler
  • Patent number: 8017438
    Abstract: A semiconductor module includes a module package including a first substrate having a first semiconductor device and a second substrate having a second semiconductor device. A first outer conductor extends from the module package and is connected to the first substrate and a second outer conductor extends from the module package and is connected to the second substrate. A method for producing the semiconductor module includes attaching first outer conductors of a leadframe to a first substrate, where the first substrate includes a first semiconductor device that is attached to the first substrate either before or after attaching the first outer conductors. A second substrate is provided including a signal processing circuit and the second substrate is fastening to second outer conductors of the leadframe.
    Type: Grant
    Filed: December 19, 2006
    Date of Patent: September 13, 2011
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Angela Kessler, Wolfgang Schober, Alfred Haimerl, Joachim Mahler
  • Patent number: 8013441
    Abstract: One aspect of the invention relates to a power semiconductor device in lead frame technology and a method for producing the same. The power semiconductor device has a vertical current path through a power semiconductor chip. The power semiconductor chip has at least one large-area electrode on its top side and a large-area electrode on its rear side. The rear side electrode is surface-mounted on a lead frame chip island of a lead frame and the top side electrode is electrically connected to an internal lead of the lead frame via a connecting element. The connecting element has an electrically conductive film on a surface facing the top side electrode, the electrically conductive film extending from the top side electrode to the internal lead.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: September 6, 2011
    Assignee: Infineon Technologies AG
    Inventors: Michael Bauer, Alfred Haimerl, Angela Kessler, Joachim Mahler, Wolfgang Schober