Patents by Inventor Joachim Mahler

Joachim Mahler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9362240
    Abstract: An electronic device includes multiple semiconductor chips in a single housing. Such semiconductor chips may comprise different semiconductor materials, for example they may comprise GaN. Using bonding clips instead of bonding wires is an efficient way of connecting such semiconductor chips to a substrate.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: June 7, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Khalil Hosseini, Joachim Mahler, Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Xaver Schloegel, Klaus Schiess
  • Patent number: 9362191
    Abstract: A semiconductor device includes a carrier and a semiconductor chip disposed over the carrier. The semiconductor chip has a first surface and a second surface opposite to the first surface, wherein the second surface faces the carrier. Further, the semiconductor device includes a pre-encapsulant covering at least partially the second surface of the semiconductor chip and at least partially a side wall surface of the semiconductor chip. The pre-encapsulant has a thermal conductivity of equal to or greater than 10 W/(m·K) and a specific heat capacity of equal to or greater than 0.2 J/(g·K).
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: June 7, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Khalil Hosseini, Joachim Mahler, Ivan Nikitin
  • Patent number: 9362193
    Abstract: A chip arrangement is provided, the chip arrangement, including a carrier; at least one chip electrically connected to a carrier top side; an encapsulation material at least partially surrounding the at least one chip and the carrier top side, wherein the encapsulation material is formed on one or more lateral sides of the carrier; and a ceramic material disposed on a carrier bottom side, and on at least one side of the encapsulation material.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: June 7, 2016
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Xaver Schloegel, Wolfram Hable, Manfred Mengel, Joachim Mahler, Khalil Hosseini
  • Publication number: 20160155796
    Abstract: A semiconductor device includes a first load terminal at a first surface of a semiconductor body and a second load terminal at the opposing surface. An active device area is surrounded by an edge termination area. Load terminal contacts are absent in the edge termination area and are electrically connected to the semiconductor body in the active device area at the first surface. A positive temperature coefficient structure is between at least one of the first and second load terminals and a corresponding one of the first and second surfaces. Above a maximum operation temperature specified for the semiconductor device, a specific resistance of the positive temperature coefficient structure increases by at least two orders of magnitude within a temperature range of at most 50 K. A degree of area coverage of the positive temperature coefficient structure is greater in the edge termination area than in the active device area.
    Type: Application
    Filed: November 16, 2015
    Publication date: June 2, 2016
    Inventors: Thomas Basler, Hans-Joachim Schulze, Johannes Georg Laven, Joachim Mahler
  • Patent number: 9349680
    Abstract: A chip arrangement is provided which comprises a carrier; and at least two chips arranged over the carrier; wherein a continuous insulating layer is arranged between the at least two chips and between the carrier and at least one of the at least two chips.
    Type: Grant
    Filed: January 5, 2014
    Date of Patent: May 24, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Joachim Mahler, Peter Strobel, Edward Fuergut
  • Patent number: 9331060
    Abstract: A device includes a first power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The device further includes a second power semiconductor chip with a first contact pad and a second contact pad on a first face and a third contact pad on the second face. The first and second power semiconductor chips are arranged one above another, and the first face of the first power semiconductor chip faces in the direction of the first face of the second power semiconductor chip. In addition, the first power semiconductor chip is located laterally at least partially outside of the outline of the second power semiconductor chip.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: May 3, 2016
    Assignee: Infineon Technologies AG
    Inventors: Ralf Otremba, Josef Hoeglauer, Joachim Mahler, Johannes Lodermeyer
  • Publication number: 20160111415
    Abstract: An embodiment of an IGBT comprises an emitter terminal at a first surface of a semiconductor body. The IGBT further comprises a collector terminal at a second surface of the semiconductor body. A first zone of a first conductivity type is in the semiconductor body between the first and second surfaces. A collector injection structure adjoins the second surface, the collector injection structure being of a second conductivity type and comprising a first part and a second part at a first lateral distance from each other. The IGBT further comprises a negative temperature coefficient thermistor adjoining the first zone in an area between the first and second parts.
    Type: Application
    Filed: October 12, 2015
    Publication date: April 21, 2016
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Thomas Basler, Erich Griebl, Joachim Mahler, Daniel Pedone, Wolfgang Scholz, Philipp Seng, Peter Tuerkes, Stephan Voss
  • Patent number: 9318473
    Abstract: In a method of manufacturing a semiconductor device, a first semiconductor element is mounted on a carrier. A b-stage curable polymer is deposited on the carrier. A second semiconductor element is affixed on the polymer.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: April 19, 2016
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Khalil Hosseini, Edward Fuergut, Manfred Mengel
  • Patent number: 9313898
    Abstract: An electrical component that includes a substrate and a polymeric layer oriented in working relation with the substrate, the polymeric layer including a low molecular mass polyimide.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: April 12, 2016
    Assignee: Infineon Technologies AG
    Inventors: Manfred Mengel, Joachim Mahler
  • Patent number: 9313897
    Abstract: A packaged component and a method for making a packaged component are disclosed. In an embodiment the packaged component includes a component carrier having a component carrier contact and a component disposed on the component carrier, the component having a component contact. The packaged component further includes a conductive connection element connecting the component carrier contact with the component contact, an insulating film disposed directly at least on one of a top surface of the component or the conductive connection element, and an encapsulant encapsulating the component carrier, the component and the enclosed conductive connection elements.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: April 12, 2016
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Manfred Mengel, Khalil Hosseini, Franz-Peter Kalz
  • Patent number: 9305876
    Abstract: A device includes a carrier, a first semiconductor chip arranged over the carrier and a first electrically conductive element arranged over the carrier. The device further includes a first wire electrically coupled to the first electrically conductive element and a second wire electrically coupled to the first electrically conductive element and to the first semiconductor chip. The first electrically conductive element is configured to forward an electrical signal between the first wire and the second wire.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: April 5, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Khalil Hosseini, Joachim Mahler
  • Publication number: 20160064298
    Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and a plurality of capsules in the encapsulant, wherein the capsules comprise a core comprising an additive and comprise a shell, in particular a crackable shell, enclosing the core.
    Type: Application
    Filed: August 26, 2015
    Publication date: March 3, 2016
    Inventors: Peh Hean TEH, Jagen Krishnan, Swee Kah Lee, Poh Cheng Lim, Joachim Mahler, Chew Theng Tai, Yik Yee Tan, Soon Lock Goh
  • Publication number: 20160056121
    Abstract: Various embodiments provide a metallized electric component for an electronic module, wherein the metallized electric component comprises a conductive electric element; and a metallization structure arranged over the conductive electric element and comprising at least a surface metallization layer, wherein the surface metallization layer comprises gold and silver and has a thickness between 2 nm and 100 nm.
    Type: Application
    Filed: August 19, 2015
    Publication date: February 25, 2016
    Inventors: Joachim MAHLER, Guenther KOLMEDER, Chen Wen LEE
  • Patent number: 9263369
    Abstract: Various embodiments provide a chip arrangement. The chip arrangement may include a first chip having a first chip side and a second chip side opposite the first chip side and at least one contact on its second chip side; a second chip having a first chip side and a second chip side opposite the first chip side and at least one contact on its first chip side; wherein the second chip side of the first chip and the second chip side of the second chip are facing each other; a first electrically conductive structure extending from the at least one contact of the first chip from the second chip side of the first chip through the first chip to the first chip side of the first chip; and a second electrically conductive structure.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: February 16, 2016
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Khalil Hosseini, Anton Mauder, Joachim Mahler
  • Publication number: 20160043054
    Abstract: Methods for connecting chips to a chip carrier are disclosed. In some embodiments the method for connecting a plurality of chips to a chip carrier includes placing first chips on a transfer carrier, placing second chips on the transfer carrier, placing the transfer carrier with the first and second chips on the chip carrier and forming connections between the first chips and the chip carrier and the second chips and the chip carrier.
    Type: Application
    Filed: August 5, 2014
    Publication date: February 11, 2016
    Inventors: Rupert Fischer, Peter Strobel, Joachim Mahler, Konrad Roesl, Alexander Heinrich
  • Publication number: 20160035700
    Abstract: A chip package is provided. The chip package may include an electrically conductive carrier; at least one first chip including a first side and a second side opposite of the first side, with its second side being electrically contacted to the electrically conductive carrier; an insulating layer over at least a part of the electrically conductive carrier and over at least a part of the first side of the chip; at least one second chip arranged over the insulating layer and next to the first chip; encapsulating material over the first chip and the second chip; and electrical contacts which extend through the encapsulation material to at least one contact of the at least one first chip and to at least one contact of the at least one second chip.
    Type: Application
    Filed: October 12, 2015
    Publication date: February 4, 2016
    Inventors: Khalil Hosseini, Joachim Mahler, Franz-Peter Kalz, Joachim Voelter, Ralf Wombacher
  • Patent number: 9249014
    Abstract: An assembled component and a method for assembling a component are disclosed. In one embodiment the assembled component includes a component carrier, an attachment layer disposed on the component carrier and a component disposed on the attachment layer, the component having a nano-structured first main surface facing the component carrier.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: February 2, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Khalil Hosseini, Joachim Mahler, Georg Meyer-Berg
  • Publication number: 20150359091
    Abstract: A printed circuit board includes an electrically conductive layer and a dielectric layer including a polymer, wherein the polymer includes metallic particles.
    Type: Application
    Filed: June 3, 2015
    Publication date: December 10, 2015
    Inventors: Joachim Mahler, Ralf Otremba
  • Publication number: 20150344730
    Abstract: A primer composition is provided. The primer composition includes at least one bi- or multi-functional benzoxazine compound; and at least one compound including a functional group having affinity for a metallic surface, and a cross-linkable group. A method of forming a primer layer on a semiconductor device, and a method of encapsulating a semiconductor device are also provided.
    Type: Application
    Filed: May 27, 2014
    Publication date: December 3, 2015
    Applicant: Infineon Technologies AG
    Inventors: Swee Kah LEE, Joachim MAHLER, Chew Theng TAI, Yik Yee TAN, Soon Lock GOH, Poh Cheng LIM, Jagen KRISHNAN, Peh Hean TEH
  • Patent number: 9190389
    Abstract: A chip package device includes an electrically conducting chip carrier, at least one semiconductor chip attached to the electrically conducting chip carrier, and an insulating laminate structure embedding the chip carrier, the at least one semiconductor chip and a passive electronic device. The passive electronic device includes a first structured electrically conducting layer, the first structured electrically conducting layer extending over a surface of the laminate structure.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: November 17, 2015
    Assignee: Infineon Technologies AG
    Inventors: Georg Meyer-Berg, Joachim Mahler, Khalil Hosseini