Abstract: The generation of auxiliary crystal defects is induced in a semiconductor substrate. Then the semiconductor substrate is pre-annealed at a temperature above a dissociation temperature at which the auxiliary crystal defects transform into defect complexes, which may be electrically inactive. Then protons may be implanted into the semiconductor substrate to induce the generation of radiation-induced main crystal defects. The defect complexes may enhance the efficiency of the formation of particle-related dopants based on the radiation-induced main crystal defects.

Abstract: A semiconductor device includes semiconductor body region and a surface region, the semiconductor body region including a first conductivity type first semiconductor region type and a second conductivity type second semiconductor region.

Abstract: A semiconductor device includes a semiconductor mesa having source zones separated from each other along a longitudinal axis of the semiconductor mesa and at least one body zone forming first pn junctions with the source zones and a second pn junction with a drift zone. Electrode structures are on opposite sides of the semiconductor mesa, at least one of which includes a gate electrode configured to control a charge carrier flow through the at least one body zone. First portions of the at least one body zone are formed between the source zones and separation regions. In the separation regions, at least one of (i) a capacitive coupling between the gate electrode and the semiconductor mesa and (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region.

Abstract: A semiconductor device includes a semiconductor body including a drift zone that forms a pn junction with an emitter region. A first load electrode is at a front side of the semiconductor body. A second load electrode is at a rear side of the semiconductor body opposite to the front side. One or more variable resistive elements are electrically connected in a controlled path between the drift zone and one of the first and second load electrodes. The variable resistive elements activate and deactivate electronic elements of the semiconductor device in response to a change of the operational state of the semiconductor device.

Abstract: A semiconductor device includes transistor cells with source zones of a first conductivity type and body zones of a second conductivity type. The source and body zones are formed in a semiconductor mesa formed from a portion of a semiconductor body. Control structures include first portions extending into the semiconductor body on at least two opposing sides of the semiconductor mesa, second portions in a distance to the first surface between the first portions, and third portions in a distance to the first surface and connecting the first and the second portions, wherein constricted sections of the semiconductor mesa are formed between neighboring third portions.

Abstract: A method of forming a semiconductor device includes forming a plurality of trenches extending into a semiconductor substrate from a first surface of the semiconductor substrate. Each of the trenches includes a narrower part in open communication with a wider part that is spaced apart from the first surface by the narrower part. The narrower part of adjacent trenches is laterally separated by a first region of the semiconductor substrate. The wider part of adjacent trenches is laterally separated by a second region of the semiconductor substrate that is narrower than the first region. The method further includes introducing an oxidizing agent into the wider part of the trenches through the narrower part of the trenches to oxidize the second region of the semiconductor substrate between adjacent trenches to form dielectric support structures that support the first region of the semiconductor.

Abstract: A semiconductor switching device includes a first load terminal electrically connected to source zones of transistor cells. The source zones form first pn junctions with body zones. A second load terminal is electrically connected to a drain construction that forms second pn junctions with the body zones. Control structures, which include a control electrode and charge storage structures, directly adjoin the body zones. The control electrode controls a load current through the body zones. The charge storage structures insulate the control electrode from the body zones and contain a control charge adapted to induce inversion channels in the body zones in the absence of a potential difference between the control electrode and the first load electrode.

Abstract: A reverse blocking semiconductor device includes a base region of a first conductivity type and a body region of a second, complementary conductivity type, wherein the base and body regions form a pn junction. Between the base region and a collector electrode an emitter layer is arranged that includes emitter zones of the second conductivity type and at least one channel of the first conductivity type. The channels extend through the emitter layer between the base region and the collector electrode and reduce the leakage current in a forward blocking state.

Abstract: An IGBT includes at least one first type transistor cell, including a base region, first and second emitter regions, and a body region arranged between the first emitter region and base region. The base region is arranged between the body region and second emitter region. A gate electrode adjacent the body region is dielectrically insulated from the body region by a gate dielectric. A base electrode adjacent the base region is dielectrically insulated from the base region by a base electrode dielectric. The base region has a first base region section adjoining the base electrode dielectric and a second base region section arranged between the second emitter region and the first base region section. A ratio between the doping concentration of the first base region section and the doping concentration of the second base region section is at least 10. The base electrode dielectric is thicker than the gate dielectric.

Abstract: A semiconductor device includes a semiconductor mesa with at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. A pedestal layer at a side of the drift zone opposite to the at least one body zone includes first zones of a conductivity type of the at least one body zone and second zones of the conductivity type of the drift zone. Electrode structures are on opposite sides of the semiconductor mesa. At least one of the electrode structures includes a gate electrode controlling a charge carrier flow through the at least one body zone. In a separation region between two of the source zones (i) a capacitive coupling between the gate electrode and the semiconductor mesa or (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region.

Abstract: In accordance with one component, a power field effect transistor is proposed, including a substrate, a channel, a gate electrode, and a gate insulator. The gate insulator is arranged at least partly between the gate electrode and the channel and includes a material having a hysteresis with respect to its polarization, such that a switching state of the transistor produced by a voltage applied to the gate electrode is maintained after the voltage has been switched off. Furthermore, a half-bridge circuit is proposed, including a high-side transistor in accordance with the construction according to the disclosure, and a low-side transistor, and also methods and circuits for driving.

Abstract: A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement having a first configuration region of emitter-side insulated gate bipolar transistor structures, a second configuration region of emitter-side insulated gate bipolar transistor structures, a collector layer and a drift layer. The drift layer is arranged between the collector layer and the emitter-side insulated gate bipolar transistor structures of the first configuration region and the second configuration region. The collector layer includes at least a first doping region laterally adjacent to a second doping region, the doping regions having different charge carrier life times, different conductivity types or different doping concentrations. The first configuration region is located with at least a partial lateral overlap to the first doping region, and the second configuration region is located with at least a partial lateral overlap to the second doping region.

Abstract: A drive circuit for driving a semiconductor switch includes an overload detector circuit connected to the semiconductor switch and designed to detect an overload state of the semiconductor switch. The drive circuit further includes a driver circuit connected to a control terminal of the semiconductor switch and designed to generate, upon detection of an overload state, a driver signal having a level such that the semiconductor switch is switched off or switch-on is prevented. The driver circuit is further designed to generate a driver signal for driving the semiconductor switch according to a control signal, wherein for switching on the transistor at a first instant a driver signal is generated at a first level and, if no overload state is detected up to a predefined time period having elapsed, the level of the driver signal is increased to a second level.

Abstract: A semiconductor device includes a semiconductor mesa that includes at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. Electrode structures are on opposite sides of the semiconductor mesa. At least one of the electrode structures includes a gate electrode configured to control a charge carrier flow through the at least one body zone. In a separation region between the source zones, which are arranged along an extension direction of the semiconductor mesa, the semiconductor mesa includes at least one partial or complete constriction.

Abstract: A semiconductor device includes a semiconductor mesa with at least one body zone forming first pn junctions with source zones and a second pn junction with a drift zone. A pedestal layer at a side of the drift zone opposite to the at least one body zone includes first zones of a conductivity type of the at least one body zone and second zones of the conductivity type of the drift zone. Electrode structures are on opposite sides of the semiconductor mesa. At least one of the electrode structures includes a gate electrode controlling a charge carrier flow through the at least one body zone. In a separation region between two of the source zones (i) a capacitive coupling between the gate electrode and the semiconductor mesa or (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region.

Abstract: A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a carrier confinement reduction region laterally arranged between a cell region and a sensitive region. The IGBT arrangement is configured or formed so that the cell region has a first average density of free charge carriers in an on-state of the IGBT arrangement, the carrier confinement reduction region has a second average density of free charge carriers in the on-state of the IGBT arrangement and the sensitive region has a third average density of free charge carriers in the on-state of the IGBT arrangement. The first average density of free charge carriers is larger than the second average density of free charge carriers and the second average density of free charge carriers is larger than the third average density of free charge carriers.

Abstract: An IGBT includes at least one first type transistor cell, including a base region, a first emitter region, a body region, and a second emitter region. The body region is arranged between the first emitter region and the base region. The base region is arranged between the body region and the second emitter region. The IGBT further includes a gate electrode adjacent the body region and dielectrically insulated from the body region by a gate dielectric, and a base electrode adjacent the base region and dielectrically insulated from the base region by a base electrode dielectric. The base region has a first base region section adjoining the base electrode dielectric and a second base region section arranged between the second emitter region and the first base region section. A doping concentration of the first base region section is higher than a doping concentration of the second base region section.

Abstract: A semiconductor device includes a body zone in a semiconductor mesa, which is formed between neighboring control structures that extend from a first surface into a semiconductor body. A drift zone forms a first pn junction with the body zone. In the semiconductor mesa, the drift zone includes a first drift zone section that includes a constricted section of the semiconductor mesa. A minimum horizontal width of the constricted section parallel to the first surface is smaller than a maximum horizontal width of the body zone. An emitter layer between the drift zone and the second surface parallel to the first surface includes at least one first zone of a conductivity type of the drift zone.

Abstract: A transistor device includes a semiconductor mesa region between first and second trenches in a semiconductor body, a body region of a first conductivity type and a source region of a second conductivity type in the semiconductor mesa region, a drift region of the second conductivity type in the semiconductor body, and a gate electrode adjacent the body region in the first trench, and dielectrically insulated from the body region by a gate dielectric. The body region separates the source region from the drift region and extends to the surface of the semiconductor mesa region adjacent the source region. The body region comprises a surface region which adjoins the surface of the semiconductor mesa region and the first trench. The surface region has a higher doping concentration than a section of the body region that separates the source region from the drift region.

Abstract: A semiconductor device includes an insulated gate bipolar transistor (IGBT) arrangement. The IGBT arrangement includes a first configuration region of emitter-side insulated gate bipolar transistor structures and a second configuration region of emitter-side insulated gate bipolar transistor structures. The first configuration region and the second configuration region are arranged at a main surface of a semiconductor substrate of the semiconductor device. Further, the IGBT arrangement includes a collector layer and a drift layer. The collector layer is arranged at a backside surface of the semiconductor substrate and the drift layer is arranged between the collector layer and the emitter-side IGBT structures of the first configuration region and the second configuration region. Additionally, the collector layer includes at least a first doping region laterally adjacent to a second doping region.