Patents by Inventor John C. Forster

John C. Forster has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090159439
    Abstract: Wafer level arc detection is provided in a plasma reactor using an RF transient sensor coupled to a threshold comparator, and a system controller responsive to the threshold comparator.
    Type: Application
    Filed: August 15, 2007
    Publication date: June 25, 2009
    Applicant: Applied Materials, Inc.
    Inventors: John Pipitone, John C. Forster
  • Patent number: 7550090
    Abstract: A method for in-situ cleaning of a dielectric dome surface having been used in pre-clean processes is provided. Carbon containing deposits are removed by providing a plasma of one or more oxidizing gases which react with the carbon containing films to form volatile carbon containing compounds.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: June 23, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Quancheng Gu, Cheng-Hsiung Tsai, John C. Forster, Xiaoxi Guo, Larry Frazier
  • Patent number: 7504006
    Abstract: A DC magnetron sputter reactor for sputtering deposition materials such as tantalum and tantalum nitride, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and capacitively coupled plasma (CCP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by inductively-coupled plasma (ICP) resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. CCP is provided by a pedestal electrode which capacitively couples RF energy into a plasma. The CCP plasma is preferably enhanced by a magnetic field generated by electromagnetic coils surrounding the pedestal which act to confine the CCP plasma and increase its density.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: March 17, 2009
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Xianmin Tang, John C. Forster, Umesh Kelkar
  • Publication number: 20090053888
    Abstract: A method of depositing a duffusion barrier layer with overlying conductive layer or fill which lowers resistivity of a semiconductor device interconnect. The lower resistivity is achieved by inducing the formation of alpha tantalum within a tantalum-comprising barrier layer.
    Type: Application
    Filed: October 20, 2008
    Publication date: February 26, 2009
    Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara
  • Publication number: 20080173326
    Abstract: A method for in-situ cleaning of a dielectric dome surface having been used in pre-clean processes is provided. Carbon containing deposits are removed by providing a plasma of one or more oxidizing gases which react with the carbon containing films to form volatile carbon containing compounds.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Inventors: QUANCHENG GU, Cheng-Hsiung Tsai, John C. Forster, Xiaoxi Guo, Larry Frazier
  • Publication number: 20080142359
    Abstract: A DC magnetron sputter reactor for sputtering deposition materials such as tantalum and tantalum nitride, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and capacitively coupled plasma (CCP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by inductively-coupled plasma (ICP) resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. CCP is provided by a pedestal electrode which capacitively couples RF energy into a plasma. The CCP plasma is preferably enhanced by a magnetic field generated by electromagnetic coils surrounding the pedestal which act to confine the CCP plasma and increase its density.
    Type: Application
    Filed: October 31, 2007
    Publication date: June 19, 2008
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Praburam GOPALRAJA, Jianming FU, Xianmin TANG, John C. FORSTER, Umesh KELKAR
  • Patent number: 7253109
    Abstract: We have discovered a method of providing a thin, approximately from about 2 ? to about 100 ? thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 ??cm and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface to form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: August 7, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Zheng Xu, Hong Zhang, Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Tony Chiang, Gongda Yao, Fusen E. Chen, Barry L. Chin, Gene Y. Kohara
  • Patent number: 7163607
    Abstract: Apparatus for supporting a substrate such as a semiconductor wafer in a process chamber to improve power coupling through the substrate. The apparatus contains a pedestal assembly and a pedestal cover positioned over the top surface of and circumscribing the pedestal assembly for electrically isolating the pedestal assembly. The pedestal cover reduces conductive film growth in the wafer process region. As such, RF wafer biasing power from the pedestal assembly remains coupled through the substrate during processing.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: January 16, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Bradley O. Stimson, Mitsuhiro Kaburaki, John C. Forster, Eric Delaurentis, Praburam Gopalraja, Patricia Rodriguez, Anantha Subramani
  • Patent number: 7097744
    Abstract: In one embodiment, a target alignment surface disposed on a target support mechanically engages a darkspace shield alignment surface disposed on a darkspace shield as the target is lodged into a chamber body. The respective alignment surfaces are shaped and positioned so that the darkspace shield is physically moved to a desired aligned position as the alignment surfaces engage each other. In this manner a darkspace shield may be directly aligned to a target within a semiconductor fabrication chamber to provide a suitable darkspace gap between the target and the darkspace shield.
    Type: Grant
    Filed: June 12, 2003
    Date of Patent: August 29, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Alan Barry Liu, Marc O. Schweitzer, James Stephen Van Gogh, Michael Rosenstein, Jennifer L. Watia, Xinyu Zhang, Yoichiro Tanaka, John C. Forster, Anthony Chen
  • Patent number: 7048837
    Abstract: Plasma etching or resputtering of a layer of sputtered materials including opaque metal conductor materials may be controlled in a sputter reactor system. In one embodiment, resputtering of a sputter deposited layer is performed after material has been sputtered deposited and while additional material is being sputter deposited onto a substrate. A path positioned within a chamber of the system directs light or other radiation emitted by the plasma to a chamber window or other optical view-port which is protected by a shield against deposition by the conductor material. In one embodiment, the radiation path is folded to reflect plasma light around the chamber shield and through the window to a detector positioned outside the chamber window.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: May 23, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Sasson R. Somekh, Marc O. Schweitzer, John C. Forster, Zheng Xu, Roderick C. Mosely, Barry L. Chin, Howard E. Grunes
  • Patent number: 6911124
    Abstract: We have discovered a method of providing a thin approximately from about 20 ? to about 100 ? thick TaN seed layer, which can be used to induce the formation of alpha tantalum when tantalum is deposited over the TaN seed layer. Further, the TaN seed layer exhibits low resistivity, in the range of 30 ?? m and can be used as a low resistivity barrier layer in the absence of an alpha tantalum layer. In one embodiment of the method, a TaN film is altered on its surface form the TaN seed layer. In another embodiment of the method, a Ta film is altered on its surface to form the TaN seed layer.
    Type: Grant
    Filed: September 17, 2002
    Date of Patent: June 28, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Xianmin Tang, Praburam Gopalraja, Suraj Rengarajan, John C. Forster, Jianming Fu, Peijun Ding
  • Patent number: 6887786
    Abstract: A first method is provided for forming a barrier layer on a substrate by sputter-depositing a tantalum nitride layer on a substrate having (1) a metal feature formed on the substrate; (2) a dielectric layer formed over the metal feature; and (3) a via formed in the dielectric layer so as to expose the metal feature. The via has side walls and a bottom, and a width of about 0.18 microns or less. The tantalum nitride layer is deposited on the side walls and bottom of the via and on a field region of the dielectric layer; and has a thickness of at least about 200 angstroms on the field region. The first method also includes sputter-depositing a tantalum layer on the substrate, in the same chamber. The tantalum layer having a thickness of less than about 100 angstroms on the field region. Other aspects are provided.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: May 3, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Hong Zhang, Xianmin Tang, Praburam Gopalraja, John C. Forster, Jick M. Yu
  • Publication number: 20040251130
    Abstract: In one embodiment, a target alignment surface disposed on a target support mechanically engages a darkspace shield alignment surface disposed on a darkspace shield as the target is lodged into a chamber body. The respective alignment surfaces are shaped and positioned so that the darkspace shield is physically moved to a desired aligned position as the alignment surfaces engage each other. In this manner a darkspace shield may be directly aligned to a target within a semiconductor fabrication chamber to provide a suitable darkspace gap between the target and the darkspace shield.
    Type: Application
    Filed: June 12, 2003
    Publication date: December 16, 2004
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Alan Barry Liu, Marc O. Schweitzer, James Stephen Van Gogh, Michael Rosenstein, Jennifer L. Watia, Xinyu Zhang, Yoichiro Tanaka, John C. Forster, Anthony Chan
  • Publication number: 20040173156
    Abstract: Apparatus for supporting a substrate such as a semiconductor wafer in a process chamber to improve power coupling through the substrate. The apparatus contains a pedestal assembly and a pedestal cover positioned over the top surface of and circumscribing the pedestal assembly for electrically isolating the pedestal assembly. The pedestal cover reduces conductive film growth in the wafer process region. As such, RF wafer biasing power from the pedestal assembly remains coupled through the substrate during processing.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 9, 2004
    Inventors: Bradley O. Stimson, Mitsuhiro Kaburaki, John C. Forster, Eric Delaurentis, Praburam Gopalraja, Patricia Rodriguez, Anantha Subramani
  • Publication number: 20040112735
    Abstract: A magnetron sputter reactor for sputtering deposition materials such as nickel and cobalt, for example, and its method of use, in which self-ionized plasma (SIP) sputtering is promoted. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. One embodiment of the present inventions is directed to sputter depositing a metal layer by biasing a sputter target with pulsed power in which the power applied to the target alternates between low and high levels. The high levels are, in one embodiment, sufficiently high to maintain a plasma for ionizing deposition material. The low levels are, in one embodiment, sufficiently low such that the power applied to the target during the high and low levels is, on average, low enough to facilitate deposition of thin layers if desired.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Dinesh Saigal, John C. Forster, Shuk Ying Lai
  • Publication number: 20040094402
    Abstract: A DC magnetron sputter reactor for sputtering deposition materials such as tantalum and tantalum nitride, for example, and its method of use, in which self-ionized plasma (SIP) sputtering and capacitively coupled plasma (CCP) sputtering are promoted, either together or alternately, in the same chamber. Also, bottom coverage may be thinned or eliminated by inductively-coupled plasma (ICP) resputtering. SIP is promoted by a small magnetron having poles of unequal magnetic strength and a high power applied to the target during sputtering. CCP is provided by a pedestal electrode which capacitively couples RF energy into a plasma. The CCP plasma is preferably enhanced by a magnetic field generated by electromagnetic coils surrounding the pedestal which act to confine the CCP plasma and increase its density.
    Type: Application
    Filed: July 31, 2003
    Publication date: May 20, 2004
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Praburam Gopalraja, Jianming Fu, Xianmin Tang, John C. Forster, Umesh Kelkar
  • Patent number: 6723214
    Abstract: Apparatus for supporting a substrate such as a semiconductor wafer in a process chamber to improve power coupling through the substrate. The apparatus contains a pedestal assembly and a pedestal cover positioned over the top surface of and circumscribing the pedestal assembly for electrically isolating the pedestal assembly. The pedestal cover reduces conductive film growth in the wafer process region. As such, RF wafer biasing power from the pedestal assembly remains coupled through the substrate during processing.
    Type: Grant
    Filed: January 2, 2002
    Date of Patent: April 20, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Bradley O. Stimson, Mitsuhiro Kaburaki, John C. Forster, Eric Delaurentis, Praburam Gopalraja, Patricia Rodriguez, Anantha Subramani
  • Patent number: 6679981
    Abstract: A plasma reaction chamber, particularly a DC magnetron sputter reactor, in which the plasma density and the ionization fraction of the plasma is increased by a plasma inductive loop passing through the processing space. A tube has its two ends connected to the vacuum chamber on confronting sides of the processing space. An RF coil powered by an RF power supply is positioned adjacent to the tube outside of the chamber and aligned to produce an RF magnetic field around the toroidal circumference of the tube such that an electric field is induced along the tube axis. Thereby, a plasma is generated in the tube in a loop circling through the processing space.
    Type: Grant
    Filed: May 11, 2000
    Date of Patent: January 20, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Shaoher X. Pan, Hiroji Hanawa, John C. Forster, Fusen Chen
  • Patent number: 6660134
    Abstract: A coil for inductively coupling RF energy to a plasma in a substrate processing chamber has adjacent spaced and circumferentially overlapping RF feedthroughs adjacent to overlapping ends to improve uniformity of processing of the substrate.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: December 9, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Zheng Xu, Michael Rosenstein, John C. Forster
  • Publication number: 20030216037
    Abstract: A first method is provided for forming a barrier layer on a substrate by sputter-depositing a tantalum nitride layer on a substrate having (1) a metal feature formed on the substrate; (2) a dielectric layer formed over the metal feature; and (3) a via formed in the dielectric layer so as to expose the metal feature. The via has side walls and a bottom, and a width of about 0.18 microns or less. The tantalum nitride layer is deposited on the side walls and bottom of the via and on a field region of the dielectric layer; and has a thickness of at least about 200 angstroms on the field region. The first method also includes sputter-depositing a tantalum layer on the substrate, in the same chamber. The tantalum layer having a thickness of less than about 100 angstroms on the field region. Other aspects are provided.
    Type: Application
    Filed: April 7, 2003
    Publication date: November 20, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Hong Zhang, Xianmin Tang, Praburam Gopalraja, John C. Forster, Jick M. Yu