Abstract: Described herein is a hybrid III-V Silicon laser comprising a first semiconductor region including layers of semiconductor materials from group III, group IV, or group V semiconductor to form an active region; and a second semiconductor region having a silicon waveguide and bonded to the first semiconductor region via direct bonding at room temperature of a layer of the first semiconductor region to a layer of the second semiconductor region.

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

Abstract: A system having an optomechanical gyroscope device. An optomechanical disk acts as an optical ring resonator and a mechanical disk resonator. A drive laser generates an optical drive signal. A drive channel acts as a waveguide for the optical drive signal and includes drive electrodes in a first proximity with respect to the optomechanical disk. The drive electrodes to excite the ring by evanescent coupling. A drive photodetector is configured to receive an output optical signal from the drive channel. A sense laser generates a optical sense signal. A sense channel acts as a waveguide for the optical sense signal and includes sense electrodes in a second proximity with respect to the optomechanical disk. A sense photodetector is configured to receive an output optical signal from the sense channel.

Abstract: Embodiments of the present disclosure describe semiconductor substrate techniques and configurations for an optical receiver. In one embodiment, a system includes a semiconductor substrate having one or more optical alignment features formed in a surface of the semiconductor substrate and an optical receiver assembly coupled with the semiconductor substrate, the optical receiver assembly including a photodetector device coupled with the surface of the semiconductor substrate, wherein the one or more optical alignment features facilitate precise optical alignment between a lens assembly and the photodetector device when the lens assembly is coupled with the semiconductor substrate using the one or more optical alignment features. Other embodiments may be described and/or claimed.

Abstract: Techniques and architectures for providing a reflective target area of an integrated circuit die assembly. In an embodiment, a reflective bevel surface of a die allows an optical signal to be received from the direction of a side surface of a die assembly for reflection into a photodetector. In another embodiment, one or more grooves in a coupling surface of the die provide respective leverage points for aligning a target area of the bevel surface with a detecting surface of the photodetector.

Abstract: The present disclosure proposes a method for manufacturing in a MEMS device a low-resistance contact between a silicon-germanium layer and a layer contacted by this silicon-germanium layer, such as a CMOS metal layer or another silicon-germanium layer, through an opening in a dielectric layer stack separating both layers. An interlayer is formed in this opening, thereby covering at least the sidewalls of the opening on the exposed surface of the another layer at the bottom of this opening. This interlayer may comprise a TiN layer in contact with the silicon-germanium layer. This interlayer can further comprise a Ti layer in between the TiN layer and the layer to be contacted. In another embodiment this interlayer comprises a TaN layer in contact with the silicon-germanium layer. This interlayer can then further comprise a Ta layer in between the TaN layer and the layer to be contacted.

Abstract: Microfluidic apparatus including integrated porous substrate/sensors that may be used for detecting targeted biological and chemical molecules and compounds. In one aspect, upper and lower microfluidic channels are defined in respective halves of a substrate, which are sandwiched around a porous membrane upon assembly. In other aspect, the upper and lower channels are formed such that a portion of the lower channel passes beneath a portion of the upper channel to form a cross-channel area, wherein the membrane is disposed between the two channels. In various embodiments, one or more porous membranes are disposed proximate to corresponding cross-channel areas defined by one or more upper and lower channels. The porous membrane may also have sensing characteristics, such that it produces a change in an optical and/or electronic characteristic.

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.

Abstract: A seek-scan probe (SSP) memory involves multiple-wafer bonding needing precision small gaps in between. Solder reflow bonding is typically used to join the wafers due to its reliability and ability to hermetically seal. However, solder reflow bonding may not provide a consistently controllable gap due to flowing solder during the bonding process. Thus, a bond stop technique and process is used to provide accurate cantilever to media gap control.

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods may include forming a photomask on a (110) silicon wafer substrate, wherein the photomask comprises a periodic array of parallelogram openings, and then performing a timed wet etch on the (110) silicon wafer substrate to form a diffraction grating structure that is etched into the (110) silicon wafer substrate.

Abstract: Described herein is a hybrid III-V Silicon laser comprising a first semiconductor region including layers of semiconductor materials from group III, group IV, or group V semiconductor to form an active region; and a second semiconductor region having a silicon waveguide and bonded to the first semiconductor region via direct bonding at room temperature of a layer of the first semiconductor region to a layer of the second semiconductor region.

Abstract: Embodiments of the invention use crystallographic etching of SOI wafers with a (110)-oriented epi layer to form both the vertical input facet and the re-entrant mirror. Proposed layout design combined with proposed orientation of the epi enables both vertical facets and re-entrant (upward-reflecting) mirror facets to be made in a single wafer-level wet etch process.

Abstract: Microfluidic apparatus including integrated porous substrate/sensors that may be used for detecting targeted biological and chemical molecules and compounds. In one aspect, upper and lower microfluidic channels are defined in respective halves of a substrate, which are sandwiched around a porous membrane upon assembly. In other aspect, the upper and lower channels are formed such that a portion of the lower channel passes beneath a portion of the upper channel to form a cross-channel area, wherein the membrane is disposed between the two channels. In various embodiments, one or more porous membranes are disposed proximate to corresponding cross-channel areas defined by one or more upper and lower channels. The porous membrane may also have sensing characteristics, such that it produces a change in an optical and/or electronic characteristic.

Abstract: Microfluidic apparatus including integrated porous substrate/sensors that may be used for detecting targeted biological and chemical molecules and compounds. In one aspect, upper and lower microfluidic channels are defined in respective halves of a substrate, which are sandwiched around a porous membrane upon assembly. In other aspect, the upper and lower channels are formed such that a portion of the lower channel passes beneath a portion of the upper channel to form a cross-channel area, wherein the membrane is disposed between the two channels. In various embodiments, one or more porous membranes are disposed proximate to corresponding cross-channel areas defined by one or more upper and lower channels. The porous membrane may also have sensing characteristics, such that it produces a change in an optical and/or electronic characteristic.

Abstract: Techniques and architectures for providing a reflective target area of an integrated circuit die assembly. In an embodiment, a reflective bevel surface of a die allows an optical signal to be received from the direction of a side surface of a die assembly for reflection into a photodetector. In another embodiment, one or more grooves in a coupling surface of the die provide respective leverage points for aligning a target area of the bevel surface with a detecting surface of the photodetector.

Abstract: Wafer-level bonding of the hybrid laser portion of a silicon photonics platform is done by forming a weakened level in a semiconductive pillar that supports laser-active layers by ion implantation into the semiconductive pillar without penetrating the laser-active layers, and by separating the laser-active layers from the semiconductive pillar by cracking the weakened level by an epitaxial lift-off processes.

Abstract: Wafer-level bonding of the hybrid laser portion of a silicon photonics platform is done by forming a weakened level in a semiconductive pillar that supports laser-active layers by ion implantation into the semiconductive pillar without penetrating the laser-active layers, and by separating the laser-active layers from the semiconductive pillar by cracking the weakened level by an epitaxial lift-off processes.

Abstract: A micro-electro-mechanical system (MEMS) seek-scan probe (SSP) memory device utilizes a protective layer over the delicate media layer to protect the media during harsh processing steps that may otherwise damage the media layer. The protective layer may comprise a layer of germanium and a layer of silicon dioxide.

Abstract: Embodiments of a process comprising forming one or more micro-electro-mechanical (MEMS) probe on a conductive metal oxide semiconductor (CMOS) wafer, wherein each MEMS probe comprises a cantilever beam with a fixed end and a free end and wherein the CMOS wafer has circuitry thereon; forming an unsharpened tip at or near the free end of each cantilever beam; depositing a silicide-forming material over the tip; annealing the wafer to sharpen the tip; and exposing the sharpened tip.

Abstract: A vertical total internal reflection (TIR) mirror and fabrication thereof is made by creating a re-entrant profile using crystallographic silicon etching. Starting with an SOI wafer, a deep silicon etch is used to expose the buried oxide layer, which is then wet-etched (in HF), opening the bottom surface of the Si device layer. This bottom silicon surface is then exposed so that in a crystallographic etch, the resulting shape is a re-entrant trapezoid with facets These facets can be used in conjunction with planar silicon waveguides to reflect the light upwards based on the TIR principle. Alternately, light can be coupled into the silicon waveguides from above the wafer for such purposes as wafer level testing.