Patents by Inventor John Rozen

John Rozen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180040708
    Abstract: A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.
    Type: Application
    Filed: August 4, 2016
    Publication date: February 8, 2018
    Inventors: Vijay Narayanan, Yohei Ogawa, John Rozen
  • Publication number: 20180040710
    Abstract: A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.
    Type: Application
    Filed: August 23, 2017
    Publication date: February 8, 2018
    Inventors: Vijay Narayanan, Yohei Ogawa, John Rozen
  • Publication number: 20180040709
    Abstract: A method of forming a gate stack that includes treating a semiconductor substrate with a wet etch chemistry to clean a surface of the semiconductor substrate and form an oxide containing interfacial layer, and converting the oxide containing interfacial layer to a binary alloy oxide based interlayer using a plasma deposition sequence including alternating a metal gas precursor and a nitrogen and/or hydrogen containing plasma. The method of forming the gate stack may further include forming a high-k dielectric layer atop the binary alloy oxide based interlayer.
    Type: Application
    Filed: August 23, 2017
    Publication date: February 8, 2018
    Inventors: Vijay Narayanan, Yohei Ogawa, John Rozen
  • Publication number: 20180005821
    Abstract: A technique relates to in-situ cleaning of a high-mobility substrate. Alternating pulses of a metal precursor and exposure to a plasma of a gas or gas mixture are applied. The gas or gas mixture contains both nitrogen and hydrogen (e.g., NH3). A passivation layer is formed on the high-mobility substrate by alternating pulses of the metal precursor and exposure to the plasma of a gas, or gas mixture, containing both nitrogen and hydrogen.
    Type: Application
    Filed: June 30, 2016
    Publication date: January 4, 2018
    Inventors: Takashi Ando, Vijay Narayanan, Yohei Ogawa, John Rozen
  • Publication number: 20170309723
    Abstract: A method of forming a semiconductor device that includes forming a metal oxide material on a III-V semiconductor channel region or a germanium containing channel region; and treating the metal oxide material with an oxidation process. The method may further include depositing of a hafnium containing oxide on the metal oxide material after the oxidation process, and forming a gate conductor atop the hafnium containing oxide. The source and drain regions are on present on opposing sides of the gate structure including the metal oxide material, the hafnium containing oxide and the gate conductor.
    Type: Application
    Filed: March 30, 2017
    Publication date: October 26, 2017
    Inventors: Takashi Ando, John Bruley, Eduard A. Cartier, Martin M. Frank, Vijay Narayanan, John Rozen
  • Publication number: 20170309487
    Abstract: A method of forming a semiconductor device that includes forming a metal oxide material on a III-V semiconductor channel region or a germanium containing channel region; and treating the metal oxide material with an oxidation process. The method may further include depositing of a hafnium containing oxide on the metal oxide material after the oxidation process, and forming a gate conductor atop the hafnium containing oxide. The source and drain regions are on present on opposing sides of the gate structure including the metal oxide material, the hafnium containing oxide and the gate conductor.
    Type: Application
    Filed: April 20, 2016
    Publication date: October 26, 2017
    Inventors: Takashi Ando, John Bruley, Eduard A. Cartier, Martin M. Frank, Vijay Narayanan, John Rozen
  • Publication number: 20170287717
    Abstract: Various methods for fabricating a semiconductor device by selective in-situ cleaning of a target surface of a semiconductor substrate by selective dry surface atomic layer etching of the target surface film, selectively removing one or more top layers of atoms from the target surface film of the semiconductor substrate. The selective in-situ cleaning of a target surface can be followed by deposition on the cleaned target surface such as to form a cap layer, a conductive contact layer, or a gate dielectric layer.
    Type: Application
    Filed: March 31, 2016
    Publication date: October 5, 2017
    Inventors: Robert L. BRUCE, Hiroyuki MIYAZOE, John ROZEN
  • Publication number: 20170271334
    Abstract: Semiconductor devices and methods of making the same include forming a first channel region on a first semiconductor region. A second channel region is formed on a second semiconductor region, the second semiconductor region being formed from a semiconductor material that is different from a semiconductor material of the first semiconductor region. A gate dielectric layer is formed over one or more of the first and second channel regions. A nitrogen-containing layer is formed on the gate dielectric layer. A gate is formed on the gate dielectric.
    Type: Application
    Filed: June 6, 2017
    Publication date: September 21, 2017
    Inventors: Takashi Ando, Martin M. Frank, Renee T. Mo, Vijay Narayanan, John Rozen
  • Publication number: 20170243867
    Abstract: Semiconductor devices and methods of making the same include forming a first channel region on a first semiconductor region. A second channel region is formed on a second semiconductor region, the second semiconductor region being formed from a semiconductor material that is different from a semiconductor material of the first semiconductor region. A nitrogen-containing layer is formed on one or more of the first and second channel regions. A gate dielectric layer is formed over the nitrogen-containing layer. A gate is formed on the gate dielectric.
    Type: Application
    Filed: February 24, 2016
    Publication date: August 24, 2017
    Inventors: Takashi Ando, Martin M. Frank, Renee T. Mo, Vijay Narayanan, John Rozen
  • Patent number: 9679967
    Abstract: A method for forming a semiconductor device includes forming a III-V semiconductor substrate and forming a gate structure on the III-V semiconductor substrate. The method also includes forming a thin spacer surrounding the gate structure and forming a source/drain junction with a first doped III-V material at an upper surface of the III-V semiconductor substrate. The method also includes oxidizing a surface the source/drain forming an oxidation layer; removing natural oxides from the oxidation layer on a surface of the source/drain to expose ions of the first doped material at least at a surface of the source/drain. The method further includes applying a second doping to the source/drain to increase a doping concentration of the first doped III-V material, forming metal contacts at least at the second doped surface of the source/drain; and then annealing the contact.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: June 13, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Ando, Kevin K. Chan, John Rozen, Jeng-Bang Yau, Yu Zhu
  • Patent number: 9646886
    Abstract: Disclosed is a process of making field-effect transistor gate stacks containing different deposited thin film silicon material layers having different hydrogen content, and devices comprising these gate stacks. The threshold voltage (Vt) can be tuned by tailoring the hydrogen content of the thin film silicon material layer positioned below a core dielectric and directly on a semiconductor material substrate.
    Type: Grant
    Filed: December 30, 2015
    Date of Patent: May 9, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vijay Narayanan, John Rozen
  • Patent number: 9646887
    Abstract: Disclosed is a process of making field-effect transistor gate stacks containing different deposited thin film silicon material layers having different hydrogen content, and devices comprising these gate stacks. The threshold voltage (Vt) can be tuned by tailoring the hydrogen content of the thin film silicon material layer positioned below a core dielectric and directly on a semiconductor material substrate.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: May 9, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vijay Narayanan, John Rozen
  • Publication number: 20170092725
    Abstract: A method for forming a layer of material on a silicon layer comprises depositing a layer of silicon material having a hydrophobic H-terminated surface on a substrate, forming a hydrophilic seed layer on the surface of the silicon material, and depositing an oxide material layer on the hydrophilic seed layer.
    Type: Application
    Filed: September 29, 2015
    Publication date: March 30, 2017
    Inventors: Takashi Ando, Martin M. Frank, Vijay Narayanan, John Rozen
  • Publication number: 20170092501
    Abstract: A method for forming a layer of material on a silicon layer comprises depositing a layer of silicon material having a hydrophobic H-terminated surface on a substrate, forming a hydrophilic seed layer on the surface of the silicon material, and depositing an oxide material layer on the hydrophilic seed layer.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 30, 2017
    Inventors: Takashi Ando, Martin M. Frank, Vijay Narayanan, John Rozen
  • Publication number: 20100005182
    Abstract: A method for directing a client to a content server containing desired content by providing the client with an address shared by a plurality of content servers, each of which has a copy of the desired content. The client is then served from an optimal, or closest available content server selected from the plurality of content servers. This optimal content server is selected on the basis of an optimal path from the client to the shared address.
    Type: Application
    Filed: September 8, 2009
    Publication date: January 7, 2010
    Applicants: XCELERA
    Inventor: John Rozen
  • Patent number: 7587500
    Abstract: A method for directing a client to a content server containing desired content by providing the client with an address shared by a plurality of content servers, each of which has a copy of the desired content. The client is then served from an optimal, or closest available content server selected from the plurality of content servers. This optimal content server is selected on the basis of an optimal path from the client to the shared address.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: September 8, 2009
    Assignee: Xcelera
    Inventor: John Rozen
  • Publication number: 20020091760
    Abstract: A method for directing a client to a content server containing desired content by providing the client with an address shared by a plurality of content servers, each of which has a copy of the desired content. The client is then served from an optimal, or closest available content server selected from the plurality of content servers. This optimal content server is selected on the basis of an optimal path from the client to the shared address.
    Type: Application
    Filed: January 10, 2001
    Publication date: July 11, 2002
    Inventor: John Rozen